MIPS: atomic: Fix whitespace in ATOMIC_OP macros

[linux-2.6-microblaze.git] / arch / mips / include / asm / llsc.h

diff --git a/arch/mips/include/asm/llsc.h b/arch/mips/include/asm/llsc.h
index c6d17d1..d240a4a 100644 (file)
--- a/arch/mips/include/asm/llsc.h
+++ b/arch/mips/include/asm/llsc.h
@@ -9,6 +9,8 @@
 #ifndef __ASM_LLSC_H
 #define __ASM_LLSC_H
 
+#include <asm/isa-rev.h>
+
 #if _MIPS_SZLONG == 32
 #define SZLONG_LOG 5
 #define SZLONG_MASK 31UL
@@ -25,4 +27,17 @@
 #define __EXT          "dext   "
 #endif
 
+/*
+ * Using a branch-likely instruction to check the result of an sc instruction
+ * works around a bug present in R10000 CPUs prior to revision 3.0 that could
+ * cause ll-sc sequences to execute non-atomically.
+ */
+#if R10000_LLSC_WAR
+# define __SC_BEQZ "beqzl      "
+#elif MIPS_ISA_REV >= 6
+# define __SC_BEQZ "beqzc      "
+#else
+# define __SC_BEQZ "beqz       "
+#endif
+
 #endif /* __ASM_LLSC_H  */