Merge tag 'x86_cleanups_for_v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux-2.6-microblaze.git] / arch / arm64 / kvm / sys_regs.c

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 1a7968a..f6f126e 100644 (file)
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1047,6 +1047,13 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
                break;
        case SYS_ID_AA64PFR1_EL1:
                val &= ~FEATURE(ID_AA64PFR1_MTE);
+               if (kvm_has_mte(vcpu->kvm)) {
+                       u64 pfr, mte;
+
+                       pfr = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1);
+                       mte = cpuid_feature_extract_unsigned_field(pfr, ID_AA64PFR1_MTE_SHIFT);
+                       val |= FIELD_PREP(FEATURE(ID_AA64PFR1_MTE), mte);
+               }
                break;
        case SYS_ID_AA64ISAR1_EL1:
                if (!vcpu_has_ptrauth(vcpu))
@@ -1302,6 +1309,23 @@ static bool access_ccsidr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
        return true;
 }
 
+static unsigned int mte_visibility(const struct kvm_vcpu *vcpu,
+                                  const struct sys_reg_desc *rd)
+{
+       if (kvm_has_mte(vcpu->kvm))
+               return 0;
+
+       return REG_HIDDEN;
+}
+
+#define MTE_REG(name) {                                \
+       SYS_DESC(SYS_##name),                   \
+       .access = undef_access,                 \
+       .reset = reset_unknown,                 \
+       .reg = name,                            \
+       .visibility = mte_visibility,           \
+}
+
 /* sys_reg_desc initialiser for known cpufeature ID registers */
 #define ID_SANITISED(name) {                   \
        SYS_DESC(SYS_##name),                   \
@@ -1470,8 +1494,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
        { SYS_DESC(SYS_ACTLR_EL1), access_actlr, reset_actlr, ACTLR_EL1 },
        { SYS_DESC(SYS_CPACR_EL1), NULL, reset_val, CPACR_EL1, 0 },
 
-       { SYS_DESC(SYS_RGSR_EL1), undef_access },
-       { SYS_DESC(SYS_GCR_EL1), undef_access },
+       MTE_REG(RGSR_EL1),
+       MTE_REG(GCR_EL1),
 
        { SYS_DESC(SYS_ZCR_EL1), NULL, reset_val, ZCR_EL1, 0, .visibility = sve_visibility },
        { SYS_DESC(SYS_TRFCR_EL1), undef_access },
@@ -1498,8 +1522,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
        { SYS_DESC(SYS_ERXMISC0_EL1), trap_raz_wi },
        { SYS_DESC(SYS_ERXMISC1_EL1), trap_raz_wi },
 
-       { SYS_DESC(SYS_TFSR_EL1), undef_access },
-       { SYS_DESC(SYS_TFSRE0_EL1), undef_access },
+       MTE_REG(TFSR_EL1),
+       MTE_REG(TFSRE0_EL1),
 
        { SYS_DESC(SYS_FAR_EL1), access_vm_reg, reset_unknown, FAR_EL1 },
        { SYS_DESC(SYS_PAR_EL1), NULL, reset_unknown, PAR_EL1 },