Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64...
[linux-2.6-microblaze.git] / arch / arm64 / kernel / cpu_errata.c
index 5706e74..e29e0fe 100644 (file)
@@ -121,22 +121,6 @@ cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused)
        sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCI, 0);
 }
 
-static DEFINE_RAW_SPINLOCK(reg_user_mask_modification);
-static void __maybe_unused
-cpu_clear_bf16_from_user_emulation(const struct arm64_cpu_capabilities *__unused)
-{
-       struct arm64_ftr_reg *regp;
-
-       regp = get_arm64_ftr_reg(SYS_ID_AA64ISAR1_EL1);
-       if (!regp)
-               return;
-
-       raw_spin_lock(&reg_user_mask_modification);
-       if (regp->user_mask & ID_AA64ISAR1_EL1_BF16_MASK)
-               regp->user_mask &= ~ID_AA64ISAR1_EL1_BF16_MASK;
-       raw_spin_unlock(&reg_user_mask_modification);
-}
-
 #define CAP_MIDR_RANGE(model, v_min, r_min, v_max, r_max)      \
        .matches = is_affected_midr_range,                      \
        .midr_range = MIDR_RANGE(model, v_min, r_min, v_max, r_max)
@@ -727,7 +711,6 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
                /* Cortex-A510 r0p0 - r1p1 */
                ERRATA_MIDR_RANGE(MIDR_CORTEX_A510, 0, 0, 1, 1),
                MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)),
-               .cpu_enable = cpu_clear_bf16_from_user_emulation,
        },
 #endif
 #ifdef CONFIG_ARM64_ERRATUM_2966298