arm64: zynqmp: Add support for RTC

[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / xilinx / zynqmp.dtsi

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 54dc283..1272fa6 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -20,35 +20,86 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        device_type = "cpu";
                        enable-method = "psci";
+                       operating-points-v2 = <&cpu_opp_table>;
                        reg = <0x0>;
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                };
 
-               cpu@1 {
+               cpu1: cpu@1 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        device_type = "cpu";
                        enable-method = "psci";
                        reg = <0x1>;
+                       operating-points-v2 = <&cpu_opp_table>;
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                };
 
-               cpu@2 {
+               cpu2: cpu@2 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        device_type = "cpu";
                        enable-method = "psci";
                        reg = <0x2>;
+                       operating-points-v2 = <&cpu_opp_table>;
+                       cpu-idle-states = <&CPU_SLEEP_0>;
                };
 
-               cpu@3 {
+               cpu3: cpu@3 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        device_type = "cpu";
                        enable-method = "psci";
                        reg = <0x3>;
+                       operating-points-v2 = <&cpu_opp_table>;
+                       cpu-idle-states = <&CPU_SLEEP_0>;
+               };
+
+               idle-states {
+                       entry-method = "arm,psci";
+
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x40000000>;
+                               local-timer-stop;
+                               entry-latency-us = <300>;
+                               exit-latency-us = <600>;
+                               min-residency-us = <10000>;
+                       };
+               };
+       };
+
+       cpu_opp_table: cpu_opp_table {
+               compatible = "operating-points-v2";
+               opp-shared;
+               opp00 {
+                       opp-hz = /bits/ 64 <1199999988>;
+                       opp-microvolt = <1000000>;
+                       clock-latency-ns = <500000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <599999994>;
+                       opp-microvolt = <1000000>;
+                       clock-latency-ns = <500000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <399999996>;
+                       opp-microvolt = <1000000>;
+                       clock-latency-ns = <500000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <299999997>;
+                       opp-microvolt = <1000000>;
+                       clock-latency-ns = <500000>;
                };
        };
 
+       dcc: dcc {
+               compatible = "arm,dcc";
+               status = "disabled";
+       };
+
        pmu {
                compatible = "arm,armv8-pmuv3";
                interrupt-parent = <&gic>;
@@ -119,6 +170,25 @@
                        rx-fifo-depth = <0x40>;
                };
 
+               cci: cci@fd6e0000 {
+                       compatible = "arm,cci-400";
+                       reg = <0x0 0xfd6e0000 0x0 0x9000>;
+                       ranges = <0x0 0x0 0xfd6e0000 0x10000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       pmu@9000 {
+                               compatible = "arm,cci-400-pmu,r1";
+                               reg = <0x9000 0x5000>;
+                               interrupt-parent = <&gic>;
+                               interrupts = <0 123 4>,
+                                            <0 123 4>,
+                                            <0 123 4>,
+                                            <0 123 4>,
+                                            <0 123 4>;
+                       };
+               };
+
                gem0: ethernet@ff0b0000 {
                        compatible = "cdns,gem";
                        status = "disabled";
@@ -215,12 +285,9 @@
                              <0x0 0xfd480000 0x0 0x1000>,
                              <0x80 0x00000000 0x0 0x1000000>;
                        reg-names = "breg", "pcireg", "cfg";
-                       ranges = <0x02000000 0x00000000 0xe0000000 0x00000000
-                                 0xe0000000 0x00000000 0x10000000
-                                 /* non-prefetchable memory */
-                                 0x43000000 0x00000006 0x00000000 0x00000006
-                                 0x00000000 0x00000002 0x00000000>;
-                                 /* prefetchable memory */
+                       ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000  /* non-prefetchable memory */
+                                 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
+                       bus-range = <0x00 0xff>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
                        interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
                                        <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
@@ -233,6 +300,16 @@
                        };
                };
 
+               rtc: rtc@ffa60000 {
+                       compatible = "xlnx,zynqmp-rtc";
+                       status = "disabled";
+                       reg = <0x0 0xffa60000 0x0 0x100>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <0 26 4>, <0 27 4>;
+                       interrupt-names = "alarm", "sec";
+                       calibration = <0x8000>;
+               };
+
                sata: ahci@fd0c0000 {
                        compatible = "ceva,ahci-1v84";
                        status = "disabled";