arm64: dts: ti: k3: mmc: fix dtbs_check warnings
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / ti / k3-j721e-main.dtsi
index b32df59..8c84daf 100644 (file)
                #size-cells = <1>;
                ranges = <0x0 0x0 0x00100000 0x1c000>;
 
-               pcie0_ctrl: syscon@4070 {
-                       compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
-                       reg = <0x00004070 0x4>;
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges = <0x4070 0x4070 0x4>;
-               };
-
-               pcie1_ctrl: syscon@4074 {
-                       compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
-                       reg = <0x00004074 0x4>;
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges = <0x4074 0x4074 0x4>;
-               };
-
-               pcie2_ctrl: syscon@4078 {
-                       compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
-                       reg = <0x00004078 0x4>;
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges = <0x4078 0x4078 0x4>;
-               };
-
-               pcie3_ctrl: syscon@407c {
-                       compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
-                       reg = <0x0000407c 0x4>;
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges = <0x407c 0x407c 0x4>;
-               };
-
                serdes_ln_ctrl: mux@4080 {
                        compatible = "mmio-mux";
                        reg = <0x00004080 0x50>;
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
                device_type = "pci";
-               ti,syscon-pcie-ctrl = <&pcie0_ctrl>;
+               ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
                reg-names = "intd_cfg", "user_cfg", "reg", "mem";
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&pcie0_ctrl>;
+               ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 239 1>;
                clock-names = "fck";
-               cdns,max-outbound-regions = <16>;
                max-functions = /bits/ 8 <6>;
                max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
                dma-coherent;
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
                device_type = "pci";
-               ti,syscon-pcie-ctrl = <&pcie1_ctrl>;
+               ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
                reg-names = "intd_cfg", "user_cfg", "reg", "mem";
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&pcie1_ctrl>;
+               ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 240 1>;
                clock-names = "fck";
-               cdns,max-outbound-regions = <16>;
                max-functions = /bits/ 8 <6>;
                max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
                dma-coherent;
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
                device_type = "pci";
-               ti,syscon-pcie-ctrl = <&pcie2_ctrl>;
+               ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
                reg-names = "intd_cfg", "user_cfg", "reg", "mem";
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&pcie2_ctrl>;
+               ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 241 1>;
                clock-names = "fck";
-               cdns,max-outbound-regions = <16>;
                max-functions = /bits/ 8 <6>;
                max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
                dma-coherent;
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
                device_type = "pci";
-               ti,syscon-pcie-ctrl = <&pcie3_ctrl>;
+               ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
                reg-names = "intd_cfg", "user_cfg", "reg", "mem";
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&pcie3_ctrl>;
+               ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 242 1>;
                clock-names = "fck";
-               cdns,max-outbound-regions = <16>;
                max-functions = /bits/ 8 <6>;
                max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
                dma-coherent;
                clock-names = "gpio";
        };
 
-       main_sdhci0: sdhci@4f80000 {
+       main_sdhci0: mmc@4f80000 {
                compatible = "ti,j721e-sdhci-8bit";
                reg = <0x0 0x4f80000 0x0 0x1000>, <0x0 0x4f88000 0x0 0x400>;
                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
-               clock-names = "clk_xin", "clk_ahb";
-               clocks = <&k3_clks 91 1>, <&k3_clks 91 0>;
+               clock-names = "clk_ahb", "clk_xin";
+               clocks = <&k3_clks 91 0>, <&k3_clks 91 1>;
                assigned-clocks = <&k3_clks 91 1>;
                assigned-clock-parents = <&k3_clks 91 2>;
                bus-width = <8>;
                dma-coherent;
        };
 
-       main_sdhci1: sdhci@4fb0000 {
+       main_sdhci1: mmc@4fb0000 {
                compatible = "ti,j721e-sdhci-4bit";
                reg = <0x0 0x04fb0000 0x0 0x1000>, <0x0 0x4fb8000 0x0 0x400>;
                interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
-               clock-names = "clk_xin", "clk_ahb";
-               clocks = <&k3_clks 92 0>, <&k3_clks 92 5>;
+               clock-names = "clk_ahb", "clk_xin";
+               clocks = <&k3_clks 92 5>, <&k3_clks 92 0>;
                assigned-clocks = <&k3_clks 92 0>;
                assigned-clock-parents = <&k3_clks 92 1>;
                ti,otap-del-sel-legacy = <0x0>;
                dma-coherent;
        };
 
-       main_sdhci2: sdhci@4f98000 {
+       main_sdhci2: mmc@4f98000 {
                compatible = "ti,j721e-sdhci-4bit";
                reg = <0x0 0x4f98000 0x0 0x1000>, <0x0 0x4f90000 0x0 0x400>;
                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
-               clock-names = "clk_xin", "clk_ahb";
-               clocks = <&k3_clks 93 0>, <&k3_clks 93 5>;
+               clock-names = "clk_ahb", "clk_xin";
+               clocks = <&k3_clks 93 5>, <&k3_clks 93 0>;
                assigned-clocks = <&k3_clks 93 0>;
                assigned-clock-parents = <&k3_clks 93 1>;
                ti,otap-del-sel-legacy = <0x0>;