arm64: dts: qcom: msm8996: switch USB QMP PHY to new style of bindings

[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / qcom / msm8996.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 6ba9da9..35a0d2a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -779,7 +779,7 @@
                                 <&pciephy_0>,
                                 <&pciephy_1>,
                                 <&pciephy_2>,
-                                <&ssusb_phy_0>,
+                                <&usb3phy>,
                                 <&ufsphy_lane 0>,
                                 <&ufsphy_lane 1>,
                                 <&ufsphy_lane 2>;
@@ -3056,7 +3056,7 @@
                                compatible = "snps,dwc3";
                                reg = <0x06a00000 0xcc00>;
                                interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
-                               phys = <&hsusb_phy1>, <&ssusb_phy_0>;
+                               phys = <&hsusb_phy1>, <&usb3phy>;
                                phy-names = "usb2-phy", "usb3-phy";
                                snps,hird-threshold = /bits/ 8 <0>;
                                snps,dis_u2_susphy_quirk;
@@ -3068,32 +3068,26 @@
 
                usb3phy: phy@7410000 {
                        compatible = "qcom,msm8996-qmp-usb3-phy";
-                       reg = <0x07410000 0x1c4>;
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges;
+                       reg = <0x07410000 0x1000>;
 
                        clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
-                               <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
-                               <&gcc GCC_USB3_CLKREF_CLK>;
-                       clock-names = "aux", "cfg_ahb", "ref";
+                                <&gcc GCC_USB3_CLKREF_CLK>,
+                                <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+                                <&gcc GCC_USB3_PHY_PIPE_CLK>;
+                       clock-names = "aux",
+                                     "ref",
+                                     "cfg_ahb",
+                                     "pipe";
+                       clock-output-names = "usb3_phy_pipe_clk_src";
+                       #clock-cells = <0>;
+                       #phy-cells = <0>;
 
                        resets = <&gcc GCC_USB3_PHY_BCR>,
-                               <&gcc GCC_USB3PHY_PHY_BCR>;
-                       reset-names = "phy", "common";
-                       status = "disabled";
+                                <&gcc GCC_USB3PHY_PHY_BCR>;
+                       reset-names = "phy",
+                                     "phy_phy";
 
-                       ssusb_phy_0: phy@7410200 {
-                               reg = <0x07410200 0x200>,
-                                     <0x07410400 0x130>,
-                                     <0x07410600 0x1a8>;
-                               #phy-cells = <0>;
-
-                               #clock-cells = <0>;
-                               clock-output-names = "usb3_phy_pipe_clk_src";
-                               clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
-                               clock-names = "pipe0";
-                       };
+                       status = "disabled";
                };
 
                hsusb_phy1: phy@7411000 {