arm64: dts: hi3798cv200: enable usb2 support for poplar board

[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / hisilicon / hi3798cv200.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 962bd79..c1723ef 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -8,7 +8,9 @@
  */
 
 #include <dt-bindings/clock/histb-clock.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy.h>
 #include <dt-bindings/reset/ti-syscon.h>
 
 / {
@@ -106,6 +108,73 @@
                        #reset-cells = <2>;
                };
 
+               perictrl: peripheral-controller@8a20000 {
+                       compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
+                                    "simple-mfd";
+                       reg = <0x8a20000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x8a20000 0x1000>;
+
+                       usb2_phy1: usb2-phy@120 {
+                               compatible = "hisilicon,hi3798cv200-usb2-phy";
+                               reg = <0x120 0x4>;
+                               clocks = <&crg HISTB_USB2_PHY1_REF_CLK>;
+                               resets = <&crg 0xbc 4>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               usb2_phy1_port0: phy@0 {
+                                       reg = <0>;
+                                       #phy-cells = <0>;
+                                       resets = <&crg 0xbc 8>;
+                               };
+
+                               usb2_phy1_port1: phy@1 {
+                                       reg = <1>;
+                                       #phy-cells = <0>;
+                                       resets = <&crg 0xbc 9>;
+                               };
+                       };
+
+                       usb2_phy2: usb2-phy@124 {
+                               compatible = "hisilicon,hi3798cv200-usb2-phy";
+                               reg = <0x124 0x4>;
+                               clocks = <&crg HISTB_USB2_PHY2_REF_CLK>;
+                               resets = <&crg 0xbc 6>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               usb2_phy2_port0: phy@0 {
+                                       reg = <0>;
+                                       #phy-cells = <0>;
+                                       resets = <&crg 0xbc 10>;
+                               };
+                       };
+
+                       combphy0: phy@850 {
+                               compatible = "hisilicon,hi3798cv200-combphy";
+                               reg = <0x850 0x8>;
+                               #phy-cells = <1>;
+                               clocks = <&crg HISTB_COMBPHY0_CLK>;
+                               resets = <&crg 0x188 4>;
+                               assigned-clocks = <&crg HISTB_COMBPHY0_CLK>;
+                               assigned-clock-rates = <100000000>;
+                               hisilicon,fixed-mode = <PHY_TYPE_USB3>;
+                       };
+
+                       combphy1: phy@858 {
+                               compatible = "hisilicon,hi3798cv200-combphy";
+                               reg = <0x858 0x8>;
+                               #phy-cells = <1>;
+                               clocks = <&crg HISTB_COMBPHY1_CLK>;
+                               resets = <&crg 0x188 12>;
+                               assigned-clocks = <&crg HISTB_COMBPHY1_CLK>;
+                               assigned-clock-rates = <100000000>;
+                               hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>;
+                       };
+               };
+
                uart0: serial@8b00000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x8b00000 0x1000>;
@@ -419,5 +488,67 @@
                        clocks = <&sysctrl HISTB_IR_CLK>;
                        status = "disabled";
                };
+
+               pcie: pcie@9860000 {
+                       compatible = "hisilicon,hi3798cv200-pcie";
+                       reg = <0x9860000 0x1000>,
+                             <0x0 0x2000>,
+                             <0x2000000 0x01000000>;
+                       reg-names = "control", "rc-dbi", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       bus-range = <0 15>;
+                       num-lanes = <1>;
+                       ranges = <0x81000000 0x0 0x00000000 0x4f00000 0x0 0x100000
+                                 0x82000000 0x0 0x3000000 0x3000000 0x0 0x01f00000>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "msi";
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&crg HISTB_PCIE_AUX_CLK>,
+                                <&crg HISTB_PCIE_PIPE_CLK>,
+                                <&crg HISTB_PCIE_SYS_CLK>,
+                                <&crg HISTB_PCIE_BUS_CLK>;
+                       clock-names = "aux", "pipe", "sys", "bus";
+                       resets = <&crg 0x18c 6>, <&crg 0x18c 5>, <&crg 0x18c 4>;
+                       reset-names = "soft", "sys", "bus";
+                       phys = <&combphy1 PHY_TYPE_PCIE>;
+                       phy-names = "phy";
+                       status = "disabled";
+               };
+
+               ohci: ohci@9880000 {
+                       compatible = "generic-ohci";
+                       reg = <0x9880000 0x10000>;
+                       interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&crg HISTB_USB2_BUS_CLK>,
+                                <&crg HISTB_USB2_12M_CLK>,
+                                <&crg HISTB_USB2_48M_CLK>;
+                       clock-names = "bus", "clk12", "clk48";
+                       resets = <&crg 0xb8 12>;
+                       reset-names = "bus";
+                       phys = <&usb2_phy1_port0>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ehci: ehci@9890000 {
+                       compatible = "generic-ehci";
+                       reg = <0x9890000 0x10000>;
+                       interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&crg HISTB_USB2_BUS_CLK>,
+                                <&crg HISTB_USB2_PHY_CLK>,
+                                <&crg HISTB_USB2_UTMI_CLK>;
+                       clock-names = "bus", "phy", "utmi";
+                       resets = <&crg 0xb8 12>,
+                                <&crg 0xb8 16>,
+                                <&crg 0xb8 13>;
+                       reset-names = "bus", "phy", "utmi";
+                       phys = <&usb2_phy1_port0>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
        };
 };