Merge tag 'soc-dt-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / freescale / imx8mm-venice-gw71xx.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
index 6425773..41c9661 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
@@ -47,25 +47,20 @@
                gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
                status = "okay";
        };
-
-       reg_usb_otg1_vbus: regulator-usb-otg1 {
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_reg_usb1_en>;
-               compatible = "regulator-fixed";
-               regulator-name = "usb_otg1_vbus";
-               gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-       };
 };
 
-/* off-board header */
 &ecspi2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spi2>;
-       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+                  <&gpio1 10 GPIO_ACTIVE_LOW>;
        status = "okay";
+
+       tpm@1 {
+               compatible = "tcg,tpm_tis-spi";
+               reg = <0x1>;
+               spi-max-frequency = <36000000>;
+       };
 };
 
 &gpio1 {
@@ -144,9 +139,10 @@
 };
 
 &usbotg1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbotg1>;
        dr_mode = "otg";
        over-current-active-low;
-       vbus-supply = <&reg_usb_otg1_vbus>;
        status = "okay";
 };
 
@@ -204,20 +200,13 @@
                >;
        };
 
-       pinctrl_reg_usb1_en: regusb1grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10      0x41
-                       MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12      0x141
-                       MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC     0x41
-               >;
-       };
-
        pinctrl_spi2: spi2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK    0xd6
                        MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI    0xd6
                        MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO    0xd6
                        MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13      0xd6
+                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10      0xd6
                >;
        };
 
@@ -234,4 +223,11 @@
                        MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX     0x140
                >;
        };
+
+       pinctrl_usbotg1: usbotg1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12      0x141
+                       MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC     0x41
+               >;
+       };
 };