Merge tag 'mvebu-dt-5.8-1' of git://git.infradead.org/linux-mvebu into arm/dt
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / arm / juno-base.dtsi
index 3feefd6..f6c5587 100644 (file)
                      <0x0 0x2c02f000 0 0x2000>,
                      <0x0 0x2c04f000 0 0x2000>,
                      <0x0 0x2c06f000 0 0x2000>;
-               #address-cells = <2>;
+               #address-cells = <1>;
                #interrupt-cells = <3>;
-               #size-cells = <2>;
+               #size-cells = <1>;
                interrupt-controller;
                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
-               ranges = <0 0 0 0x2c1c0000 0 0x40000>;
+               ranges = <0 0 0x2c1c0000 0x40000>;
 
                v2m_0: v2m@0 {
                        compatible = "arm,gic-v2m-frame";
                        msi-controller;
-                       reg = <0 0 0 0x10000>;
+                       reg = <0 0x10000>;
                };
 
                v2m@10000 {
                        compatible = "arm,gic-v2m-frame";
                        msi-controller;
-                       reg = <0 0x10000 0 0x10000>;
+                       reg = <0x10000 0x10000>;
                };
 
                v2m@20000 {
                        compatible = "arm,gic-v2m-frame";
                        msi-controller;
-                       reg = <0 0x20000 0 0x10000>;
+                       reg = <0x20000 0x10000>;
                };
 
                v2m@30000 {
                        compatible = "arm,gic-v2m-frame";
                        msi-controller;
-                       reg = <0 0x30000 0 0x10000>;
+                       reg = <0x30000 0x10000>;
                };
        };
 
        gpu: gpu@2d000000 {
                compatible = "arm,juno-mali", "arm,mali-t624";
                reg = <0 0x2d000000 0 0x10000>;
-               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "gpu", "job", "mmu";
+               interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "job", "mmu", "gpu";
                clocks = <&scpi_dvfs 2>;
                power-domains = <&scpi_devpd 1>;
                dma-coherent;
                #size-cells = <1>;
                ranges = <0 0x0 0x2e000000 0x8000>;
 
-               cpu_scp_lpri: scp-shmem@0 {
+               cpu_scp_lpri: scp-sram@0 {
                        compatible = "arm,juno-scp-shmem";
                        reg = <0x0 0x200>;
                };
 
-               cpu_scp_hpri: scp-shmem@200 {
+               cpu_scp_hpri: scp-sram@200 {
                        compatible = "arm,juno-scp-shmem";
                        reg = <0x200 0x200>;
                };
                         <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 7>;
-               interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0 0 2 &gic 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0 0 3 &gic 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0 0 4 &gic 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0 0 2 &gic 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0 0 3 &gic 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0 0 4 &gic 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
                msi-parent = <&v2m_0>;
                status = "disabled";
                iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */
                };
        };
 
-       soc_uart0: uart@7ff80000 {
+       soc_uart0: serial@7ff80000 {
                compatible = "arm,pl011", "arm,primecell";
                reg = <0x0 0x7ff80000 0x0 0x1000>;
                interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
                };
        };
 
-       ohci@7ffb0000 {
+       usb@7ffb0000 {
                compatible = "generic-ohci";
                reg = <0x0 0x7ffb0000 0x0 0x10000>;
                interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&soc_usb48mhz>;
        };
 
-       ehci@7ffc0000 {
+       usb@7ffc0000 {
                compatible = "generic-ehci";
                reg = <0x0 0x7ffc0000 0x0 0x10000>;
                interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 15>;
-               interrupt-map = <0 0  0 &gic 0 GIC_SPI  68 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  1 &gic 0 GIC_SPI  69 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  2 &gic 0 GIC_SPI  70 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  3 &gic 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  4 &gic 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  5 &gic 0 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  6 &gic 0 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  7 &gic 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  8 &gic 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0  9 &gic 0 GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0 10 &gic 0 GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0 11 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
-                               <0 0 12 &gic 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
-       };
-
-       site2: tlx@60000000 {
+               interrupt-map = <0 0  0 &gic 0 GIC_SPI  68 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  1 &gic 0 GIC_SPI  69 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  2 &gic 0 GIC_SPI  70 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  3 &gic 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  4 &gic 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  5 &gic 0 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  6 &gic 0 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  7 &gic 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  8 &gic 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0  9 &gic 0 GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0 10 &gic 0 GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0 11 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
+                               <0 0 12 &gic 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
+       site2: tlx-bus@60000000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0x60000000 0x10000000>;
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0>;
-               interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
        };
 };