select ARCH_WANT_LD_ORPHAN_WARN
select ARCH_WANTS_NO_INSTR
select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES
- select ARCH_HAS_UBSAN_SANITIZE_ALL
+ select ARCH_HAS_UBSAN
select ARM_AMBA
select ARM_ARCH_TIMER
select ARM_GIC
select HAVE_HW_BREAKPOINT if PERF_EVENTS
select HAVE_IOREMAP_PROT
select HAVE_IRQ_TIME_ACCOUNTING
- select HAVE_KVM
select HAVE_MOD_ARCH_SPECIFIC
select HAVE_NMI
select HAVE_PERF_EVENTS
config MMU
def_bool y
-config ARM64_PAGE_SHIFT
- int
- default 16 if ARM64_64K_PAGES
- default 14 if ARM64_16K_PAGES
- default 12
-
config ARM64_CONT_PTE_SHIFT
int
- default 5 if ARM64_64K_PAGES
- default 7 if ARM64_16K_PAGES
+ default 5 if PAGE_SIZE_64KB
+ default 7 if PAGE_SIZE_16KB
default 4
config ARM64_CONT_PMD_SHIFT
int
- default 5 if ARM64_64K_PAGES
- default 5 if ARM64_16K_PAGES
+ default 5 if PAGE_SIZE_64KB
+ default 5 if PAGE_SIZE_16KB
default 4
config ARCH_MMAP_RND_BITS_MIN
- default 14 if ARM64_64K_PAGES
- default 16 if ARM64_16K_PAGES
+ default 14 if PAGE_SIZE_64KB
+ default 16 if PAGE_SIZE_16KB
default 18
# max bits determined by the following formula:
config BUILTIN_RETURN_ADDRESS_STRIPS_PAC
bool
# Clang's __builtin_return_adddress() strips the PAC since 12.0.0
- # https://reviews.llvm.org/D75044
- default y if CC_IS_CLANG && (CLANG_VERSION >= 120000)
+ # https://github.com/llvm/llvm-project/commit/2a96f47c5ffca84cd774ad402cacd137f4bf45e2
+ default y if CC_IS_CLANG
# GCC's __builtin_return_address() strips the PAC since 11.1.0,
# and this was backported to 10.2.0, 9.4.0, 8.5.0, but not earlier
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94891
config ARM64_4K_PAGES
bool "4KB"
+ select HAVE_PAGE_SIZE_4KB
help
This feature enables 4KB pages support.
config ARM64_16K_PAGES
bool "16KB"
+ select HAVE_PAGE_SIZE_16KB
help
The system will use 16KB pages support. AArch32 emulation
requires applications compiled with 16K (or a multiple of 16K)
config ARM64_64K_PAGES
bool "64KB"
+ select HAVE_PAGE_SIZE_64KB
help
This feature enables 64KB pages support (4KB by default)
allowing only two levels of page tables and faster TLB
config ARM64_VA_BITS_36
bool "36-bit" if EXPERT
- depends on ARM64_16K_PAGES
+ depends on PAGE_SIZE_16KB
config ARM64_VA_BITS_39
bool "39-bit"
- depends on ARM64_4K_PAGES
+ depends on PAGE_SIZE_4KB
config ARM64_VA_BITS_42
bool "42-bit"
- depends on ARM64_64K_PAGES
+ depends on PAGE_SIZE_64KB
config ARM64_VA_BITS_47
bool "47-bit"
- depends on ARM64_16K_PAGES
+ depends on PAGE_SIZE_16KB
config ARM64_VA_BITS_48
bool "48-bit"
config CPU_BIG_ENDIAN
bool "Build big-endian kernel"
- depends on !LD_IS_LLD || LLD_VERSION >= 130000
# https://github.com/llvm/llvm-project/commit/1379b150991f70a5782e9a143c2ba5308da1161c
depends on AS_IS_GNU || AS_VERSION >= 150000
help
def_bool y
config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
- def_bool CRASH_CORE
+ def_bool CRASH_RESERVE
config TRANS_TABLE
def_bool y
depends on !CC_IS_GCC || GCC_VERSION >= 100100
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106671
depends on !CC_IS_GCC
- # https://github.com/llvm/llvm-project/commit/a88c722e687e6780dcd6a58718350dc76fcc4cc9
- depends on !CC_IS_CLANG || CLANG_VERSION >= 120000
depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_ARGS)
help
Build the kernel with Branch Target Identification annotations
config UNWIND_PATCH_PAC_INTO_SCS
bool "Enable shadow call stack dynamically using code patching"
- # needs Clang with https://reviews.llvm.org/D111780 incorporated
+ # needs Clang with https://github.com/llvm/llvm-project/commit/de07cde67b5d205d58690be012106022aea6d2b3 incorporated
depends on CC_IS_CLANG && CLANG_VERSION >= 150000
depends on ARM64_PTR_AUTH_KERNEL && CC_HAS_BRANCH_PROT_PAC_RET
depends on SHADOW_CALL_STACK
select UNWIND_TABLES
select DYNAMIC_SCS
+config ARM64_CONTPTE
+ bool "Contiguous PTE mappings for user memory" if EXPERT
+ depends on TRANSPARENT_HUGEPAGE
+ default y
+ help
+ When enabled, user mappings are configured using the PTE contiguous
+ bit, for any mappings that meet the size and alignment requirements.
+ This reduces TLB pressure and improves performance.
+
endmenu # "Kernel Features"
menu "Boot options"