ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT

[linux-2.6-microblaze.git] / arch / arm / plat-spear / include / plat / shirq.h

diff --git a/arch/arm/plat-spear/include/plat/shirq.h b/arch/arm/plat-spear/include/plat/shirq.h
index 88a7fbd..c51b355 100644 (file)
--- a/arch/arm/plat-spear/include/plat/shirq.h
+++ b/arch/arm/plat-spear/include/plat/shirq.h
@@ -17,25 +17,9 @@
 #include <linux/irq.h>
 #include <linux/types.h>
 
-/*
- * struct shirq_dev_config: shared irq device configuration
- *
- * virq: virtual irq number of device
- * enb_mask: enable mask of device
- * status_mask: status mask of device
- * clear_mask: clear mask of device
- */
-struct shirq_dev_config {
-       u32 virq;
-       u32 enb_mask;
-       u32 status_mask;
-       u32 clear_mask;
-};
-
 /*
  * struct shirq_regs: shared irq register configuration
  *
- * base: base address of shared irq register
  * enb_reg: enable register offset
  * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt
  * status_reg: status register offset
@@ -44,11 +28,9 @@ struct shirq_dev_config {
  * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt
  */
 struct shirq_regs {
-       void __iomem *base;
        u32 enb_reg;
        u32 reset_to_enb;
        u32 status_reg;
-       u32 status_reg_mask;
        u32 clear_reg;
        u32 reset_to_clear;
 };
@@ -57,17 +39,28 @@ struct shirq_regs {
  * struct spear_shirq: shared irq structure
  *
  * irq: hardware irq number
- * dev_config: array of device config structures which are using "irq" line
- * dev_count: size of dev_config array
+ * irq_base: base irq in linux domain
+ * irq_nr: no. of shared interrupts in a particular block
+ * irq_bit_off: starting bit offset in the status register
+ * invalid_irq: irq group is currently disabled
+ * base: base address of shared irq register
  * regs: register configuration for shared irq block
  */
 struct spear_shirq {
        u32 irq;
-       struct shirq_dev_config *dev_config;
-       u32 dev_count;
+       u32 irq_base;
+       u32 irq_nr;
+       u32 irq_bit_off;
+       int invalid_irq;
+       void __iomem *base;
        struct shirq_regs regs;
 };
 
-int spear_shirq_register(struct spear_shirq *shirq);
+int __init spear300_shirq_of_init(struct device_node *np,
+               struct device_node *parent);
+int __init spear310_shirq_of_init(struct device_node *np,
+               struct device_node *parent);
+int __init spear320_shirq_of_init(struct device_node *np,
+               struct device_node *parent);
 
 #endif /* __PLAT_SHIRQ_H */