#include "skeleton.dtsi"
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
#include <dt-bindings/soc/qcom,gsbi.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
function = "ps_hold";
};
};
+
+ i2c1_pins: i2c1 {
+ mux {
+ pins = "gpio20", "gpio21";
+ function = "gsbi1";
+ };
+ };
+
+ i2c3_pins: i2c3 {
+ mux {
+ pins = "gpio8", "gpio9";
+ function = "gsbi3";
+ };
+ };
};
intc: interrupt-controller@2000000 {
};
};
+ gsbi3: gsbi@16200000 {
+ status = "disabled";
+ compatible = "qcom,gsbi-v1.0.0";
+ reg = <0x16200000 0x100>;
+ clocks = <&gcc GSBI3_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ i2c3: i2c@16280000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ reg = <0x16280000 0x1000>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
+ clocks = <&gcc GSBI3_QUP_CLK>,
+ <&gcc GSBI3_H_CLK>;
+ clock-names = "core", "iface";
+ };
+ };
+
gsbi7: gsbi@16600000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
-
syscon-tcsr = <&tcsr>;
- serial@16640000 {
+ gsbi7_serial: serial@16640000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16640000 0x1000>,
<0x16600000 0x1000>;
#reset-cells = <1>;
};
+ l2cc: clock-controller@2011000 {
+ compatible = "syscon";
+ reg = <0x2011000 0x1000>;
+ };
+
+ rpm@108000 {
+ compatible = "qcom,rpm-apq8064";
+ reg = <0x108000 0x1000>;
+ qcom,ipc = <&l2cc 0x8 2>;
+
+ interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ack", "err", "wakeup";
+
+ regulators {
+ compatible = "qcom,rpm-pm8921-regulators";
+
+ pm8921_hdmi_switch: hdmi-switch {
+ bias-pull-down;
+ };
+ };
+ };
+
+ usb1_phy: phy@12500000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12500000 0x400>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS1_XCVR_CLK>,
+ <&gcc USB_HS1_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS1_RESET>;
+ reset-names = "link";
+ };
+
+ usb3_phy: phy@12520000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12520000 0x400>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS3_XCVR_CLK>,
+ <&gcc USB_HS3_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS3_RESET>;
+ reset-names = "link";
+ };
+
+ usb4_phy: phy@12530000 {
+ compatible = "qcom,usb-otg-ci";
+ reg = <0x12530000 0x400>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_NONE>;
+ status = "disabled";
+ dr_mode = "host";
+
+ clocks = <&gcc USB_HS4_XCVR_CLK>,
+ <&gcc USB_HS4_H_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc USB_HS4_RESET>;
+ reset-names = "link";
+ };
+
+ gadget1: gadget@12500000 {
+ compatible = "qcom,ci-hdrc";
+ reg = <0x12500000 0x400>;
+ status = "disabled";
+ dr_mode = "peripheral";
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ usb-phy = <&usb1_phy>;
+ };
+
+ usb1: usb@12500000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12500000 0x400>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb1_phy>;
+ };
+
+ usb3: usb@12520000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12520000 0x400>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb3_phy>;
+ };
+
+ usb4: usb@12530000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x12530000 0x400>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_NONE>;
+ status = "disabled";
+ usb-phy = <&usb4_phy>;
+ };
+
+ sata_phy0: phy@1b400000 {
+ compatible = "qcom,apq8064-sata-phy";
+ status = "disabled";
+ reg = <0x1b400000 0x200>;
+ reg-names = "phy_mem";
+ clocks = <&gcc SATA_PHY_CFG_CLK>;
+ clock-names = "cfg";
+ #phy-cells = <0>;
+ };
+
+ sata0: sata@29000000 {
+ compatible = "generic-ahci";
+ status = "disabled";
+ reg = <0x29000000 0x180>;
+ interrupts = <GIC_SPI 209 IRQ_TYPE_NONE>;
+
+ clocks = <&gcc SFAB_SATA_S_H_CLK>,
+ <&gcc SATA_H_CLK>,
+ <&gcc SATA_A_CLK>,
+ <&gcc SATA_RXOOB_CLK>,
+ <&gcc SATA_PMALIVE_CLK>;
+ clock-names = "slave_iface",
+ "iface",
+ "bus",
+ "rxoob",
+ "core_pmalive";
+
+ assigned-clocks = <&gcc SATA_RXOOB_CLK>,
+ <&gcc SATA_PMALIVE_CLK>;
+ assigned-clock-rates = <100000000>, <100000000>;
+
+ phys = <&sata_phy0>;
+ phy-names = "sata-phy";
+ };
+
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
projects / linux-2.6-microblaze.git / blobdiff