Merge tag 'qcom-dts-for-6.7-2' into arm32-for-6.8

[linux-2.6-microblaze.git] / arch / arm / boot / dts / qcom / qcom-msm8226.dtsi

diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
index 0e480f8..5cd03ea 100644 (file)
--- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
@@ -242,6 +242,17 @@
                        status = "disabled";
                };
 
+               blsp1_uart2: serial@f991e000 {
+                       compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+                       reg = <0xf991e000 0x1000>;
+                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core",
+                                     "iface";
+                       status = "disabled";
+               };
+
                blsp1_uart3: serial@f991f000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0xf991f000 0x1000>;
@@ -325,6 +336,21 @@
                        #size-cells = <0>;
                };
 
+               blsp1_i2c6: i2c@f9928000 {
+                       compatible = "qcom,i2c-qup-v2.1.1";
+                       reg = <0xf9928000 0x1000>;
+                       interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core",
+                                     "iface";
+                       pinctrl-0 = <&blsp1_i2c6_pins>;
+                       pinctrl-names = "default";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                cci: cci@fda0c000 {
                        compatible = "qcom,msm8226-cci";
                        #address-cells = <1>;
@@ -472,6 +498,13 @@
                                bias-disable;
                        };
 
+                       blsp1_i2c6_pins: blsp1-i2c6-state {
+                               pins = "gpio22", "gpio23";
+                               function = "blsp_i2c6";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
                        cci_default: cci-default-state {
                                pins = "gpio29", "gpio30";
                                function = "cci_i2c0";