Merge remote-tracking branch 'regulator/for-5.7' into regulator-linus
[linux-2.6-microblaze.git] / arch / arm / boot / dts / motorola-mapphone-common.dtsi
index 9067e0e..06fbffa 100644 (file)
 };
 
 &mmc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc3_pins>;
        vmmc-supply = <&wl12xx_vmmc>;
        /* uart2_tx.sdmmc3_dat1 pad as wakeirq */
        interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
                >;
        };
 
+       /*
+        * Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3
+        * for gpio_100, but the internal pull makes wlan flakey on some
+        * devices. Off mode value should be tested if we have off mode working
+        * later on.
+        */
+       mmc3_pins: pinmux_mmc3_pins {
+               pinctrl-single,pins = <
+               /* 0x4a10008e gpmc_wait2.gpio_100 d23 */
+               OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
+
+               /* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */
+               OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)
+
+               /* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */
+               OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)
+
+               /* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */
+               OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)
+
+               /* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */
+               OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)
+
+               /* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */
+               OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)
+
+               /* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */
+               OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
+               >;
+       };
+
        /* gpmc_ncs0.gpio_50 */
        poweroff_gpio: pinmux_poweroff_pins {
                pinctrl-single,pins = <
 };
 
 /*
- * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
- * uart1 wakeirq.
+ * The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149
+ * for wake-up events for both the USB PHY and the UART. We can use gpio_149
+ * pad as the shared wakeirq for the UART rather than the RX or CTS pad as we
+ * have gpio_149 trigger before the UART transfer starts.
  */
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart1_pins>;
        interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
-                              &omap4_pmx_core 0xfc>;
+                              &omap4_pmx_core 0x110>;
+       uart-has-rtscts;
+       current-speed = <115200>;
 };
 
 &uart3 {