ARM: dts: stm32: fix dma controller node name on stm32f743

[linux-2.6-microblaze.git] / arch / arm / boot / dts / imx6ull-colibri.dtsi

diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index 1f112ec..6d850d9 100644 (file)
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -54,6 +54,18 @@
        vref-supply = <&reg_module_3v3_avdd>;
 };
 
+&can1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan1>;
+       status = "disabled";
+};
+
+&can2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan2>;
+       status = "disabled";
+};
+
 /* Colibri SPI */
 &ecspi1 {
        cs-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>;
@@ -199,6 +211,12 @@
        assigned-clock-rates = <0>, <198000000>;
 };
 
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+};
+
 &iomuxc {
        pinctrl_can_int: canint-grp {
                fsl,pins = <
@@ -250,6 +268,13 @@
                >;
        };
 
+       pinctrl_flexcan1: flexcan1-grp {
+               fsl,pins = <
+                       MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX   0x1b020
+                       MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX   0x1b020
+               >;
+       };
+
        pinctrl_flexcan2: flexcan2-grp {
                fsl,pins = <
                        MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX   0x1b020
@@ -265,8 +290,6 @@
 
        pinctrl_gpio1: gpio1-grp {
                fsl,pins = <
-                       MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00    0x74 /* SODIMM 55 */
-                       MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01    0x74 /* SODIMM 63 */
                        MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25     0X14 /* SODIMM 77 */
                        MX6UL_PAD_JTAG_TCK__GPIO1_IO14          0x14 /* SODIMM 99 */
                        MX6UL_PAD_NAND_CE1_B__GPIO4_IO14        0x14 /* SODIMM 133 */
@@ -319,6 +342,13 @@
                >;
        };
 
+       pinctrl_gpio7: gpio7-grp { /* CAN1 */
+               fsl,pins = <
+                       MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00    0x74 /* SODIMM 55 */
+                       MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01    0x74 /* SODIMM 63 */
+               >;
+       };
+
        pinctrl_gpmi_nand: gpmi-nand-grp {
                fsl,pins = <
                        MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00   0x100a9
@@ -506,6 +536,12 @@
                        MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT    0x14
                >;
        };
+
+       pinctrl_wdog: wdog-grp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
+               >;
+       };
 };
 
 &iomuxc_snvs {