Merge tag 'acpi-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / imx6ul.dtsi
index 81d4b49..f008036 100644 (file)
                };
        };
 
-       intc: interrupt-controller@a01000 {
-               compatible = "arm,gic-400", "arm,cortex-a7-gic";
-               interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
-               #interrupt-cells = <3>;
-               interrupt-controller;
-               interrupt-parent = <&intc>;
-               reg = <0x00a01000 0x1000>,
-                     <0x00a02000 0x2000>,
-                     <0x00a04000 0x2000>,
-                     <0x00a06000 0x2000>;
-       };
-
        timer {
                compatible = "arm,armv7-timer";
                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
                        reg = <0x00900000 0x20000>;
                };
 
+               intc: interrupt-controller@a01000 {
+                       compatible = "arm,gic-400", "arm,cortex-a7-gic";
+                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       interrupt-parent = <&intc>;
+                       reg = <0x00a01000 0x1000>,
+                             <0x00a02000 0x2000>,
+                             <0x00a04000 0x2000>,
+                             <0x00a06000 0x2000>;
+               };
+
                dma_apbh: dma-apbh@1804000 {
                        compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
                        reg = <0x01804000 0x2000>;
                                        clocks = <&clks IMX6UL_CLK_ECSPI1>,
                                                 <&clks IMX6UL_CLK_ECSPI1>;
                                        clock-names = "ipg", "per";
+                                       dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
+                                       dma-names = "rx", "tx";
                                        status = "disabled";
                                };
 
                                        clocks = <&clks IMX6UL_CLK_ECSPI2>,
                                                 <&clks IMX6UL_CLK_ECSPI2>;
                                        clock-names = "ipg", "per";
+                                       dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
+                                       dma-names = "rx", "tx";
                                        status = "disabled";
                                };
 
                                        clocks = <&clks IMX6UL_CLK_ECSPI3>,
                                                 <&clks IMX6UL_CLK_ECSPI3>;
                                        clock-names = "ipg", "per";
+                                       dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
+                                       dma-names = "rx", "tx";
                                        status = "disabled";
                                };
 
                                        clocks = <&clks IMX6UL_CLK_ECSPI4>,
                                                 <&clks IMX6UL_CLK_ECSPI4>;
                                        clock-names = "ipg", "per";
+                                       dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
+                                       dma-names = "rx", "tx";
                                        status = "disabled";
                                };
 
                                         <&clks IMX6UL_CLK_ENET2_REF_125M>;
                                clock-names = "ipg", "ahb", "ptp",
                                              "enet_clk_ref", "enet_out";
-                               fsl,num-tx-queues=<1>;
-                               fsl,num-rx-queues=<1>;
+                               fsl,num-tx-queues = <1>;
+                               fsl,num-rx-queues = <1>;
                                status = "disabled";
                        };
 
                                         <&clks IMX6UL_CLK_ENET_REF>;
                                clock-names = "ipg", "ahb", "ptp",
                                              "enet_clk_ref", "enet_out";
-                               fsl,num-tx-queues=<1>;
-                               fsl,num-rx-queues=<1>;
+                               fsl,num-tx-queues = <1>;
+                               fsl,num-rx-queues = <1>;
                                status = "disabled";
                        };
 
                                         <&clks IMX6UL_CLK_USDHC1>,
                                         <&clks IMX6UL_CLK_USDHC1>;
                                clock-names = "ipg", "ahb", "per";
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                fsl,tuning-start-tap = <20>;
                                bus-width = <4>;
                                status = "disabled";
                                         <&clks IMX6UL_CLK_USDHC2>;
                                clock-names = "ipg", "ahb", "per";
                                bus-width = <4>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                fsl,tuning-start-tap = <20>;
                                status = "disabled";
                        };
                                };
                        };
 
+                       csi: csi@21c4000 {
+                               compatible = "fsl,imx6ul-csi", "fsl,imx7-csi";
+                               reg = <0x021c4000 0x4000>;
+                               interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_CSI>;
+                               clock-names = "mclk";
+                               status = "disabled";
+                       };
+
                        lcdif: lcdif@21c8000 {
                                compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
                                reg = <0x021c8000 0x4000>;