ARM: dts: imx: Align L2 cache-controller nodename with dtschema

[linux-2.6-microblaze.git] / arch / arm / boot / dts / imx6sx.dtsi

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index fcb3d06..939fda9 100644 (file)
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -179,7 +179,7 @@
                        interrupt-parent = <&intc>;
                };
 
-               L2: l2-cache@a02000 {
+               L2: cache-controller@a02000 {
                        compatible = "arm,pl310-cache";
                        reg = <0x00a02000 0x1000>;
                        interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;