Merge tag 'ext4_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso...

[linux-2.6-microblaze.git] / arch / arm / boot / dts / exynos4210.dtsi

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index b491c34..f220716 100644 (file)
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -8,7 +8,7 @@
  *             www.linaro.org
  *
  * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
@@ -381,13 +381,13 @@
 
                        trips {
                                cpu_alert0: cpu-alert-0 {
-                               temperature = <85000>; /* millicelsius */
+                                       temperature = <85000>; /* millicelsius */
                                };
                                cpu_alert1: cpu-alert-1 {
-                               temperature = <100000>; /* millicelsius */
+                                       temperature = <100000>; /* millicelsius */
                                };
                                cpu_alert2: cpu-alert-2 {
-                               temperature = <110000>; /* millicelsius */
+                                       temperature = <110000>; /* millicelsius */
                                };
                        };
                };
@@ -449,6 +449,43 @@
        samsung,lcd-wb;
 };
 
+&gpu {
+       interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+                    <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+       interrupt-names = "gp",
+                         "gpmmu",
+                         "pp0",
+                         "ppmmu0",
+                         "pp1",
+                         "ppmmu1",
+                         "pp2",
+                         "ppmmu2",
+                         "pp3",
+                         "ppmmu3";
+       operating-points-v2 = <&gpu_opp_table>;
+
+       gpu_opp_table: opp_table {
+               compatible = "operating-points-v2";
+
+               opp-160000000 {
+                       opp-hz = /bits/ 64 <160000000>;
+                       opp-microvolt = <950000>;
+               };
+               opp-267000000 {
+                       opp-hz = /bits/ 64 <267000000>;
+                       opp-microvolt = <1050000>;
+               };
+       };
+};
+
 &mdma1 {
        power-domains = <&pd_lcd0>;
 };
@@ -461,6 +498,12 @@
                 <&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
 };
 
+&pmu {
+       interrupts = <2 2>, <3 2>;
+       interrupt-affinity = <&cpu0>, <&cpu1>;
+       status = "okay";
+};
+
 &pmu_system_controller {
        clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
                        "clkout4", "clkout8", "clkout9";