ARM: 8270/1: ks8695: Migrate debug_ll macros to shared directory

[linux-2.6-microblaze.git] / arch / arm / Kconfig.debug

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index f9295a4..eba36e3 100644 (file)
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -397,6 +397,13 @@ choice
                  Say Y here if you want the debug print routines to direct
                  their output to UART1 serial port on KEYSTONE2 devices.
 
+       config DEBUG_KS8695_UART
+               bool "KS8695 Debug UART"
+               depends on ARCH_KS8695
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on KS8695.
+
        config DEBUG_MESON_UARTAO
                bool "Kernel low-level debugging via Meson6 UARTAO"
                depends on ARCH_MESON
@@ -1031,15 +1038,6 @@ choice
                  This option selects UART0 on VIA/Wondermedia System-on-a-chip
                  devices, including VT8500, WM8505, WM8650 and WM8850.
 
-       config DEBUG_LL_UART_NONE
-               bool "No low-level debugging UART"
-               depends on !ARCH_MULTIPLATFORM
-               help
-                 Say Y here if your platform doesn't provide a UART option
-                 above. This relies on your platform choosing the right UART
-                 definition internally in order for low-level debugging to
-                 work.
-
        config DEBUG_ICEDCC
                bool "Kernel low-level debugging via EmbeddedICE DCC channel"
                help
@@ -1183,6 +1181,7 @@ config DEBUG_LL_INCLUDE
                                 DEBUG_IMX6Q_UART || \
                                 DEBUG_IMX6SL_UART || \
                                 DEBUG_IMX6SX_UART
+       default "debug/ks8695.S" if DEBUG_KS8695_UART
        default "debug/msm.S" if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM
        default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
        default "debug/renesas-scif.S" if DEBUG_R7S72100_SCIF2
@@ -1269,7 +1268,6 @@ config DEBUG_UART_PHYS
                                DEBUG_S3C2410_UART2)
        default 0x78000000 if DEBUG_CNS3XXX
        default 0x7c0003f8 if FOOTBRIDGE
-       default 0x78000000 if DEBUG_CNS3XXX
        default 0x80010000 if DEBUG_ASM9260_UART
        default 0x80070000 if DEBUG_IMX23_UART
        default 0x80074000 if DEBUG_IMX28_UART
@@ -1452,14 +1450,6 @@ config EARLY_PRINTK
          kernel low-level debugging functions. Add earlyprintk to your
          kernel parameters to enable this console.
 
-config OC_ETM
-       bool "On-chip ETM and ETB"
-       depends on ARM_AMBA
-       help
-         Enables the on-chip embedded trace macrocell and embedded trace
-         buffer driver that will allow you to collect traces of the
-         kernel code.
-
 config ARM_KPROBES_TEST
        tristate "Kprobes test module"
        depends on KPROBES && MODULES
@@ -1486,4 +1476,59 @@ config DEBUG_SET_MODULE_RONX
          against certain classes of kernel exploits.
          If in doubt, say "N".
 
+menuconfig CORESIGHT
+       bool "CoreSight Tracing Support"
+       select ARM_AMBA
+       help
+         This framework provides a kernel interface for the CoreSight debug
+         and trace drivers to register themselves with. It's intended to build
+         a topological view of the CoreSight components based on a DT
+         specification and configure the right serie of components when a
+         trace source gets enabled.
+
+if CORESIGHT
+config CORESIGHT_LINKS_AND_SINKS
+       bool "CoreSight Link and Sink drivers"
+       help
+         This enables support for CoreSight link and sink drivers that are
+         responsible for transporting and collecting the trace data
+         respectively.  Link and sinks are dynamically aggregated with a trace
+         entity at run time to form a complete trace path.
+
+config CORESIGHT_LINK_AND_SINK_TMC
+       bool "Coresight generic TMC driver"
+       depends on CORESIGHT_LINKS_AND_SINKS
+       help
+         This enables support for the Trace Memory Controller driver.  Depending
+         on its configuration the device can act as a link (embedded trace router
+         - ETR) or sink (embedded trace FIFO).  The driver complies with the
+         generic implementation of the component without special enhancement or
+         added features.
+
+config CORESIGHT_SINK_TPIU
+       bool "Coresight generic TPIU driver"
+       depends on CORESIGHT_LINKS_AND_SINKS
+       help
+         This enables support for the Trace Port Interface Unit driver, responsible
+         for bridging the gap between the on-chip coresight components and a trace
+         port collection engine, typically connected to an external host for use
+         case capturing more traces than the on-board coresight memory can handle.
+
+config CORESIGHT_SINK_ETBV10
+       bool "Coresight ETBv1.0 driver"
+       depends on CORESIGHT_LINKS_AND_SINKS
+       help
+         This enables support for the Embedded Trace Buffer version 1.0 driver
+         that complies with the generic implementation of the component without
+         special enhancement or added features.
+
+config CORESIGHT_SOURCE_ETM3X
+       bool "CoreSight Embedded Trace Macrocell 3.x driver"
+       select CORESIGHT_LINKS_AND_SINKS
+       help
+         This driver provides support for processor ETM3.x and PTM1.x modules,
+         which allows tracing the instructions that a processor is executing
+         This is primarily useful for instruction level tracing.  Depending
+         the ETM version data tracing may also be available.
+endif
 endmenu