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Merge tag 'amd-drm-next-5.14-2021-06-02' of https://gitlab.freedesktop.org/agd5f...
[linux-2.6-microblaze.git]
/
drivers
/
gpu
/
drm
/
amd
/
amdgpu
/
gmc_v10_0.c
diff --git
a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index
498b28a
..
db154bf
100644
(file)
--- a/
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@
-229,6
+229,10
@@
static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
/* Use register 17 for GART */
const unsigned eng = 17;
unsigned int i;
/* Use register 17 for GART */
const unsigned eng = 17;
unsigned int i;
+ unsigned char hub_ip = 0;
+
+ hub_ip = (vmhub == AMDGPU_GFXHUB_0) ?
+ GC_HWIP : MMHUB_HWIP;
spin_lock(&adev->gmc.invalidate_lock);
/*
spin_lock(&adev->gmc.invalidate_lock);
/*
@@
-242,8
+246,9
@@
static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
if (use_semaphore) {
for (i = 0; i < adev->usec_timeout; i++) {
/* a read return value of 1 means semaphore acuqire */
if (use_semaphore) {
for (i = 0; i < adev->usec_timeout; i++) {
/* a read return value of 1 means semaphore acuqire */
- tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem +
- hub->eng_distance * eng);
+ tmp = RREG32_RLC_NO_KIQ(hub->vm_inv_eng0_sem +
+ hub->eng_distance * eng, hub_ip);
+
if (tmp & 0x1)
break;
udelay(1);
if (tmp & 0x1)
break;
udelay(1);
@@
-253,7
+258,9
@@
static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
DRM_ERROR("Timeout waiting for sem acquire in VM flush!\n");
}
DRM_ERROR("Timeout waiting for sem acquire in VM flush!\n");
}
- WREG32_NO_KIQ(hub->vm_inv_eng0_req + hub->eng_distance * eng, inv_req);
+ WREG32_RLC_NO_KIQ(hub->vm_inv_eng0_req +
+ hub->eng_distance * eng,
+ inv_req, hub_ip);
/*
* Issue a dummy read to wait for the ACK register to be cleared
/*
* Issue a dummy read to wait for the ACK register to be cleared
@@
-261,12
+268,14
@@
static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
*/
if ((vmhub == AMDGPU_GFXHUB_0) &&
(adev->asic_type < CHIP_SIENNA_CICHLID))
*/
if ((vmhub == AMDGPU_GFXHUB_0) &&
(adev->asic_type < CHIP_SIENNA_CICHLID))
- RREG32_NO_KIQ(hub->vm_inv_eng0_req + hub->eng_distance * eng);
+ RREG32_RLC_NO_KIQ(hub->vm_inv_eng0_req +
+ hub->eng_distance * eng, hub_ip);
/* Wait for ACK with a delay.*/
for (i = 0; i < adev->usec_timeout; i++) {
/* Wait for ACK with a delay.*/
for (i = 0; i < adev->usec_timeout; i++) {
- tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack +
- hub->eng_distance * eng);
+ tmp = RREG32_RLC_NO_KIQ(hub->vm_inv_eng0_ack +
+ hub->eng_distance * eng, hub_ip);
+
tmp &= 1 << vmid;
if (tmp)
break;
tmp &= 1 << vmid;
if (tmp)
break;
@@
-280,15
+289,15
@@
static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
* add semaphore release after invalidation,
* write with 0 means semaphore release
*/
* add semaphore release after invalidation,
* write with 0 means semaphore release
*/
- WREG32_NO_KIQ(hub->vm_inv_eng0_sem +
-
hub->eng_distance * eng, 0
);
+ WREG32_
RLC_
NO_KIQ(hub->vm_inv_eng0_sem +
+
hub->eng_distance * eng, 0, hub_ip
);
spin_unlock(&adev->gmc.invalidate_lock);
if (i < adev->usec_timeout)
return;
spin_unlock(&adev->gmc.invalidate_lock);
if (i < adev->usec_timeout)
return;
- DRM_ERROR("Timeout waiting for VM flush
ACK!\n"
);
+ DRM_ERROR("Timeout waiting for VM flush
hub: %d!\n", vmhub
);
}
/**
}
/**
@@
-681,6
+690,7
@@
static void gmc_v10_0_set_gfxhub_funcs(struct amdgpu_device *adev)
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
+ case CHIP_BEIGE_GOBY:
adev->gfxhub.funcs = &gfxhub_v2_1_funcs;
break;
default:
adev->gfxhub.funcs = &gfxhub_v2_1_funcs;
break;
default:
@@
-796,6
+806,7
@@
static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
+ case CHIP_BEIGE_GOBY:
default:
adev->gmc.gart_size = 512ULL << 20;
break;
default:
adev->gmc.gart_size = 512ULL << 20;
break;
@@
-863,6
+874,7
@@
static int gmc_v10_0_sw_init(void *handle)
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
+ case CHIP_BEIGE_GOBY:
adev->num_vmhubs = 2;
/*
* To fulfill 4-level page support,
adev->num_vmhubs = 2;
/*
* To fulfill 4-level page support,
@@
-944,7
+956,7
@@
static int gmc_v10_0_sw_init(void *handle)
}
/**
}
/**
- * gmc_v
8
_0_gart_fini - vm fini callback
+ * gmc_v
10
_0_gart_fini - vm fini callback
*
* @adev: amdgpu_device pointer
*
*
* @adev: amdgpu_device pointer
*
@@
-953,7
+965,6
@@
static int gmc_v10_0_sw_init(void *handle)
static void gmc_v10_0_gart_fini(struct amdgpu_device *adev)
{
amdgpu_gart_table_vram_free(adev);
static void gmc_v10_0_gart_fini(struct amdgpu_device *adev)
{
amdgpu_gart_table_vram_free(adev);
- amdgpu_gart_fini(adev);
}
static int gmc_v10_0_sw_fini(void *handle)
}
static int gmc_v10_0_sw_fini(void *handle)
@@
-978,6
+989,7
@@
static void gmc_v10_0_init_golden_registers(struct amdgpu_device *adev)
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
+ case CHIP_BEIGE_GOBY:
break;
default:
break;
break;
default:
break;