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Merge branch 'linux-4.18' of git://github.com/skeggsb/linux into drm-fixes
[linux-2.6-microblaze.git]
/
drivers
/
clk
/
qcom
/
clk-alpha-pll.h
diff --git
a/drivers/clk/qcom/clk-alpha-pll.h
b/drivers/clk/qcom/clk-alpha-pll.h
index
7593e8a
..
f981b48
100644
(file)
--- a/
drivers/clk/qcom/clk-alpha-pll.h
+++ b/
drivers/clk/qcom/clk-alpha-pll.h
@@
-1,5
+1,5
@@
/*
/*
- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015,
2018,
The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@
-22,6
+22,7
@@
enum {
CLK_ALPHA_PLL_TYPE_DEFAULT,
CLK_ALPHA_PLL_TYPE_HUAYRA,
CLK_ALPHA_PLL_TYPE_BRAMMO,
CLK_ALPHA_PLL_TYPE_DEFAULT,
CLK_ALPHA_PLL_TYPE_HUAYRA,
CLK_ALPHA_PLL_TYPE_BRAMMO,
+ CLK_ALPHA_PLL_TYPE_FABIA,
CLK_ALPHA_PLL_TYPE_MAX,
};
CLK_ALPHA_PLL_TYPE_MAX,
};
@@
-36,6
+37,8
@@
enum {
PLL_OFF_TEST_CTL,
PLL_OFF_TEST_CTL_U,
PLL_OFF_STATUS,
PLL_OFF_TEST_CTL,
PLL_OFF_TEST_CTL_U,
PLL_OFF_STATUS,
+ PLL_OFF_OPMODE,
+ PLL_OFF_FRAC,
PLL_OFF_MAX_REGS
};
PLL_OFF_MAX_REGS
};
@@
-73,6
+76,10
@@
struct clk_alpha_pll {
* @offset: base address of registers
* @regs: alpha pll register map (see @clk_alpha_pll_regs)
* @width: width of post-divider
* @offset: base address of registers
* @regs: alpha pll register map (see @clk_alpha_pll_regs)
* @width: width of post-divider
+ * @post_div_shift: shift to differentiate between odd & even post-divider
+ * @post_div_table: table with PLL odd and even post-divider settings
+ * @num_post_div: Number of PLL post-divider settings
+ *
* @clkr: regmap clock handle
*/
struct clk_alpha_pll_postdiv {
* @clkr: regmap clock handle
*/
struct clk_alpha_pll_postdiv {
@@
-81,6
+88,9
@@
struct clk_alpha_pll_postdiv {
const u8 *regs;
struct clk_regmap clkr;
const u8 *regs;
struct clk_regmap clkr;
+ int post_div_shift;
+ const struct clk_div_table *post_div_table;
+ size_t num_post_div;
};
struct alpha_pll_config {
};
struct alpha_pll_config {
@@
-109,7
+119,13
@@
extern const struct clk_ops clk_alpha_pll_postdiv_ops;
extern const struct clk_ops clk_alpha_pll_huayra_ops;
extern const struct clk_ops clk_alpha_pll_postdiv_ro_ops;
extern const struct clk_ops clk_alpha_pll_huayra_ops;
extern const struct clk_ops clk_alpha_pll_postdiv_ro_ops;
+extern const struct clk_ops clk_alpha_pll_fabia_ops;
+extern const struct clk_ops clk_alpha_pll_fixed_fabia_ops;
+extern const struct clk_ops clk_alpha_pll_postdiv_fabia_ops;
+
void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
const struct alpha_pll_config *config);
void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
const struct alpha_pll_config *config);
+void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
+ const struct alpha_pll_config *config);
#endif
#endif