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Merge tag 'docs-5.15' of git://git.lwn.net/linux
[linux-2.6-microblaze.git]
/
arch
/
arm64
/
boot
/
dts
/
qcom
/
sdm845.dtsi
diff --git
a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index
0a86fe7
..
6d7172e
100644
(file)
--- a/
arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/
arch/arm64/boot/dts/qcom/sdm845.dtsi
@@
-128,28
+128,23
@@
no-map;
};
no-map;
};
-
ipa_fw
_mem: memory@8c400000 {
- reg = <0 0x8c400000 0 0x10000>;
+
wlan_msa
_mem: memory@8c400000 {
+ reg = <0 0x8c400000 0 0x10000
0
>;
no-map;
};
no-map;
};
-
ipa_gsi_mem: memory@8c410
000 {
- reg = <0 0x8c
410000 0 0x5
000>;
+
gpu_mem: memory@8c515
000 {
+ reg = <0 0x8c
515000 0 0x2
000>;
no-map;
};
no-map;
};
-
gpu_mem: memory@8c415
000 {
- reg = <0 0x8c
415000 0 0x2
000>;
+
ipa_fw_mem: memory@8c517
000 {
+ reg = <0 0x8c
517000 0 0x5a
000>;
no-map;
};
no-map;
};
- adsp_mem: memory@8c500000 {
- reg = <0 0x8c500000 0 0x1a00000>;
- no-map;
- };
-
- wlan_msa_mem: memory@8df00000 {
- reg = <0 0x8df00000 0 0x100000>;
+ adsp_mem: memory@8c600000 {
+ reg = <0 0x8c600000 0 0x1a00000>;
no-map;
};
no-map;
};
@@
-4148,9
+4143,8
@@
power-domains = <&dispcc MDSS_GDSC>;
clocks = <&gcc GCC_DISP_AHB_CLK>,
power-domains = <&dispcc MDSS_GDSC>;
clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&gcc GCC_DISP_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>;
<&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "
bus", "
core";
+ clock-names = "iface", "core";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
assigned-clock-rates = <300000000>;
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
assigned-clock-rates = <300000000>;
@@
-4178,11
+4172,12
@@
<0 0x0aeb0000 0 0x2008>;
reg-names = "mdp", "vbif";
<0 0x0aeb0000 0 0x2008>;
reg-names = "mdp", "vbif";
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ clocks = <&gcc GCC_DISP_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
<&dispcc DISP_CC_MDSS_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "core", "vsync";
+ clock-names = "
gcc-bus", "
iface", "bus", "core", "vsync";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
@@
-4260,6
+4255,9
@@
"core",
"iface",
"bus";
"core",
"iface",
"bus";
+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
+ assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
+
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SDM845_CX>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SDM845_CX>;
@@
-4326,6
+4324,9
@@
"core",
"iface",
"bus";
"core",
"iface",
"bus";
+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
+ assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
+
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SDM845_CX>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SDM845_CX>;