# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Display DPU dt properties for SC7280 maintainers: - Krishna Manikandan description: | Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree bindings of MDSS and DPU are mentioned for SC7280. $ref: /schemas/display/msm/mdss-common.yaml# properties: compatible: const: qcom,sc7280-mdss clocks: items: - description: Display AHB clock from gcc - description: Display AHB clock from dispcc - description: Display core clock clock-names: items: - const: iface - const: ahb - const: core iommus: maxItems: 1 interconnects: maxItems: 1 interconnect-names: maxItems: 1 patternProperties: "^display-controller@[0-9a-f]+$": type: object $ref: /schemas/display/msm/dpu-common.yaml# description: Node containing the properties of DPU. unevaluatedProperties: false properties: compatible: const: qcom,sc7280-dpu reg: items: - description: Address offset and size for mdp register set - description: Address offset and size for vbif register set reg-names: items: - const: mdp - const: vbif clocks: items: - description: Display hf axi clock - description: Display sf axi clock - description: Display ahb clock - description: Display lut clock - description: Display core clock - description: Display vsync clock clock-names: items: - const: bus - const: nrt_bus - const: iface - const: lut - const: core - const: vsync unevaluatedProperties: false examples: - | #include #include #include #include #include display-subsystem@ae00000 { #address-cells = <1>; #size-cells = <1>; compatible = "qcom,sc7280-mdss"; reg = <0xae00000 0x1000>; reg-names = "mdss"; power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>; clocks = <&gcc GCC_DISP_AHB_CLK>, <&dispcc DISP_CC_MDSS_AHB_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>; clock-names = "iface", "ahb", "core"; interrupts = ; interrupt-controller; #interrupt-cells = <1>; interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; interconnect-names = "mdp0-mem"; iommus = <&apps_smmu 0x900 0x402>; ranges; display-controller@ae01000 { compatible = "qcom,sc7280-dpu"; reg = <0x0ae01000 0x8f000>, <0x0aeb0000 0x2008>; reg-names = "mdp", "vbif"; clocks = <&gcc GCC_DISP_HF_AXI_CLK>, <&gcc GCC_DISP_SF_AXI_CLK>, <&dispcc DISP_CC_MDSS_AHB_CLK>, <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>, <&dispcc DISP_CC_MDSS_VSYNC_CLK>; clock-names = "bus", "nrt_bus", "iface", "lut", "core", "vsync"; interrupt-parent = <&mdss>; interrupts = <0>; power-domains = <&rpmhpd SC7280_CX>; operating-points-v2 = <&mdp_opp_table>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dpu_intf1_out: endpoint { remote-endpoint = <&dsi0_in>; }; }; port@1 { reg = <1>; dpu_intf5_out: endpoint { remote-endpoint = <&edp_in>; }; }; }; }; }; ...