1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015, 2016 ARM Ltd.
6 #include <linux/interrupt.h>
9 #include <linux/kvm_host.h>
10 #include <linux/list_sort.h>
11 #include <linux/nospec.h>
13 #include <asm/kvm_hyp.h>
17 #define CREATE_TRACE_POINTS
20 struct vgic_global kvm_vgic_global_state __ro_after_init = {
21 .gicv3_cpuif = STATIC_KEY_FALSE_INIT,
25 * Locking order is always:
27 * its->cmd_lock (mutex)
28 * its->its_lock (mutex)
29 * vgic_cpu->ap_list_lock must be taken with IRQs disabled
30 * kvm->lpi_list_lock must be taken with IRQs disabled
31 * vgic_irq->irq_lock must be taken with IRQs disabled
33 * As the ap_list_lock might be taken from the timer interrupt handler,
34 * we have to disable IRQs before taking this lock and everything lower
37 * If you need to take multiple locks, always take the upper lock first,
38 * then the lower ones, e.g. first take the its_lock, then the irq_lock.
39 * If you are already holding a lock and need to take a higher one, you
40 * have to drop the lower ranking lock first and re-aquire it after having
41 * taken the upper one.
43 * When taking more than one ap_list_lock at the same time, always take the
44 * lowest numbered VCPU's ap_list_lock first, so:
45 * vcpuX->vcpu_id < vcpuY->vcpu_id:
46 * raw_spin_lock(vcpuX->arch.vgic_cpu.ap_list_lock);
47 * raw_spin_lock(vcpuY->arch.vgic_cpu.ap_list_lock);
49 * Since the VGIC must support injecting virtual interrupts from ISRs, we have
50 * to use the raw_spin_lock_irqsave/raw_spin_unlock_irqrestore versions of outer
51 * spinlocks for any lock that may be taken while injecting an interrupt.
55 * Iterate over the VM's list of mapped LPIs to find the one with a
56 * matching interrupt ID and return a reference to the IRQ structure.
58 static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid)
60 struct vgic_dist *dist = &kvm->arch.vgic;
61 struct vgic_irq *irq = NULL;
64 raw_spin_lock_irqsave(&dist->lpi_list_lock, flags);
66 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
67 if (irq->intid != intid)
71 * This increases the refcount, the caller is expected to
72 * call vgic_put_irq() later once it's finished with the IRQ.
74 vgic_get_irq_kref(irq);
80 raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags);
86 * This looks up the virtual interrupt ID to get the corresponding
87 * struct vgic_irq. It also increases the refcount, so any caller is expected
88 * to call vgic_put_irq() once it's finished with this IRQ.
90 struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,
94 if (intid <= VGIC_MAX_PRIVATE) {
95 intid = array_index_nospec(intid, VGIC_MAX_PRIVATE + 1);
96 return &vcpu->arch.vgic_cpu.private_irqs[intid];
100 if (intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) {
101 intid = array_index_nospec(intid, kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS);
102 return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS];
106 if (intid >= VGIC_MIN_LPI)
107 return vgic_get_lpi(kvm, intid);
109 WARN(1, "Looking up struct vgic_irq for reserved INTID");
114 * We can't do anything in here, because we lack the kvm pointer to
115 * lock and remove the item from the lpi_list. So we keep this function
116 * empty and use the return value of kref_put() to trigger the freeing.
118 static void vgic_irq_release(struct kref *ref)
122 void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)
124 struct vgic_dist *dist = &kvm->arch.vgic;
127 if (irq->intid < VGIC_MIN_LPI)
130 raw_spin_lock_irqsave(&dist->lpi_list_lock, flags);
131 if (!kref_put(&irq->refcount, vgic_irq_release)) {
132 raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags);
136 list_del(&irq->lpi_list);
137 dist->lpi_list_count--;
138 raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags);
143 void vgic_flush_pending_lpis(struct kvm_vcpu *vcpu)
145 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
146 struct vgic_irq *irq, *tmp;
149 raw_spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags);
151 list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) {
152 if (irq->intid >= VGIC_MIN_LPI) {
153 raw_spin_lock(&irq->irq_lock);
154 list_del(&irq->ap_list);
156 raw_spin_unlock(&irq->irq_lock);
157 vgic_put_irq(vcpu->kvm, irq);
161 raw_spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags);
164 void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending)
166 WARN_ON(irq_set_irqchip_state(irq->host_irq,
167 IRQCHIP_STATE_PENDING,
171 bool vgic_get_phys_line_level(struct vgic_irq *irq)
177 if (irq->get_input_level)
178 return irq->get_input_level(irq->intid);
180 WARN_ON(irq_get_irqchip_state(irq->host_irq,
181 IRQCHIP_STATE_PENDING,
186 /* Set/Clear the physical active state */
187 void vgic_irq_set_phys_active(struct vgic_irq *irq, bool active)
191 WARN_ON(irq_set_irqchip_state(irq->host_irq,
192 IRQCHIP_STATE_ACTIVE,
197 * kvm_vgic_target_oracle - compute the target vcpu for an irq
199 * @irq: The irq to route. Must be already locked.
201 * Based on the current state of the interrupt (enabled, pending,
202 * active, vcpu and target_vcpu), compute the next vcpu this should be
203 * given to. Return NULL if this shouldn't be injected at all.
205 * Requires the IRQ lock to be held.
207 static struct kvm_vcpu *vgic_target_oracle(struct vgic_irq *irq)
209 lockdep_assert_held(&irq->irq_lock);
211 /* If the interrupt is active, it must stay on the current vcpu */
213 return irq->vcpu ? : irq->target_vcpu;
216 * If the IRQ is not active but enabled and pending, we should direct
217 * it to its configured target VCPU.
218 * If the distributor is disabled, pending interrupts shouldn't be
221 if (irq->enabled && irq_is_pending(irq)) {
222 if (unlikely(irq->target_vcpu &&
223 !irq->target_vcpu->kvm->arch.vgic.enabled))
226 return irq->target_vcpu;
229 /* If neither active nor pending and enabled, then this IRQ should not
230 * be queued to any VCPU.
236 * The order of items in the ap_lists defines how we'll pack things in LRs as
237 * well, the first items in the list being the first things populated in the
240 * A hard rule is that active interrupts can never be pushed out of the LRs
241 * (and therefore take priority) since we cannot reliably trap on deactivation
242 * of IRQs and therefore they have to be present in the LRs.
244 * Otherwise things should be sorted by the priority field and the GIC
245 * hardware support will take care of preemption of priority groups etc.
247 * Return negative if "a" sorts before "b", 0 to preserve order, and positive
248 * to sort "b" before "a".
250 static int vgic_irq_cmp(void *priv, struct list_head *a, struct list_head *b)
252 struct vgic_irq *irqa = container_of(a, struct vgic_irq, ap_list);
253 struct vgic_irq *irqb = container_of(b, struct vgic_irq, ap_list);
258 * list_sort may call this function with the same element when
259 * the list is fairly long.
261 if (unlikely(irqa == irqb))
264 raw_spin_lock(&irqa->irq_lock);
265 raw_spin_lock_nested(&irqb->irq_lock, SINGLE_DEPTH_NESTING);
267 if (irqa->active || irqb->active) {
268 ret = (int)irqb->active - (int)irqa->active;
272 penda = irqa->enabled && irq_is_pending(irqa);
273 pendb = irqb->enabled && irq_is_pending(irqb);
275 if (!penda || !pendb) {
276 ret = (int)pendb - (int)penda;
280 /* Both pending and enabled, sort by priority */
281 ret = irqa->priority - irqb->priority;
283 raw_spin_unlock(&irqb->irq_lock);
284 raw_spin_unlock(&irqa->irq_lock);
288 /* Must be called with the ap_list_lock held */
289 static void vgic_sort_ap_list(struct kvm_vcpu *vcpu)
291 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
293 lockdep_assert_held(&vgic_cpu->ap_list_lock);
295 list_sort(NULL, &vgic_cpu->ap_list_head, vgic_irq_cmp);
299 * Only valid injection if changing level for level-triggered IRQs or for a
300 * rising edge, and in-kernel connected IRQ lines can only be controlled by
303 static bool vgic_validate_injection(struct vgic_irq *irq, bool level, void *owner)
305 if (irq->owner != owner)
308 switch (irq->config) {
309 case VGIC_CONFIG_LEVEL:
310 return irq->line_level != level;
311 case VGIC_CONFIG_EDGE:
319 * Check whether an IRQ needs to (and can) be queued to a VCPU's ap list.
320 * Do the queuing if necessary, taking the right locks in the right order.
321 * Returns true when the IRQ was queued, false otherwise.
323 * Needs to be entered with the IRQ lock already held, but will return
324 * with all locks dropped.
326 bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq,
329 struct kvm_vcpu *vcpu;
331 lockdep_assert_held(&irq->irq_lock);
334 vcpu = vgic_target_oracle(irq);
335 if (irq->vcpu || !vcpu) {
337 * If this IRQ is already on a VCPU's ap_list, then it
338 * cannot be moved or modified and there is no more work for
341 * Otherwise, if the irq is not pending and enabled, it does
342 * not need to be inserted into an ap_list and there is also
343 * no more work for us to do.
345 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
348 * We have to kick the VCPU here, because we could be
349 * queueing an edge-triggered interrupt for which we
350 * get no EOI maintenance interrupt. In that case,
351 * while the IRQ is already on the VCPU's AP list, the
352 * VCPU could have EOI'ed the original interrupt and
353 * won't see this one until it exits for some other
357 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
364 * We must unlock the irq lock to take the ap_list_lock where
365 * we are going to insert this new pending interrupt.
367 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
369 /* someone can do stuff here, which we re-check below */
371 raw_spin_lock_irqsave(&vcpu->arch.vgic_cpu.ap_list_lock, flags);
372 raw_spin_lock(&irq->irq_lock);
375 * Did something change behind our backs?
377 * There are two cases:
378 * 1) The irq lost its pending state or was disabled behind our
379 * backs and/or it was queued to another VCPU's ap_list.
380 * 2) Someone changed the affinity on this irq behind our
381 * backs and we are now holding the wrong ap_list_lock.
383 * In both cases, drop the locks and retry.
386 if (unlikely(irq->vcpu || vcpu != vgic_target_oracle(irq))) {
387 raw_spin_unlock(&irq->irq_lock);
388 raw_spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock,
391 raw_spin_lock_irqsave(&irq->irq_lock, flags);
396 * Grab a reference to the irq to reflect the fact that it is
397 * now in the ap_list.
399 vgic_get_irq_kref(irq);
400 list_add_tail(&irq->ap_list, &vcpu->arch.vgic_cpu.ap_list_head);
403 raw_spin_unlock(&irq->irq_lock);
404 raw_spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags);
406 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
413 * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic
414 * @kvm: The VM structure pointer
415 * @cpuid: The CPU for PPIs
416 * @intid: The INTID to inject a new state to.
417 * @level: Edge-triggered: true: to trigger the interrupt
418 * false: to ignore the call
419 * Level-sensitive true: raise the input signal
420 * false: lower the input signal
421 * @owner: The opaque pointer to the owner of the IRQ being raised to verify
422 * that the caller is allowed to inject this IRQ. Userspace
423 * injections will have owner == NULL.
425 * The VGIC is not concerned with devices being active-LOW or active-HIGH for
426 * level-sensitive interrupts. You can think of the level parameter as 1
427 * being HIGH and 0 being LOW and all devices being active-HIGH.
429 int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
430 bool level, void *owner)
432 struct kvm_vcpu *vcpu;
433 struct vgic_irq *irq;
437 trace_vgic_update_irq_pending(cpuid, intid, level);
439 ret = vgic_lazy_init(kvm);
443 vcpu = kvm_get_vcpu(kvm, cpuid);
444 if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS)
447 irq = vgic_get_irq(kvm, vcpu, intid);
451 raw_spin_lock_irqsave(&irq->irq_lock, flags);
453 if (!vgic_validate_injection(irq, level, owner)) {
454 /* Nothing to see here, move along... */
455 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
456 vgic_put_irq(kvm, irq);
460 if (irq->config == VGIC_CONFIG_LEVEL)
461 irq->line_level = level;
463 irq->pending_latch = true;
465 vgic_queue_irq_unlock(kvm, irq, flags);
466 vgic_put_irq(kvm, irq);
471 /* @irq->irq_lock must be held */
472 static int kvm_vgic_map_irq(struct kvm_vcpu *vcpu, struct vgic_irq *irq,
473 unsigned int host_irq,
474 bool (*get_input_level)(int vindid))
476 struct irq_desc *desc;
477 struct irq_data *data;
480 * Find the physical IRQ number corresponding to @host_irq
482 desc = irq_to_desc(host_irq);
484 kvm_err("%s: no interrupt descriptor\n", __func__);
487 data = irq_desc_get_irq_data(desc);
488 while (data->parent_data)
489 data = data->parent_data;
492 irq->host_irq = host_irq;
493 irq->hwintid = data->hwirq;
494 irq->get_input_level = get_input_level;
498 /* @irq->irq_lock must be held */
499 static inline void kvm_vgic_unmap_irq(struct vgic_irq *irq)
503 irq->get_input_level = NULL;
506 int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,
507 u32 vintid, bool (*get_input_level)(int vindid))
509 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
515 raw_spin_lock_irqsave(&irq->irq_lock, flags);
516 ret = kvm_vgic_map_irq(vcpu, irq, host_irq, get_input_level);
517 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
518 vgic_put_irq(vcpu->kvm, irq);
524 * kvm_vgic_reset_mapped_irq - Reset a mapped IRQ
525 * @vcpu: The VCPU pointer
526 * @vintid: The INTID of the interrupt
528 * Reset the active and pending states of a mapped interrupt. Kernel
529 * subsystems injecting mapped interrupts should reset their interrupt lines
530 * when we are doing a reset of the VM.
532 void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid)
534 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
540 raw_spin_lock_irqsave(&irq->irq_lock, flags);
542 irq->pending_latch = false;
543 irq->line_level = false;
544 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
546 vgic_put_irq(vcpu->kvm, irq);
549 int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid)
551 struct vgic_irq *irq;
554 if (!vgic_initialized(vcpu->kvm))
557 irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
560 raw_spin_lock_irqsave(&irq->irq_lock, flags);
561 kvm_vgic_unmap_irq(irq);
562 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
563 vgic_put_irq(vcpu->kvm, irq);
569 * kvm_vgic_set_owner - Set the owner of an interrupt for a VM
571 * @vcpu: Pointer to the VCPU (used for PPIs)
572 * @intid: The virtual INTID identifying the interrupt (PPI or SPI)
573 * @owner: Opaque pointer to the owner
575 * Returns 0 if intid is not already used by another in-kernel device and the
576 * owner is set, otherwise returns an error code.
578 int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner)
580 struct vgic_irq *irq;
584 if (!vgic_initialized(vcpu->kvm))
587 /* SGIs and LPIs cannot be wired up to any device */
588 if (!irq_is_ppi(intid) && !vgic_valid_spi(vcpu->kvm, intid))
591 irq = vgic_get_irq(vcpu->kvm, vcpu, intid);
592 raw_spin_lock_irqsave(&irq->irq_lock, flags);
593 if (irq->owner && irq->owner != owner)
597 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
603 * vgic_prune_ap_list - Remove non-relevant interrupts from the list
605 * @vcpu: The VCPU pointer
607 * Go over the list of "interesting" interrupts, and prune those that we
608 * won't have to consider in the near future.
610 static void vgic_prune_ap_list(struct kvm_vcpu *vcpu)
612 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
613 struct vgic_irq *irq, *tmp;
615 DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
618 raw_spin_lock(&vgic_cpu->ap_list_lock);
620 list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) {
621 struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB;
622 bool target_vcpu_needs_kick = false;
624 raw_spin_lock(&irq->irq_lock);
626 BUG_ON(vcpu != irq->vcpu);
628 target_vcpu = vgic_target_oracle(irq);
632 * We don't need to process this interrupt any
633 * further, move it off the list.
635 list_del(&irq->ap_list);
637 raw_spin_unlock(&irq->irq_lock);
640 * This vgic_put_irq call matches the
641 * vgic_get_irq_kref in vgic_queue_irq_unlock,
642 * where we added the LPI to the ap_list. As
643 * we remove the irq from the list, we drop
644 * also drop the refcount.
646 vgic_put_irq(vcpu->kvm, irq);
650 if (target_vcpu == vcpu) {
651 /* We're on the right CPU */
652 raw_spin_unlock(&irq->irq_lock);
656 /* This interrupt looks like it has to be migrated. */
658 raw_spin_unlock(&irq->irq_lock);
659 raw_spin_unlock(&vgic_cpu->ap_list_lock);
662 * Ensure locking order by always locking the smallest
665 if (vcpu->vcpu_id < target_vcpu->vcpu_id) {
673 raw_spin_lock(&vcpuA->arch.vgic_cpu.ap_list_lock);
674 raw_spin_lock_nested(&vcpuB->arch.vgic_cpu.ap_list_lock,
675 SINGLE_DEPTH_NESTING);
676 raw_spin_lock(&irq->irq_lock);
679 * If the affinity has been preserved, move the
680 * interrupt around. Otherwise, it means things have
681 * changed while the interrupt was unlocked, and we
682 * need to replay this.
684 * In all cases, we cannot trust the list not to have
685 * changed, so we restart from the beginning.
687 if (target_vcpu == vgic_target_oracle(irq)) {
688 struct vgic_cpu *new_cpu = &target_vcpu->arch.vgic_cpu;
690 list_del(&irq->ap_list);
691 irq->vcpu = target_vcpu;
692 list_add_tail(&irq->ap_list, &new_cpu->ap_list_head);
693 target_vcpu_needs_kick = true;
696 raw_spin_unlock(&irq->irq_lock);
697 raw_spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock);
698 raw_spin_unlock(&vcpuA->arch.vgic_cpu.ap_list_lock);
700 if (target_vcpu_needs_kick) {
701 kvm_make_request(KVM_REQ_IRQ_PENDING, target_vcpu);
702 kvm_vcpu_kick(target_vcpu);
708 raw_spin_unlock(&vgic_cpu->ap_list_lock);
711 static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)
713 if (kvm_vgic_global_state.type == VGIC_V2)
714 vgic_v2_fold_lr_state(vcpu);
716 vgic_v3_fold_lr_state(vcpu);
719 /* Requires the irq_lock to be held. */
720 static inline void vgic_populate_lr(struct kvm_vcpu *vcpu,
721 struct vgic_irq *irq, int lr)
723 lockdep_assert_held(&irq->irq_lock);
725 if (kvm_vgic_global_state.type == VGIC_V2)
726 vgic_v2_populate_lr(vcpu, irq, lr);
728 vgic_v3_populate_lr(vcpu, irq, lr);
731 static inline void vgic_clear_lr(struct kvm_vcpu *vcpu, int lr)
733 if (kvm_vgic_global_state.type == VGIC_V2)
734 vgic_v2_clear_lr(vcpu, lr);
736 vgic_v3_clear_lr(vcpu, lr);
739 static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
741 if (kvm_vgic_global_state.type == VGIC_V2)
742 vgic_v2_set_underflow(vcpu);
744 vgic_v3_set_underflow(vcpu);
747 /* Requires the ap_list_lock to be held. */
748 static int compute_ap_list_depth(struct kvm_vcpu *vcpu,
751 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
752 struct vgic_irq *irq;
757 lockdep_assert_held(&vgic_cpu->ap_list_lock);
759 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
762 raw_spin_lock(&irq->irq_lock);
763 /* GICv2 SGIs can count for more than one... */
764 w = vgic_irq_get_lr_count(irq);
765 raw_spin_unlock(&irq->irq_lock);
768 *multi_sgi |= (w > 1);
773 /* Requires the VCPU's ap_list_lock to be held. */
774 static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
776 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
777 struct vgic_irq *irq;
782 lockdep_assert_held(&vgic_cpu->ap_list_lock);
784 count = compute_ap_list_depth(vcpu, &multi_sgi);
785 if (count > kvm_vgic_global_state.nr_lr || multi_sgi)
786 vgic_sort_ap_list(vcpu);
790 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
791 raw_spin_lock(&irq->irq_lock);
794 * If we have multi-SGIs in the pipeline, we need to
795 * guarantee that they are all seen before any IRQ of
796 * lower priority. In that case, we need to filter out
797 * these interrupts by exiting early. This is easy as
798 * the AP list has been sorted already.
800 if (multi_sgi && irq->priority > prio) {
801 _raw_spin_unlock(&irq->irq_lock);
805 if (likely(vgic_target_oracle(irq) == vcpu)) {
806 vgic_populate_lr(vcpu, irq, count++);
809 prio = irq->priority;
812 raw_spin_unlock(&irq->irq_lock);
814 if (count == kvm_vgic_global_state.nr_lr) {
815 if (!list_is_last(&irq->ap_list,
816 &vgic_cpu->ap_list_head))
817 vgic_set_underflow(vcpu);
822 vcpu->arch.vgic_cpu.used_lrs = count;
824 /* Nuke remaining LRs */
825 for ( ; count < kvm_vgic_global_state.nr_lr; count++)
826 vgic_clear_lr(vcpu, count);
829 static inline bool can_access_vgic_from_kernel(void)
832 * GICv2 can always be accessed from the kernel because it is
833 * memory-mapped, and VHE systems can access GICv3 EL2 system
836 return !static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) || has_vhe();
839 static inline void vgic_save_state(struct kvm_vcpu *vcpu)
841 if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
842 vgic_v2_save_state(vcpu);
844 __vgic_v3_save_state(vcpu);
847 /* Sync back the hardware VGIC state into our emulation after a guest's run. */
848 void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
850 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
852 WARN_ON(vgic_v4_sync_hwstate(vcpu));
854 /* An empty ap_list_head implies used_lrs == 0 */
855 if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head))
858 if (can_access_vgic_from_kernel())
859 vgic_save_state(vcpu);
861 if (vgic_cpu->used_lrs)
862 vgic_fold_lr_state(vcpu);
863 vgic_prune_ap_list(vcpu);
866 static inline void vgic_restore_state(struct kvm_vcpu *vcpu)
868 if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
869 vgic_v2_restore_state(vcpu);
871 __vgic_v3_restore_state(vcpu);
874 /* Flush our emulation state into the GIC hardware before entering the guest. */
875 void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
877 WARN_ON(vgic_v4_flush_hwstate(vcpu));
880 * If there are no virtual interrupts active or pending for this
881 * VCPU, then there is no work to do and we can bail out without
882 * taking any lock. There is a potential race with someone injecting
883 * interrupts to the VCPU, but it is a benign race as the VCPU will
884 * either observe the new interrupt before or after doing this check,
885 * and introducing additional synchronization mechanism doesn't change
888 * Note that we still need to go through the whole thing if anything
889 * can be directly injected (GICv4).
891 if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head) &&
892 !vgic_supports_direct_msis(vcpu->kvm))
895 DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
897 if (!list_empty(&vcpu->arch.vgic_cpu.ap_list_head)) {
898 raw_spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
899 vgic_flush_lr_state(vcpu);
900 raw_spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
903 if (can_access_vgic_from_kernel())
904 vgic_restore_state(vcpu);
907 void kvm_vgic_load(struct kvm_vcpu *vcpu)
909 if (unlikely(!vgic_initialized(vcpu->kvm)))
912 if (kvm_vgic_global_state.type == VGIC_V2)
918 void kvm_vgic_put(struct kvm_vcpu *vcpu)
920 if (unlikely(!vgic_initialized(vcpu->kvm)))
923 if (kvm_vgic_global_state.type == VGIC_V2)
929 void kvm_vgic_vmcr_sync(struct kvm_vcpu *vcpu)
931 if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
934 if (kvm_vgic_global_state.type == VGIC_V2)
935 vgic_v2_vmcr_sync(vcpu);
937 vgic_v3_vmcr_sync(vcpu);
940 int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
942 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
943 struct vgic_irq *irq;
944 bool pending = false;
946 struct vgic_vmcr vmcr;
948 if (!vcpu->kvm->arch.vgic.enabled)
951 if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last)
954 vgic_get_vmcr(vcpu, &vmcr);
956 raw_spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags);
958 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
959 raw_spin_lock(&irq->irq_lock);
960 pending = irq_is_pending(irq) && irq->enabled &&
962 irq->priority < vmcr.pmr;
963 raw_spin_unlock(&irq->irq_lock);
969 raw_spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags);
974 void vgic_kick_vcpus(struct kvm *kvm)
976 struct kvm_vcpu *vcpu;
980 * We've injected an interrupt, time to find out who deserves
983 kvm_for_each_vcpu(c, vcpu, kvm) {
984 if (kvm_vgic_vcpu_pending_irq(vcpu)) {
985 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
991 bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid)
993 struct vgic_irq *irq;
997 if (!vgic_initialized(vcpu->kvm))
1000 irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
1001 raw_spin_lock_irqsave(&irq->irq_lock, flags);
1002 map_is_active = irq->hw && irq->active;
1003 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
1004 vgic_put_irq(vcpu->kvm, irq);
1006 return map_is_active;