1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2021, Red Hat, Inc.
5 * Tests for Hyper-V clocksources
12 struct ms_hyperv_tsc_page {
13 volatile u32 tsc_sequence;
15 volatile u64 tsc_scale;
16 volatile s64 tsc_offset;
19 /* Simplified mul_u64_u64_shr() */
20 static inline u64 mul_u64_u64_shr64(u64 a, u64 b)
33 rm.ll = (u64)a0.l.low * b0.l.high;
34 rn.ll = (u64)a0.l.high * b0.l.low;
35 rh.ll = (u64)a0.l.high * b0.l.high;
37 rh.l.low = c = rm.l.high + rn.l.high + rh.l.low;
38 rh.l.high = (c >> 32) + rh.l.high;
43 static inline void nop_loop(void)
47 for (i = 0; i < 1000000; i++)
51 static inline void check_tsc_msr_rdtsc(void)
53 u64 tsc_freq, r1, r2, t1, t2;
56 tsc_freq = rdmsr(HV_X64_MSR_TSC_FREQUENCY);
57 GUEST_ASSERT(tsc_freq > 0);
59 /* First, check MSR-based clocksource */
61 t1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
64 t2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
66 GUEST_ASSERT(r2 > r1 && t2 > t1);
68 /* HV_X64_MSR_TIME_REF_COUNT is in 100ns */
69 delta_ns = ((t2 - t1) * 100) - ((r2 - r1) * 1000000000 / tsc_freq);
74 GUEST_ASSERT(delta_ns * 100 < (t2 - t1) * 100);
77 static inline u64 get_tscpage_ts(struct ms_hyperv_tsc_page *tsc_page)
79 return mul_u64_u64_shr64(rdtsc(), tsc_page->tsc_scale) + tsc_page->tsc_offset;
82 static inline void check_tsc_msr_tsc_page(struct ms_hyperv_tsc_page *tsc_page)
86 /* Compare TSC page clocksource with HV_X64_MSR_TIME_REF_COUNT */
87 t1 = get_tscpage_ts(tsc_page);
88 r1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
91 GUEST_ASSERT(r1 >= t1 && r1 - t1 < 100000);
94 t2 = get_tscpage_ts(tsc_page);
95 r2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
96 GUEST_ASSERT(r2 >= t1 && r2 - t2 < 100000);
99 static void guest_main(struct ms_hyperv_tsc_page *tsc_page, vm_paddr_t tsc_page_gpa)
101 u64 tsc_scale, tsc_offset;
103 /* Set Guest OS id to enable Hyper-V emulation */
105 wrmsr(HV_X64_MSR_GUEST_OS_ID, (u64)0x8100 << 48);
108 check_tsc_msr_rdtsc();
112 /* Set up TSC page is disabled state, check that it's clean */
113 wrmsr(HV_X64_MSR_REFERENCE_TSC, tsc_page_gpa);
114 GUEST_ASSERT(tsc_page->tsc_sequence == 0);
115 GUEST_ASSERT(tsc_page->tsc_scale == 0);
116 GUEST_ASSERT(tsc_page->tsc_offset == 0);
120 /* Set up TSC page is enabled state */
121 wrmsr(HV_X64_MSR_REFERENCE_TSC, tsc_page_gpa | 0x1);
122 GUEST_ASSERT(tsc_page->tsc_sequence != 0);
126 check_tsc_msr_tsc_page(tsc_page);
130 tsc_offset = tsc_page->tsc_offset;
131 /* Call KVM_SET_CLOCK from userspace, check that TSC page was updated */
134 /* Sanity check TSC page timestamp, it should be close to 0 */
135 GUEST_ASSERT(get_tscpage_ts(tsc_page) < 100000);
137 GUEST_ASSERT(tsc_page->tsc_offset != tsc_offset);
142 * Enable Re-enlightenment and check that TSC page stays constant across
145 wrmsr(HV_X64_MSR_REENLIGHTENMENT_CONTROL, 0x1 << 16 | 0xff);
146 wrmsr(HV_X64_MSR_TSC_EMULATION_CONTROL, 0x1);
147 tsc_offset = tsc_page->tsc_offset;
148 tsc_scale = tsc_page->tsc_scale;
150 GUEST_ASSERT(tsc_page->tsc_offset == tsc_offset);
151 GUEST_ASSERT(tsc_page->tsc_scale == tsc_scale);
155 check_tsc_msr_tsc_page(tsc_page);
158 * Disable re-enlightenment and TSC page, check that KVM doesn't update
161 wrmsr(HV_X64_MSR_REENLIGHTENMENT_CONTROL, 0);
162 wrmsr(HV_X64_MSR_TSC_EMULATION_CONTROL, 0);
163 wrmsr(HV_X64_MSR_REFERENCE_TSC, 0);
164 memset(tsc_page, 0, sizeof(*tsc_page));
167 GUEST_ASSERT(tsc_page->tsc_sequence == 0);
168 GUEST_ASSERT(tsc_page->tsc_offset == 0);
169 GUEST_ASSERT(tsc_page->tsc_scale == 0);
176 static void host_check_tsc_msr_rdtsc(struct kvm_vm *vm)
178 u64 tsc_freq, r1, r2, t1, t2;
181 tsc_freq = vcpu_get_msr(vm, VCPU_ID, HV_X64_MSR_TSC_FREQUENCY);
182 TEST_ASSERT(tsc_freq > 0, "TSC frequency must be nonzero");
184 /* First, check MSR-based clocksource */
186 t1 = vcpu_get_msr(vm, VCPU_ID, HV_X64_MSR_TIME_REF_COUNT);
189 t2 = vcpu_get_msr(vm, VCPU_ID, HV_X64_MSR_TIME_REF_COUNT);
191 TEST_ASSERT(t2 > t1, "Time reference MSR is not monotonic (%ld <= %ld)", t1, t2);
193 /* HV_X64_MSR_TIME_REF_COUNT is in 100ns */
194 delta_ns = ((t2 - t1) * 100) - ((r2 - r1) * 1000000000 / tsc_freq);
196 delta_ns = -delta_ns;
199 TEST_ASSERT(delta_ns * 100 < (t2 - t1) * 100,
200 "Elapsed time does not match (MSR=%ld, TSC=%ld)",
201 (t2 - t1) * 100, (r2 - r1) * 1000000000 / tsc_freq);
209 vm_vaddr_t tsc_page_gva;
212 vm = vm_create_default(VCPU_ID, 0, guest_main);
213 run = vcpu_state(vm, VCPU_ID);
215 vcpu_set_hv_cpuid(vm, VCPU_ID);
217 tsc_page_gva = vm_vaddr_alloc_page(vm);
218 memset(addr_gva2hva(vm, tsc_page_gva), 0x0, getpagesize());
219 TEST_ASSERT((addr_gva2gpa(vm, tsc_page_gva) & (getpagesize() - 1)) == 0,
220 "TSC page has to be page aligned\n");
221 vcpu_args_set(vm, VCPU_ID, 2, tsc_page_gva, addr_gva2gpa(vm, tsc_page_gva));
223 host_check_tsc_msr_rdtsc(vm);
225 for (stage = 1;; stage++) {
226 _vcpu_run(vm, VCPU_ID);
227 TEST_ASSERT(run->exit_reason == KVM_EXIT_IO,
228 "Stage %d: unexpected exit reason: %u (%s),\n",
229 stage, run->exit_reason,
230 exit_reason_str(run->exit_reason));
232 switch (get_ucall(vm, VCPU_ID, &uc)) {
234 TEST_FAIL("%s at %s:%ld", (const char *)uc.args[0],
235 __FILE__, uc.args[1]);
240 /* Keep in sync with guest_main() */
241 TEST_ASSERT(stage == 11, "Testing ended prematurely, stage %d\n",
245 TEST_FAIL("Unknown ucall %lu", uc.cmd);
248 TEST_ASSERT(!strcmp((const char *)uc.args[0], "hello") &&
250 "Stage %d: Unexpected register values vmexit, got %lx",
251 stage, (ulong)uc.args[1]);
253 /* Reset kvmclock triggering TSC page update */
254 if (stage == 7 || stage == 8 || stage == 10) {
255 struct kvm_clock_data clock = {0};
257 vm_ioctl(vm, KVM_SET_CLOCK, &clock);