tools/testing/nvdimm/test/nfit.c

   1 /*
   2  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of version 2 of the GNU General Public License as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14 #include <linux/platform_device.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/workqueue.h>
  17 #include <linux/libnvdimm.h>
  18 #include <linux/vmalloc.h>
  19 #include <linux/device.h>
  20 #include <linux/module.h>
  21 #include <linux/mutex.h>
  22 #include <linux/ndctl.h>
  23 #include <linux/sizes.h>
  24 #include <linux/list.h>
  25 #include <linux/slab.h>
  26 #include <nd-core.h>
  27 #include <nfit.h>
  28 #include <nd.h>
  29 #include "nfit_test.h"
  30 #include "../watermark.h"
  31
  32 /*
  33  * Generate an NFIT table to describe the following topology:
  34  *
  35  * BUS0: Interleaved PMEM regions, and aliasing with BLK regions
  36  *
  37  *                     (a)                       (b)            DIMM   BLK-REGION
  38  *           +----------+--------------+----------+---------+
  39  * +------+  |  blk2.0  |     pm0.0    |  blk2.1  |  pm1.0  |    0      region2
  40  * | imc0 +--+- - - - - region0 - - - -+----------+         +
  41  * +--+---+  |  blk3.0  |     pm0.0    |  blk3.1  |  pm1.0  |    1      region3
  42  *    |      +----------+--------------v----------v         v
  43  * +--+---+                            |                    |
  44  * | cpu0 |                                    region1
  45  * +--+---+                            |                    |
  46  *    |      +-------------------------^----------^         ^
  47  * +--+---+  |                 blk4.0             |  pm1.0  |    2      region4
  48  * | imc1 +--+-------------------------+----------+         +
  49  * +------+  |                 blk5.0             |  pm1.0  |    3      region5
  50  *           +-------------------------+----------+-+-------+
  51  *
  52  * +--+---+
  53  * | cpu1 |
  54  * +--+---+                   (Hotplug DIMM)
  55  *    |      +----------------------------------------------+
  56  * +--+---+  |                 blk6.0/pm7.0                 |    4      region6/7
  57  * | imc0 +--+----------------------------------------------+
  58  * +------+
  59  *
  60  *
  61  * *) In this layout we have four dimms and two memory controllers in one
  62  *    socket.  Each unique interface (BLK or PMEM) to DPA space
  63  *    is identified by a region device with a dynamically assigned id.
  64  *
  65  * *) The first portion of dimm0 and dimm1 are interleaved as REGION0.
  66  *    A single PMEM namespace "pm0.0" is created using half of the
  67  *    REGION0 SPA-range.  REGION0 spans dimm0 and dimm1.  PMEM namespace
  68  *    allocate from from the bottom of a region.  The unallocated
  69  *    portion of REGION0 aliases with REGION2 and REGION3.  That
  70  *    unallacted capacity is reclaimed as BLK namespaces ("blk2.0" and
  71  *    "blk3.0") starting at the base of each DIMM to offset (a) in those
  72  *    DIMMs.  "pm0.0", "blk2.0" and "blk3.0" are free-form readable
  73  *    names that can be assigned to a namespace.
  74  *
  75  * *) In the last portion of dimm0 and dimm1 we have an interleaved
  76  *    SPA range, REGION1, that spans those two dimms as well as dimm2
  77  *    and dimm3.  Some of REGION1 allocated to a PMEM namespace named
  78  *    "pm1.0" the rest is reclaimed in 4 BLK namespaces (for each
  79  *    dimm in the interleave set), "blk2.1", "blk3.1", "blk4.0", and
  80  *    "blk5.0".
  81  *
  82  * *) The portion of dimm2 and dimm3 that do not participate in the
  83  *    REGION1 interleaved SPA range (i.e. the DPA address below offset
  84  *    (b) are also included in the "blk4.0" and "blk5.0" namespaces.
  85  *    Note, that BLK namespaces need not be contiguous in DPA-space, and
  86  *    can consume aliased capacity from multiple interleave sets.
  87  *
  88  * BUS1: Legacy NVDIMM (single contiguous range)
  89  *
  90  *  region2
  91  * +---------------------+
  92  * |---------------------|
  93  * ||       pm2.0       ||
  94  * |---------------------|
  95  * +---------------------+
  96  *
  97  * *) A NFIT-table may describe a simple system-physical-address range
  98  *    with no BLK aliasing.  This type of region may optionally
  99  *    reference an NVDIMM.
 100  */
 101 enum {
 102         NUM_PM  = 3,
 103         NUM_DCR = 5,
 104         NUM_HINTS = 8,
 105         NUM_BDW = NUM_DCR,
 106         NUM_SPA = NUM_PM + NUM_DCR + NUM_BDW,
 107         NUM_MEM = NUM_DCR + NUM_BDW + 2 /* spa0 iset */
 108                 + 4 /* spa1 iset */ + 1 /* spa11 iset */,
 109         DIMM_SIZE = SZ_32M,
 110         LABEL_SIZE = SZ_128K,
 111         SPA_VCD_SIZE = SZ_4M,
 112         SPA0_SIZE = DIMM_SIZE,
 113         SPA1_SIZE = DIMM_SIZE*2,
 114         SPA2_SIZE = DIMM_SIZE,
 115         BDW_SIZE = 64 << 8,
 116         DCR_SIZE = 12,
 117         NUM_NFITS = 2, /* permit testing multiple NFITs per system */
 118 };
 119
 120 struct nfit_test_dcr {
 121         __le64 bdw_addr;
 122         __le32 bdw_status;
 123         __u8 aperature[BDW_SIZE];
 124 };
 125
 126 #define NFIT_DIMM_HANDLE(node, socket, imc, chan, dimm) \
 127         (((node & 0xfff) << 16) | ((socket & 0xf) << 12) \
 128          | ((imc & 0xf) << 8) | ((chan & 0xf) << 4) | (dimm & 0xf))
 129
 130 static u32 handle[] = {
 131         [0] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 0),
 132         [1] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 1),
 133         [2] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 0),
 134         [3] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 1),
 135         [4] = NFIT_DIMM_HANDLE(0, 1, 0, 0, 0),
 136         [5] = NFIT_DIMM_HANDLE(1, 0, 0, 0, 0),
 137         [6] = NFIT_DIMM_HANDLE(1, 0, 0, 0, 1),
 138 };
 139
 140 static unsigned long dimm_fail_cmd_flags[NUM_DCR];
 141 static int dimm_fail_cmd_code[NUM_DCR];
 142
 143 struct nfit_test_fw {
 144         enum intel_fw_update_state state;
 145         u32 context;
 146         u64 version;
 147         u32 size_received;
 148         u64 end_time;
 149 };
 150
 151 struct nfit_test {
 152         struct acpi_nfit_desc acpi_desc;
 153         struct platform_device pdev;
 154         struct list_head resources;
 155         void *nfit_buf;
 156         dma_addr_t nfit_dma;
 157         size_t nfit_size;
 158         size_t nfit_filled;
 159         int dcr_idx;
 160         int num_dcr;
 161         int num_pm;
 162         void **dimm;
 163         dma_addr_t *dimm_dma;
 164         void **flush;
 165         dma_addr_t *flush_dma;
 166         void **label;
 167         dma_addr_t *label_dma;
 168         void **spa_set;
 169         dma_addr_t *spa_set_dma;
 170         struct nfit_test_dcr **dcr;
 171         dma_addr_t *dcr_dma;
 172         int (*alloc)(struct nfit_test *t);
 173         void (*setup)(struct nfit_test *t);
 174         int setup_hotplug;
 175         union acpi_object **_fit;
 176         dma_addr_t _fit_dma;
 177         struct ars_state {
 178                 struct nd_cmd_ars_status *ars_status;
 179                 unsigned long deadline;
 180                 spinlock_t lock;
 181         } ars_state;
 182         struct device *dimm_dev[NUM_DCR];
 183         struct nd_intel_smart *smart;
 184         struct nd_intel_smart_threshold *smart_threshold;
 185         struct badrange badrange;
 186         struct work_struct work;
 187         struct nfit_test_fw *fw;
 188 };
 189
 190 static struct workqueue_struct *nfit_wq;
 191
 192 static struct nfit_test *to_nfit_test(struct device *dev)
 193 {
 194         struct platform_device *pdev = to_platform_device(dev);
 195
 196         return container_of(pdev, struct nfit_test, pdev);
 197 }
 198
 199 static int nd_intel_test_get_fw_info(struct nfit_test *t,
 200                 struct nd_intel_fw_info *nd_cmd, unsigned int buf_len,
 201                 int idx)
 202 {
 203         struct device *dev = &t->pdev.dev;
 204         struct nfit_test_fw *fw = &t->fw[idx];
 205
 206         dev_dbg(dev, "%s(nfit_test: %p nd_cmd: %p, buf_len: %u, idx: %d\n",
 207                         __func__, t, nd_cmd, buf_len, idx);
 208
 209         if (buf_len < sizeof(*nd_cmd))
 210                 return -EINVAL;
 211
 212         nd_cmd->status = 0;
 213         nd_cmd->storage_size = INTEL_FW_STORAGE_SIZE;
 214         nd_cmd->max_send_len = INTEL_FW_MAX_SEND_LEN;
 215         nd_cmd->query_interval = INTEL_FW_QUERY_INTERVAL;
 216         nd_cmd->max_query_time = INTEL_FW_QUERY_MAX_TIME;
 217         nd_cmd->update_cap = 0;
 218         nd_cmd->fis_version = INTEL_FW_FIS_VERSION;
 219         nd_cmd->run_version = 0;
 220         nd_cmd->updated_version = fw->version;
 221
 222         return 0;
 223 }
 224
 225 static int nd_intel_test_start_update(struct nfit_test *t,
 226                 struct nd_intel_fw_start *nd_cmd, unsigned int buf_len,
 227                 int idx)
 228 {
 229         struct device *dev = &t->pdev.dev;
 230         struct nfit_test_fw *fw = &t->fw[idx];
 231
 232         dev_dbg(dev, "%s(nfit_test: %p nd_cmd: %p buf_len: %u idx: %d)\n",
 233                         __func__, t, nd_cmd, buf_len, idx);
 234
 235         if (buf_len < sizeof(*nd_cmd))
 236                 return -EINVAL;
 237
 238         if (fw->state != FW_STATE_NEW) {
 239                 /* extended status, FW update in progress */
 240                 nd_cmd->status = 0x10007;
 241                 return 0;
 242         }
 243
 244         fw->state = FW_STATE_IN_PROGRESS;
 245         fw->context++;
 246         fw->size_received = 0;
 247         nd_cmd->status = 0;
 248         nd_cmd->context = fw->context;
 249
 250         dev_dbg(dev, "%s: context issued: %#x\n", __func__, nd_cmd->context);
 251
 252         return 0;
 253 }
 254
 255 static int nd_intel_test_send_data(struct nfit_test *t,
 256                 struct nd_intel_fw_send_data *nd_cmd, unsigned int buf_len,
 257                 int idx)
 258 {
 259         struct device *dev = &t->pdev.dev;
 260         struct nfit_test_fw *fw = &t->fw[idx];
 261         u32 *status = (u32 *)&nd_cmd->data[nd_cmd->length];
 262
 263         dev_dbg(dev, "%s(nfit_test: %p nd_cmd: %p buf_len: %u idx: %d)\n",
 264                         __func__, t, nd_cmd, buf_len, idx);
 265
 266         if (buf_len < sizeof(*nd_cmd))
 267                 return -EINVAL;
 268
 269
 270         dev_dbg(dev, "%s: cmd->status: %#x\n", __func__, *status);
 271         dev_dbg(dev, "%s: cmd->data[0]: %#x\n", __func__, nd_cmd->data[0]);
 272         dev_dbg(dev, "%s: cmd->data[%u]: %#x\n", __func__, nd_cmd->length-1,
 273                         nd_cmd->data[nd_cmd->length-1]);
 274
 275         if (fw->state != FW_STATE_IN_PROGRESS) {
 276                 dev_dbg(dev, "%s: not in IN_PROGRESS state\n", __func__);
 277                 *status = 0x5;
 278                 return 0;
 279         }
 280
 281         if (nd_cmd->context != fw->context) {
 282                 dev_dbg(dev, "%s: incorrect context: in: %#x correct: %#x\n",
 283                                 __func__, nd_cmd->context, fw->context);
 284                 *status = 0x10007;
 285                 return 0;
 286         }
 287
 288         /*
 289          * check offset + len > size of fw storage
 290          * check length is > max send length
 291          */
 292         if (nd_cmd->offset + nd_cmd->length > INTEL_FW_STORAGE_SIZE ||
 293                         nd_cmd->length > INTEL_FW_MAX_SEND_LEN) {
 294                 *status = 0x3;
 295                 dev_dbg(dev, "%s: buffer boundary violation\n", __func__);
 296                 return 0;
 297         }
 298
 299         fw->size_received += nd_cmd->length;
 300         dev_dbg(dev, "%s: copying %u bytes, %u bytes so far\n",
 301                         __func__, nd_cmd->length, fw->size_received);
 302         *status = 0;
 303         return 0;
 304 }
 305
 306 static int nd_intel_test_finish_fw(struct nfit_test *t,
 307                 struct nd_intel_fw_finish_update *nd_cmd,
 308                 unsigned int buf_len, int idx)
 309 {
 310         struct device *dev = &t->pdev.dev;
 311         struct nfit_test_fw *fw = &t->fw[idx];
 312
 313         dev_dbg(dev, "%s(nfit_test: %p nd_cmd: %p buf_len: %u idx: %d)\n",
 314                         __func__, t, nd_cmd, buf_len, idx);
 315
 316         if (fw->state == FW_STATE_UPDATED) {
 317                 /* update already done, need cold boot */
 318                 nd_cmd->status = 0x20007;
 319                 return 0;
 320         }
 321
 322         dev_dbg(dev, "%s: context: %#x  ctrl_flags: %#x\n",
 323                         __func__, nd_cmd->context, nd_cmd->ctrl_flags);
 324
 325         switch (nd_cmd->ctrl_flags) {
 326         case 0: /* finish */
 327                 if (nd_cmd->context != fw->context) {
 328                         dev_dbg(dev, "%s: incorrect context: in: %#x correct: %#x\n",
 329                                         __func__, nd_cmd->context,
 330                                         fw->context);
 331                         nd_cmd->status = 0x10007;
 332                         return 0;
 333                 }
 334                 nd_cmd->status = 0;
 335                 fw->state = FW_STATE_VERIFY;
 336                 /* set 1 second of time for firmware "update" */
 337                 fw->end_time = jiffies + HZ;
 338                 break;
 339
 340         case 1: /* abort */
 341                 fw->size_received = 0;
 342                 /* successfully aborted status */
 343                 nd_cmd->status = 0x40007;
 344                 fw->state = FW_STATE_NEW;
 345                 dev_dbg(dev, "%s: abort successful\n", __func__);
 346                 break;
 347
 348         default: /* bad control flag */
 349                 dev_warn(dev, "%s: unknown control flag: %#x\n",
 350                                 __func__, nd_cmd->ctrl_flags);
 351                 return -EINVAL;
 352         }
 353
 354         return 0;
 355 }
 356
 357 static int nd_intel_test_finish_query(struct nfit_test *t,
 358                 struct nd_intel_fw_finish_query *nd_cmd,
 359                 unsigned int buf_len, int idx)
 360 {
 361         struct device *dev = &t->pdev.dev;
 362         struct nfit_test_fw *fw = &t->fw[idx];
 363
 364         dev_dbg(dev, "%s(nfit_test: %p nd_cmd: %p buf_len: %u idx: %d)\n",
 365                         __func__, t, nd_cmd, buf_len, idx);
 366
 367         if (buf_len < sizeof(*nd_cmd))
 368                 return -EINVAL;
 369
 370         if (nd_cmd->context != fw->context) {
 371                 dev_dbg(dev, "%s: incorrect context: in: %#x correct: %#x\n",
 372                                 __func__, nd_cmd->context, fw->context);
 373                 nd_cmd->status = 0x10007;
 374                 return 0;
 375         }
 376
 377         dev_dbg(dev, "%s context: %#x\n", __func__, nd_cmd->context);
 378
 379         switch (fw->state) {
 380         case FW_STATE_NEW:
 381                 nd_cmd->updated_fw_rev = 0;
 382                 nd_cmd->status = 0;
 383                 dev_dbg(dev, "%s: new state\n", __func__);
 384                 break;
 385
 386         case FW_STATE_IN_PROGRESS:
 387                 /* sequencing error */
 388                 nd_cmd->status = 0x40007;
 389                 nd_cmd->updated_fw_rev = 0;
 390                 dev_dbg(dev, "%s: sequence error\n", __func__);
 391                 break;
 392
 393         case FW_STATE_VERIFY:
 394                 if (time_is_after_jiffies64(fw->end_time)) {
 395                         nd_cmd->updated_fw_rev = 0;
 396                         nd_cmd->status = 0x20007;
 397                         dev_dbg(dev, "%s: still verifying\n", __func__);
 398                         break;
 399                 }
 400
 401                 dev_dbg(dev, "%s: transition out verify\n", __func__);
 402                 fw->state = FW_STATE_UPDATED;
 403                 /* we are going to fall through if it's "done" */
 404         case FW_STATE_UPDATED:
 405                 nd_cmd->status = 0;
 406                 /* bogus test version */
 407                 fw->version = nd_cmd->updated_fw_rev =
 408                         INTEL_FW_FAKE_VERSION;
 409                 dev_dbg(dev, "%s: updated\n", __func__);
 410                 break;
 411
 412         default: /* we should never get here */
 413                 return -EINVAL;
 414         }
 415
 416         return 0;
 417 }
 418
 419 static int nfit_test_cmd_get_config_size(struct nd_cmd_get_config_size *nd_cmd,
 420                 unsigned int buf_len)
 421 {
 422         if (buf_len < sizeof(*nd_cmd))
 423                 return -EINVAL;
 424
 425         nd_cmd->status = 0;
 426         nd_cmd->config_size = LABEL_SIZE;
 427         nd_cmd->max_xfer = SZ_4K;
 428
 429         return 0;
 430 }
 431
 432 static int nfit_test_cmd_get_config_data(struct nd_cmd_get_config_data_hdr
 433                 *nd_cmd, unsigned int buf_len, void *label)
 434 {
 435         unsigned int len, offset = nd_cmd->in_offset;
 436         int rc;
 437
 438         if (buf_len < sizeof(*nd_cmd))
 439                 return -EINVAL;
 440         if (offset >= LABEL_SIZE)
 441                 return -EINVAL;
 442         if (nd_cmd->in_length + sizeof(*nd_cmd) > buf_len)
 443                 return -EINVAL;
 444
 445         nd_cmd->status = 0;
 446         len = min(nd_cmd->in_length, LABEL_SIZE - offset);
 447         memcpy(nd_cmd->out_buf, label + offset, len);
 448         rc = buf_len - sizeof(*nd_cmd) - len;
 449
 450         return rc;
 451 }
 452
 453 static int nfit_test_cmd_set_config_data(struct nd_cmd_set_config_hdr *nd_cmd,
 454                 unsigned int buf_len, void *label)
 455 {
 456         unsigned int len, offset = nd_cmd->in_offset;
 457         u32 *status;
 458         int rc;
 459
 460         if (buf_len < sizeof(*nd_cmd))
 461                 return -EINVAL;
 462         if (offset >= LABEL_SIZE)
 463                 return -EINVAL;
 464         if (nd_cmd->in_length + sizeof(*nd_cmd) + 4 > buf_len)
 465                 return -EINVAL;
 466
 467         status = (void *)nd_cmd + nd_cmd->in_length + sizeof(*nd_cmd);
 468         *status = 0;
 469         len = min(nd_cmd->in_length, LABEL_SIZE - offset);
 470         memcpy(label + offset, nd_cmd->in_buf, len);
 471         rc = buf_len - sizeof(*nd_cmd) - (len + 4);
 472
 473         return rc;
 474 }
 475
 476 #define NFIT_TEST_CLEAR_ERR_UNIT 256
 477
 478 static int nfit_test_cmd_ars_cap(struct nd_cmd_ars_cap *nd_cmd,
 479                 unsigned int buf_len)
 480 {
 481         int ars_recs;
 482
 483         if (buf_len < sizeof(*nd_cmd))
 484                 return -EINVAL;
 485
 486         /* for testing, only store up to n records that fit within 4k */
 487         ars_recs = SZ_4K / sizeof(struct nd_ars_record);
 488
 489         nd_cmd->max_ars_out = sizeof(struct nd_cmd_ars_status)
 490                 + ars_recs * sizeof(struct nd_ars_record);
 491         nd_cmd->status = (ND_ARS_PERSISTENT | ND_ARS_VOLATILE) << 16;
 492         nd_cmd->clear_err_unit = NFIT_TEST_CLEAR_ERR_UNIT;
 493
 494         return 0;
 495 }
 496
 497 static void post_ars_status(struct ars_state *ars_state,
 498                 struct badrange *badrange, u64 addr, u64 len)
 499 {
 500         struct nd_cmd_ars_status *ars_status;
 501         struct nd_ars_record *ars_record;
 502         struct badrange_entry *be;
 503         u64 end = addr + len - 1;
 504         int i = 0;
 505
 506         ars_state->deadline = jiffies + 1*HZ;
 507         ars_status = ars_state->ars_status;
 508         ars_status->status = 0;
 509         ars_status->address = addr;
 510         ars_status->length = len;
 511         ars_status->type = ND_ARS_PERSISTENT;
 512
 513         spin_lock(&badrange->lock);
 514         list_for_each_entry(be, &badrange->list, list) {
 515                 u64 be_end = be->start + be->length - 1;
 516                 u64 rstart, rend;
 517
 518                 /* skip entries outside the range */
 519                 if (be_end < addr || be->start > end)
 520                         continue;
 521
 522                 rstart = (be->start < addr) ? addr : be->start;
 523                 rend = (be_end < end) ? be_end : end;
 524                 ars_record = &ars_status->records[i];
 525                 ars_record->handle = 0;
 526                 ars_record->err_address = rstart;
 527                 ars_record->length = rend - rstart + 1;
 528                 i++;
 529         }
 530         spin_unlock(&badrange->lock);
 531         ars_status->num_records = i;
 532         ars_status->out_length = sizeof(struct nd_cmd_ars_status)
 533                 + i * sizeof(struct nd_ars_record);
 534 }
 535
 536 static int nfit_test_cmd_ars_start(struct nfit_test *t,
 537                 struct ars_state *ars_state,
 538                 struct nd_cmd_ars_start *ars_start, unsigned int buf_len,
 539                 int *cmd_rc)
 540 {
 541         if (buf_len < sizeof(*ars_start))
 542                 return -EINVAL;
 543
 544         spin_lock(&ars_state->lock);
 545         if (time_before(jiffies, ars_state->deadline)) {
 546                 ars_start->status = NFIT_ARS_START_BUSY;
 547                 *cmd_rc = -EBUSY;
 548         } else {
 549                 ars_start->status = 0;
 550                 ars_start->scrub_time = 1;
 551                 post_ars_status(ars_state, &t->badrange, ars_start->address,
 552                                 ars_start->length);
 553                 *cmd_rc = 0;
 554         }
 555         spin_unlock(&ars_state->lock);
 556
 557         return 0;
 558 }
 559
 560 static int nfit_test_cmd_ars_status(struct ars_state *ars_state,
 561                 struct nd_cmd_ars_status *ars_status, unsigned int buf_len,
 562                 int *cmd_rc)
 563 {
 564         if (buf_len < ars_state->ars_status->out_length)
 565                 return -EINVAL;
 566
 567         spin_lock(&ars_state->lock);
 568         if (time_before(jiffies, ars_state->deadline)) {
 569                 memset(ars_status, 0, buf_len);
 570                 ars_status->status = NFIT_ARS_STATUS_BUSY;
 571                 ars_status->out_length = sizeof(*ars_status);
 572                 *cmd_rc = -EBUSY;
 573         } else {
 574                 memcpy(ars_status, ars_state->ars_status,
 575                                 ars_state->ars_status->out_length);
 576                 *cmd_rc = 0;
 577         }
 578         spin_unlock(&ars_state->lock);
 579         return 0;
 580 }
 581
 582 static int nfit_test_cmd_clear_error(struct nfit_test *t,
 583                 struct nd_cmd_clear_error *clear_err,
 584                 unsigned int buf_len, int *cmd_rc)
 585 {
 586         const u64 mask = NFIT_TEST_CLEAR_ERR_UNIT - 1;
 587         if (buf_len < sizeof(*clear_err))
 588                 return -EINVAL;
 589
 590         if ((clear_err->address & mask) || (clear_err->length & mask))
 591                 return -EINVAL;
 592
 593         badrange_forget(&t->badrange, clear_err->address, clear_err->length);
 594         clear_err->status = 0;
 595         clear_err->cleared = clear_err->length;
 596         *cmd_rc = 0;
 597         return 0;
 598 }
 599
 600 struct region_search_spa {
 601         u64 addr;
 602         struct nd_region *region;
 603 };
 604
 605 static int is_region_device(struct device *dev)
 606 {
 607         return !strncmp(dev->kobj.name, "region", 6);
 608 }
 609
 610 static int nfit_test_search_region_spa(struct device *dev, void *data)
 611 {
 612         struct region_search_spa *ctx = data;
 613         struct nd_region *nd_region;
 614         resource_size_t ndr_end;
 615
 616         if (!is_region_device(dev))
 617                 return 0;
 618
 619         nd_region = to_nd_region(dev);
 620         ndr_end = nd_region->ndr_start + nd_region->ndr_size;
 621
 622         if (ctx->addr >= nd_region->ndr_start && ctx->addr < ndr_end) {
 623                 ctx->region = nd_region;
 624                 return 1;
 625         }
 626
 627         return 0;
 628 }
 629
 630 static int nfit_test_search_spa(struct nvdimm_bus *bus,
 631                 struct nd_cmd_translate_spa *spa)
 632 {
 633         int ret;
 634         struct nd_region *nd_region = NULL;
 635         struct nvdimm *nvdimm = NULL;
 636         struct nd_mapping *nd_mapping = NULL;
 637         struct region_search_spa ctx = {
 638                 .addr = spa->spa,
 639                 .region = NULL,
 640         };
 641         u64 dpa;
 642
 643         ret = device_for_each_child(&bus->dev, &ctx,
 644                                 nfit_test_search_region_spa);
 645
 646         if (!ret)
 647                 return -ENODEV;
 648
 649         nd_region = ctx.region;
 650
 651         dpa = ctx.addr - nd_region->ndr_start;
 652
 653         /*
 654          * last dimm is selected for test
 655          */
 656         nd_mapping = &nd_region->mapping[nd_region->ndr_mappings - 1];
 657         nvdimm = nd_mapping->nvdimm;
 658
 659         spa->devices[0].nfit_device_handle = handle[nvdimm->id];
 660         spa->num_nvdimms = 1;
 661         spa->devices[0].dpa = dpa;
 662
 663         return 0;
 664 }
 665
 666 static int nfit_test_cmd_translate_spa(struct nvdimm_bus *bus,
 667                 struct nd_cmd_translate_spa *spa, unsigned int buf_len)
 668 {
 669         if (buf_len < spa->translate_length)
 670                 return -EINVAL;
 671
 672         if (nfit_test_search_spa(bus, spa) < 0 || !spa->num_nvdimms)
 673                 spa->status = 2;
 674
 675         return 0;
 676 }
 677
 678 static int nfit_test_cmd_smart(struct nd_intel_smart *smart, unsigned int buf_len,
 679                 struct nd_intel_smart *smart_data)
 680 {
 681         if (buf_len < sizeof(*smart))
 682                 return -EINVAL;
 683         memcpy(smart, smart_data, sizeof(*smart));
 684         return 0;
 685 }
 686
 687 static int nfit_test_cmd_smart_threshold(
 688                 struct nd_intel_smart_threshold *out,
 689                 unsigned int buf_len,
 690                 struct nd_intel_smart_threshold *smart_t)
 691 {
 692         if (buf_len < sizeof(*smart_t))
 693                 return -EINVAL;
 694         memcpy(out, smart_t, sizeof(*smart_t));
 695         return 0;
 696 }
 697
 698 static void smart_notify(struct device *bus_dev,
 699                 struct device *dimm_dev, struct nd_intel_smart *smart,
 700                 struct nd_intel_smart_threshold *thresh)
 701 {
 702         dev_dbg(dimm_dev, "%s: alarm: %#x spares: %d (%d) mtemp: %d (%d) ctemp: %d (%d)\n",
 703                         __func__, thresh->alarm_control, thresh->spares,
 704                         smart->spares, thresh->media_temperature,
 705                         smart->media_temperature, thresh->ctrl_temperature,
 706                         smart->ctrl_temperature);
 707         if (((thresh->alarm_control & ND_INTEL_SMART_SPARE_TRIP)
 708                                 && smart->spares
 709                                 <= thresh->spares)
 710                         || ((thresh->alarm_control & ND_INTEL_SMART_TEMP_TRIP)
 711                                 && smart->media_temperature
 712                                 >= thresh->media_temperature)
 713                         || ((thresh->alarm_control & ND_INTEL_SMART_CTEMP_TRIP)
 714                                 && smart->ctrl_temperature
 715                                 >= thresh->ctrl_temperature)
 716                         || (smart->health != ND_INTEL_SMART_NON_CRITICAL_HEALTH)
 717                         || (smart->shutdown_state != 0)) {
 718                 device_lock(bus_dev);
 719                 __acpi_nvdimm_notify(dimm_dev, 0x81);
 720                 device_unlock(bus_dev);
 721         }
 722 }
 723
 724 static int nfit_test_cmd_smart_set_threshold(
 725                 struct nd_intel_smart_set_threshold *in,
 726                 unsigned int buf_len,
 727                 struct nd_intel_smart_threshold *thresh,
 728                 struct nd_intel_smart *smart,
 729                 struct device *bus_dev, struct device *dimm_dev)
 730 {
 731         unsigned int size;
 732
 733         size = sizeof(*in) - 4;
 734         if (buf_len < size)
 735                 return -EINVAL;
 736         memcpy(thresh->data, in, size);
 737         in->status = 0;
 738         smart_notify(bus_dev, dimm_dev, smart, thresh);
 739
 740         return 0;
 741 }
 742
 743 static int nfit_test_cmd_smart_inject(
 744                 struct nd_intel_smart_inject *inj,
 745                 unsigned int buf_len,
 746                 struct nd_intel_smart_threshold *thresh,
 747                 struct nd_intel_smart *smart,
 748                 struct device *bus_dev, struct device *dimm_dev)
 749 {
 750         if (buf_len != sizeof(*inj))
 751                 return -EINVAL;
 752
 753         if (inj->mtemp_enable)
 754                 smart->media_temperature = inj->media_temperature;
 755         if (inj->spare_enable)
 756                 smart->spares = inj->spares;
 757         if (inj->fatal_enable)
 758                 smart->health = ND_INTEL_SMART_FATAL_HEALTH;
 759         if (inj->unsafe_shutdown_enable) {
 760                 smart->shutdown_state = 1;
 761                 smart->shutdown_count++;
 762         }
 763         inj->status = 0;
 764         smart_notify(bus_dev, dimm_dev, smart, thresh);
 765
 766         return 0;
 767 }
 768
 769 static void uc_error_notify(struct work_struct *work)
 770 {
 771         struct nfit_test *t = container_of(work, typeof(*t), work);
 772
 773         __acpi_nfit_notify(&t->pdev.dev, t, NFIT_NOTIFY_UC_MEMORY_ERROR);
 774 }
 775
 776 static int nfit_test_cmd_ars_error_inject(struct nfit_test *t,
 777                 struct nd_cmd_ars_err_inj *err_inj, unsigned int buf_len)
 778 {
 779         int rc;
 780
 781         if (buf_len != sizeof(*err_inj)) {
 782                 rc = -EINVAL;
 783                 goto err;
 784         }
 785
 786         if (err_inj->err_inj_spa_range_length <= 0) {
 787                 rc = -EINVAL;
 788                 goto err;
 789         }
 790
 791         rc =  badrange_add(&t->badrange, err_inj->err_inj_spa_range_base,
 792                         err_inj->err_inj_spa_range_length);
 793         if (rc < 0)
 794                 goto err;
 795
 796         if (err_inj->err_inj_options & (1 << ND_ARS_ERR_INJ_OPT_NOTIFY))
 797                 queue_work(nfit_wq, &t->work);
 798
 799         err_inj->status = 0;
 800         return 0;
 801
 802 err:
 803         err_inj->status = NFIT_ARS_INJECT_INVALID;
 804         return rc;
 805 }
 806
 807 static int nfit_test_cmd_ars_inject_clear(struct nfit_test *t,
 808                 struct nd_cmd_ars_err_inj_clr *err_clr, unsigned int buf_len)
 809 {
 810         int rc;
 811
 812         if (buf_len != sizeof(*err_clr)) {
 813                 rc = -EINVAL;
 814                 goto err;
 815         }
 816
 817         if (err_clr->err_inj_clr_spa_range_length <= 0) {
 818                 rc = -EINVAL;
 819                 goto err;
 820         }
 821
 822         badrange_forget(&t->badrange, err_clr->err_inj_clr_spa_range_base,
 823                         err_clr->err_inj_clr_spa_range_length);
 824
 825         err_clr->status = 0;
 826         return 0;
 827
 828 err:
 829         err_clr->status = NFIT_ARS_INJECT_INVALID;
 830         return rc;
 831 }
 832
 833 static int nfit_test_cmd_ars_inject_status(struct nfit_test *t,
 834                 struct nd_cmd_ars_err_inj_stat *err_stat,
 835                 unsigned int buf_len)
 836 {
 837         struct badrange_entry *be;
 838         int max = SZ_4K / sizeof(struct nd_error_stat_query_record);
 839         int i = 0;
 840
 841         err_stat->status = 0;
 842         spin_lock(&t->badrange.lock);
 843         list_for_each_entry(be, &t->badrange.list, list) {
 844                 err_stat->record[i].err_inj_stat_spa_range_base = be->start;
 845                 err_stat->record[i].err_inj_stat_spa_range_length = be->length;
 846                 i++;
 847                 if (i > max)
 848                         break;
 849         }
 850         spin_unlock(&t->badrange.lock);
 851         err_stat->inj_err_rec_count = i;
 852
 853         return 0;
 854 }
 855
 856 static int nd_intel_test_cmd_set_lss_status(struct nfit_test *t,
 857                 struct nd_intel_lss *nd_cmd, unsigned int buf_len)
 858 {
 859         struct device *dev = &t->pdev.dev;
 860
 861         if (buf_len < sizeof(*nd_cmd))
 862                 return -EINVAL;
 863
 864         switch (nd_cmd->enable) {
 865         case 0:
 866                 nd_cmd->status = 0;
 867                 dev_dbg(dev, "%s: Latch System Shutdown Status disabled\n",
 868                                 __func__);
 869                 break;
 870         case 1:
 871                 nd_cmd->status = 0;
 872                 dev_dbg(dev, "%s: Latch System Shutdown Status enabled\n",
 873                                 __func__);
 874                 break;
 875         default:
 876                 dev_warn(dev, "Unknown enable value: %#x\n", nd_cmd->enable);
 877                 nd_cmd->status = 0x3;
 878                 break;
 879         }
 880
 881
 882         return 0;
 883 }
 884
 885 static int get_dimm(struct nfit_mem *nfit_mem, unsigned int func)
 886 {
 887         int i;
 888
 889         /* lookup per-dimm data */
 890         for (i = 0; i < ARRAY_SIZE(handle); i++)
 891                 if (__to_nfit_memdev(nfit_mem)->device_handle == handle[i])
 892                         break;
 893         if (i >= ARRAY_SIZE(handle))
 894                 return -ENXIO;
 895
 896         if ((1 << func) & dimm_fail_cmd_flags[i]) {
 897                 if (dimm_fail_cmd_code[i])
 898                         return dimm_fail_cmd_code[i];
 899                 return -EIO;
 900         }
 901
 902         return i;
 903 }
 904
 905 static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
 906                 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
 907                 unsigned int buf_len, int *cmd_rc)
 908 {
 909         struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
 910         struct nfit_test *t = container_of(acpi_desc, typeof(*t), acpi_desc);
 911         unsigned int func = cmd;
 912         int i, rc = 0, __cmd_rc;
 913
 914         if (!cmd_rc)
 915                 cmd_rc = &__cmd_rc;
 916         *cmd_rc = 0;
 917
 918         if (nvdimm) {
 919                 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
 920                 unsigned long cmd_mask = nvdimm_cmd_mask(nvdimm);
 921
 922                 if (!nfit_mem)
 923                         return -ENOTTY;
 924
 925                 if (cmd == ND_CMD_CALL) {
 926                         struct nd_cmd_pkg *call_pkg = buf;
 927
 928                         buf_len = call_pkg->nd_size_in + call_pkg->nd_size_out;
 929                         buf = (void *) call_pkg->nd_payload;
 930                         func = call_pkg->nd_command;
 931                         if (call_pkg->nd_family != nfit_mem->family)
 932                                 return -ENOTTY;
 933
 934                         i = get_dimm(nfit_mem, func);
 935                         if (i < 0)
 936                                 return i;
 937
 938                         switch (func) {
 939                         case ND_INTEL_ENABLE_LSS_STATUS:
 940                                 return nd_intel_test_cmd_set_lss_status(t,
 941                                                 buf, buf_len);
 942                         case ND_INTEL_FW_GET_INFO:
 943                                 return nd_intel_test_get_fw_info(t, buf,
 944                                                 buf_len, i - t->dcr_idx);
 945                         case ND_INTEL_FW_START_UPDATE:
 946                                 return nd_intel_test_start_update(t, buf,
 947                                                 buf_len, i - t->dcr_idx);
 948                         case ND_INTEL_FW_SEND_DATA:
 949                                 return nd_intel_test_send_data(t, buf,
 950                                                 buf_len, i - t->dcr_idx);
 951                         case ND_INTEL_FW_FINISH_UPDATE:
 952                                 return nd_intel_test_finish_fw(t, buf,
 953                                                 buf_len, i - t->dcr_idx);
 954                         case ND_INTEL_FW_FINISH_QUERY:
 955                                 return nd_intel_test_finish_query(t, buf,
 956                                                 buf_len, i - t->dcr_idx);
 957                         case ND_INTEL_SMART:
 958                                 return nfit_test_cmd_smart(buf, buf_len,
 959                                                 &t->smart[i - t->dcr_idx]);
 960                         case ND_INTEL_SMART_THRESHOLD:
 961                                 return nfit_test_cmd_smart_threshold(buf,
 962                                                 buf_len,
 963                                                 &t->smart_threshold[i -
 964                                                         t->dcr_idx]);
 965                         case ND_INTEL_SMART_SET_THRESHOLD:
 966                                 return nfit_test_cmd_smart_set_threshold(buf,
 967                                                 buf_len,
 968                                                 &t->smart_threshold[i -
 969                                                         t->dcr_idx],
 970                                                 &t->smart[i - t->dcr_idx],
 971                                                 &t->pdev.dev, t->dimm_dev[i]);
 972                         case ND_INTEL_SMART_INJECT:
 973                                 return nfit_test_cmd_smart_inject(buf,
 974                                                 buf_len,
 975                                                 &t->smart_threshold[i -
 976                                                         t->dcr_idx],
 977                                                 &t->smart[i - t->dcr_idx],
 978                                                 &t->pdev.dev, t->dimm_dev[i]);
 979                         default:
 980                                 return -ENOTTY;
 981                         }
 982                 }
 983
 984                 if (!test_bit(cmd, &cmd_mask)
 985                                 || !test_bit(func, &nfit_mem->dsm_mask))
 986                         return -ENOTTY;
 987
 988                 i = get_dimm(nfit_mem, func);
 989                 if (i < 0)
 990                         return i;
 991
 992                 switch (func) {
 993                 case ND_CMD_GET_CONFIG_SIZE:
 994                         rc = nfit_test_cmd_get_config_size(buf, buf_len);
 995                         break;
 996                 case ND_CMD_GET_CONFIG_DATA:
 997                         rc = nfit_test_cmd_get_config_data(buf, buf_len,
 998                                 t->label[i - t->dcr_idx]);
 999                         break;
1000                 case ND_CMD_SET_CONFIG_DATA:
1001                         rc = nfit_test_cmd_set_config_data(buf, buf_len,
1002                                 t->label[i - t->dcr_idx]);
1003                         break;
1004                 default:
1005                         return -ENOTTY;
1006                 }
1007         } else {
1008                 struct ars_state *ars_state = &t->ars_state;
1009                 struct nd_cmd_pkg *call_pkg = buf;
1010
1011                 if (!nd_desc)
1012                         return -ENOTTY;
1013
1014                 if (cmd == ND_CMD_CALL) {
1015                         func = call_pkg->nd_command;
1016
1017                         buf_len = call_pkg->nd_size_in + call_pkg->nd_size_out;
1018                         buf = (void *) call_pkg->nd_payload;
1019
1020                         switch (func) {
1021                         case NFIT_CMD_TRANSLATE_SPA:
1022                                 rc = nfit_test_cmd_translate_spa(
1023                                         acpi_desc->nvdimm_bus, buf, buf_len);
1024                                 return rc;
1025                         case NFIT_CMD_ARS_INJECT_SET:
1026                                 rc = nfit_test_cmd_ars_error_inject(t, buf,
1027                                         buf_len);
1028                                 return rc;
1029                         case NFIT_CMD_ARS_INJECT_CLEAR:
1030                                 rc = nfit_test_cmd_ars_inject_clear(t, buf,
1031                                         buf_len);
1032                                 return rc;
1033                         case NFIT_CMD_ARS_INJECT_GET:
1034                                 rc = nfit_test_cmd_ars_inject_status(t, buf,
1035                                         buf_len);
1036                                 return rc;
1037                         default:
1038                                 return -ENOTTY;
1039                         }
1040                 }
1041
1042                 if (!nd_desc || !test_bit(cmd, &nd_desc->cmd_mask))
1043                         return -ENOTTY;
1044
1045                 switch (func) {
1046                 case ND_CMD_ARS_CAP:
1047                         rc = nfit_test_cmd_ars_cap(buf, buf_len);
1048                         break;
1049                 case ND_CMD_ARS_START:
1050                         rc = nfit_test_cmd_ars_start(t, ars_state, buf,
1051                                         buf_len, cmd_rc);
1052                         break;
1053                 case ND_CMD_ARS_STATUS:
1054                         rc = nfit_test_cmd_ars_status(ars_state, buf, buf_len,
1055                                         cmd_rc);
1056                         break;
1057                 case ND_CMD_CLEAR_ERROR:
1058                         rc = nfit_test_cmd_clear_error(t, buf, buf_len, cmd_rc);
1059                         break;
1060                 default:
1061                         return -ENOTTY;
1062                 }
1063         }
1064
1065         return rc;
1066 }
1067
1068 static DEFINE_SPINLOCK(nfit_test_lock);
1069 static struct nfit_test *instances[NUM_NFITS];
1070
1071 static void release_nfit_res(void *data)
1072 {
1073         struct nfit_test_resource *nfit_res = data;
1074
1075         spin_lock(&nfit_test_lock);
1076         list_del(&nfit_res->list);
1077         spin_unlock(&nfit_test_lock);
1078
1079         vfree(nfit_res->buf);
1080         kfree(nfit_res);
1081 }
1082
1083 static void *__test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma,
1084                 void *buf)
1085 {
1086         struct device *dev = &t->pdev.dev;
1087         struct nfit_test_resource *nfit_res = kzalloc(sizeof(*nfit_res),
1088                         GFP_KERNEL);
1089         int rc;
1090
1091         if (!buf || !nfit_res)
1092                 goto err;
1093         rc = devm_add_action(dev, release_nfit_res, nfit_res);
1094         if (rc)
1095                 goto err;
1096         INIT_LIST_HEAD(&nfit_res->list);
1097         memset(buf, 0, size);
1098         nfit_res->dev = dev;
1099         nfit_res->buf = buf;
1100         nfit_res->res.start = *dma;
1101         nfit_res->res.end = *dma + size - 1;
1102         nfit_res->res.name = "NFIT";
1103         spin_lock_init(&nfit_res->lock);
1104         INIT_LIST_HEAD(&nfit_res->requests);
1105         spin_lock(&nfit_test_lock);
1106         list_add(&nfit_res->list, &t->resources);
1107         spin_unlock(&nfit_test_lock);
1108
1109         return nfit_res->buf;
1110  err:
1111         if (buf)
1112                 vfree(buf);
1113         kfree(nfit_res);
1114         return NULL;
1115 }
1116
1117 static void *test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma)
1118 {
1119         void *buf = vmalloc(size);
1120
1121         *dma = (unsigned long) buf;
1122         return __test_alloc(t, size, dma, buf);
1123 }
1124
1125 static struct nfit_test_resource *nfit_test_lookup(resource_size_t addr)
1126 {
1127         int i;
1128
1129         for (i = 0; i < ARRAY_SIZE(instances); i++) {
1130                 struct nfit_test_resource *n, *nfit_res = NULL;
1131                 struct nfit_test *t = instances[i];
1132
1133                 if (!t)
1134                         continue;
1135                 spin_lock(&nfit_test_lock);
1136                 list_for_each_entry(n, &t->resources, list) {
1137                         if (addr >= n->res.start && (addr < n->res.start
1138                                                 + resource_size(&n->res))) {
1139                                 nfit_res = n;
1140                                 break;
1141                         } else if (addr >= (unsigned long) n->buf
1142                                         && (addr < (unsigned long) n->buf
1143                                                 + resource_size(&n->res))) {
1144                                 nfit_res = n;
1145                                 break;
1146                         }
1147                 }
1148                 spin_unlock(&nfit_test_lock);
1149                 if (nfit_res)
1150                         return nfit_res;
1151         }
1152
1153         return NULL;
1154 }
1155
1156 static int ars_state_init(struct device *dev, struct ars_state *ars_state)
1157 {
1158         /* for testing, only store up to n records that fit within 4k */
1159         ars_state->ars_status = devm_kzalloc(dev,
1160                         sizeof(struct nd_cmd_ars_status) + SZ_4K, GFP_KERNEL);
1161         if (!ars_state->ars_status)
1162                 return -ENOMEM;
1163         spin_lock_init(&ars_state->lock);
1164         return 0;
1165 }
1166
1167 static void put_dimms(void *data)
1168 {
1169         struct nfit_test *t = data;
1170         int i;
1171
1172         for (i = 0; i < t->num_dcr; i++)
1173                 if (t->dimm_dev[i])
1174                         device_unregister(t->dimm_dev[i]);
1175 }
1176
1177 static struct class *nfit_test_dimm;
1178
1179 static int dimm_name_to_id(struct device *dev)
1180 {
1181         int dimm;
1182
1183         if (sscanf(dev_name(dev), "test_dimm%d", &dimm) != 1)
1184                 return -ENXIO;
1185         return dimm;
1186 }
1187
1188 static ssize_t handle_show(struct device *dev, struct device_attribute *attr,
1189                 char *buf)
1190 {
1191         int dimm = dimm_name_to_id(dev);
1192
1193         if (dimm < 0)
1194                 return dimm;
1195
1196         return sprintf(buf, "%#x\n", handle[dimm]);
1197 }
1198 DEVICE_ATTR_RO(handle);
1199
1200 static ssize_t fail_cmd_show(struct device *dev, struct device_attribute *attr,
1201                 char *buf)
1202 {
1203         int dimm = dimm_name_to_id(dev);
1204
1205         if (dimm < 0)
1206                 return dimm;
1207
1208         return sprintf(buf, "%#lx\n", dimm_fail_cmd_flags[dimm]);
1209 }
1210
1211 static ssize_t fail_cmd_store(struct device *dev, struct device_attribute *attr,
1212                 const char *buf, size_t size)
1213 {
1214         int dimm = dimm_name_to_id(dev);
1215         unsigned long val;
1216         ssize_t rc;
1217
1218         if (dimm < 0)
1219                 return dimm;
1220
1221         rc = kstrtol(buf, 0, &val);
1222         if (rc)
1223                 return rc;
1224
1225         dimm_fail_cmd_flags[dimm] = val;
1226         return size;
1227 }
1228 static DEVICE_ATTR_RW(fail_cmd);
1229
1230 static ssize_t fail_cmd_code_show(struct device *dev, struct device_attribute *attr,
1231                 char *buf)
1232 {
1233         int dimm = dimm_name_to_id(dev);
1234
1235         if (dimm < 0)
1236                 return dimm;
1237
1238         return sprintf(buf, "%d\n", dimm_fail_cmd_code[dimm]);
1239 }
1240
1241 static ssize_t fail_cmd_code_store(struct device *dev, struct device_attribute *attr,
1242                 const char *buf, size_t size)
1243 {
1244         int dimm = dimm_name_to_id(dev);
1245         unsigned long val;
1246         ssize_t rc;
1247
1248         if (dimm < 0)
1249                 return dimm;
1250
1251         rc = kstrtol(buf, 0, &val);
1252         if (rc)
1253                 return rc;
1254
1255         dimm_fail_cmd_code[dimm] = val;
1256         return size;
1257 }
1258 static DEVICE_ATTR_RW(fail_cmd_code);
1259
1260 static struct attribute *nfit_test_dimm_attributes[] = {
1261         &dev_attr_fail_cmd.attr,
1262         &dev_attr_fail_cmd_code.attr,
1263         &dev_attr_handle.attr,
1264         NULL,
1265 };
1266
1267 static struct attribute_group nfit_test_dimm_attribute_group = {
1268         .attrs = nfit_test_dimm_attributes,
1269 };
1270
1271 static const struct attribute_group *nfit_test_dimm_attribute_groups[] = {
1272         &nfit_test_dimm_attribute_group,
1273         NULL,
1274 };
1275
1276 static int nfit_test_dimm_init(struct nfit_test *t)
1277 {
1278         int i;
1279
1280         if (devm_add_action_or_reset(&t->pdev.dev, put_dimms, t))
1281                 return -ENOMEM;
1282         for (i = 0; i < t->num_dcr; i++) {
1283                 t->dimm_dev[i] = device_create_with_groups(nfit_test_dimm,
1284                                 &t->pdev.dev, 0, NULL,
1285                                 nfit_test_dimm_attribute_groups,
1286                                 "test_dimm%d", i + t->dcr_idx);
1287                 if (!t->dimm_dev[i])
1288                         return -ENOMEM;
1289         }
1290         return 0;
1291 }
1292
1293 static void smart_init(struct nfit_test *t)
1294 {
1295         int i;
1296         const struct nd_intel_smart_threshold smart_t_data = {
1297                 .alarm_control = ND_INTEL_SMART_SPARE_TRIP
1298                         | ND_INTEL_SMART_TEMP_TRIP,
1299                 .media_temperature = 40 * 16,
1300                 .ctrl_temperature = 30 * 16,
1301                 .spares = 5,
1302         };
1303         const struct nd_intel_smart smart_data = {
1304                 .flags = ND_INTEL_SMART_HEALTH_VALID
1305                         | ND_INTEL_SMART_SPARES_VALID
1306                         | ND_INTEL_SMART_ALARM_VALID
1307                         | ND_INTEL_SMART_USED_VALID
1308                         | ND_INTEL_SMART_SHUTDOWN_VALID
1309                         | ND_INTEL_SMART_MTEMP_VALID,
1310                 .health = ND_INTEL_SMART_NON_CRITICAL_HEALTH,
1311                 .media_temperature = 23 * 16,
1312                 .ctrl_temperature = 25 * 16,
1313                 .pmic_temperature = 40 * 16,
1314                 .spares = 75,
1315                 .alarm_flags = ND_INTEL_SMART_SPARE_TRIP
1316                         | ND_INTEL_SMART_TEMP_TRIP,
1317                 .ait_status = 1,
1318                 .life_used = 5,
1319                 .shutdown_state = 0,
1320                 .vendor_size = 0,
1321                 .shutdown_count = 100,
1322         };
1323
1324         for (i = 0; i < t->num_dcr; i++) {
1325                 memcpy(&t->smart[i], &smart_data, sizeof(smart_data));
1326                 memcpy(&t->smart_threshold[i], &smart_t_data,
1327                                 sizeof(smart_t_data));
1328         }
1329 }
1330
1331 static int nfit_test0_alloc(struct nfit_test *t)
1332 {
1333         size_t nfit_size = sizeof(struct acpi_nfit_system_address) * NUM_SPA
1334                         + sizeof(struct acpi_nfit_memory_map) * NUM_MEM
1335                         + sizeof(struct acpi_nfit_control_region) * NUM_DCR
1336                         + offsetof(struct acpi_nfit_control_region,
1337                                         window_size) * NUM_DCR
1338                         + sizeof(struct acpi_nfit_data_region) * NUM_BDW
1339                         + (sizeof(struct acpi_nfit_flush_address)
1340                                         + sizeof(u64) * NUM_HINTS) * NUM_DCR
1341                         + sizeof(struct acpi_nfit_capabilities);
1342         int i;
1343
1344         t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
1345         if (!t->nfit_buf)
1346                 return -ENOMEM;
1347         t->nfit_size = nfit_size;
1348
1349         t->spa_set[0] = test_alloc(t, SPA0_SIZE, &t->spa_set_dma[0]);
1350         if (!t->spa_set[0])
1351                 return -ENOMEM;
1352
1353         t->spa_set[1] = test_alloc(t, SPA1_SIZE, &t->spa_set_dma[1]);
1354         if (!t->spa_set[1])
1355                 return -ENOMEM;
1356
1357         t->spa_set[2] = test_alloc(t, SPA0_SIZE, &t->spa_set_dma[2]);
1358         if (!t->spa_set[2])
1359                 return -ENOMEM;
1360
1361         for (i = 0; i < t->num_dcr; i++) {
1362                 t->dimm[i] = test_alloc(t, DIMM_SIZE, &t->dimm_dma[i]);
1363                 if (!t->dimm[i])
1364                         return -ENOMEM;
1365
1366                 t->label[i] = test_alloc(t, LABEL_SIZE, &t->label_dma[i]);
1367                 if (!t->label[i])
1368                         return -ENOMEM;
1369                 sprintf(t->label[i], "label%d", i);
1370
1371                 t->flush[i] = test_alloc(t, max(PAGE_SIZE,
1372                                         sizeof(u64) * NUM_HINTS),
1373                                 &t->flush_dma[i]);
1374                 if (!t->flush[i])
1375                         return -ENOMEM;
1376         }
1377
1378         for (i = 0; i < t->num_dcr; i++) {
1379                 t->dcr[i] = test_alloc(t, LABEL_SIZE, &t->dcr_dma[i]);
1380                 if (!t->dcr[i])
1381                         return -ENOMEM;
1382         }
1383
1384         t->_fit = test_alloc(t, sizeof(union acpi_object **), &t->_fit_dma);
1385         if (!t->_fit)
1386                 return -ENOMEM;
1387
1388         if (nfit_test_dimm_init(t))
1389                 return -ENOMEM;
1390         smart_init(t);
1391         return ars_state_init(&t->pdev.dev, &t->ars_state);
1392 }
1393
1394 static int nfit_test1_alloc(struct nfit_test *t)
1395 {
1396         size_t nfit_size = sizeof(struct acpi_nfit_system_address) * 2
1397                 + sizeof(struct acpi_nfit_memory_map) * 2
1398                 + offsetof(struct acpi_nfit_control_region, window_size) * 2;
1399         int i;
1400
1401         t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
1402         if (!t->nfit_buf)
1403                 return -ENOMEM;
1404         t->nfit_size = nfit_size;
1405
1406         t->spa_set[0] = test_alloc(t, SPA2_SIZE, &t->spa_set_dma[0]);
1407         if (!t->spa_set[0])
1408                 return -ENOMEM;
1409
1410         for (i = 0; i < t->num_dcr; i++) {
1411                 t->label[i] = test_alloc(t, LABEL_SIZE, &t->label_dma[i]);
1412                 if (!t->label[i])
1413                         return -ENOMEM;
1414                 sprintf(t->label[i], "label%d", i);
1415         }
1416
1417         t->spa_set[1] = test_alloc(t, SPA_VCD_SIZE, &t->spa_set_dma[1]);
1418         if (!t->spa_set[1])
1419                 return -ENOMEM;
1420
1421         if (nfit_test_dimm_init(t))
1422                 return -ENOMEM;
1423         smart_init(t);
1424         return ars_state_init(&t->pdev.dev, &t->ars_state);
1425 }
1426
1427 static void dcr_common_init(struct acpi_nfit_control_region *dcr)
1428 {
1429         dcr->vendor_id = 0xabcd;
1430         dcr->device_id = 0;
1431         dcr->revision_id = 1;
1432         dcr->valid_fields = 1;
1433         dcr->manufacturing_location = 0xa;
1434         dcr->manufacturing_date = cpu_to_be16(2016);
1435 }
1436
1437 static void nfit_test0_setup(struct nfit_test *t)
1438 {
1439         const int flush_hint_size = sizeof(struct acpi_nfit_flush_address)
1440                 + (sizeof(u64) * NUM_HINTS);
1441         struct acpi_nfit_desc *acpi_desc;
1442         struct acpi_nfit_memory_map *memdev;
1443         void *nfit_buf = t->nfit_buf;
1444         struct acpi_nfit_system_address *spa;
1445         struct acpi_nfit_control_region *dcr;
1446         struct acpi_nfit_data_region *bdw;
1447         struct acpi_nfit_flush_address *flush;
1448         struct acpi_nfit_capabilities *pcap;
1449         unsigned int offset = 0, i;
1450
1451         /*
1452          * spa0 (interleave first half of dimm0 and dimm1, note storage
1453          * does not actually alias the related block-data-window
1454          * regions)
1455          */
1456         spa = nfit_buf;
1457         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1458         spa->header.length = sizeof(*spa);
1459         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
1460         spa->range_index = 0+1;
1461         spa->address = t->spa_set_dma[0];
1462         spa->length = SPA0_SIZE;
1463         offset += spa->header.length;
1464
1465         /*
1466          * spa1 (interleave last half of the 4 DIMMS, note storage
1467          * does not actually alias the related block-data-window
1468          * regions)
1469          */
1470         spa = nfit_buf + offset;
1471         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1472         spa->header.length = sizeof(*spa);
1473         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
1474         spa->range_index = 1+1;
1475         spa->address = t->spa_set_dma[1];
1476         spa->length = SPA1_SIZE;
1477         offset += spa->header.length;
1478
1479         /* spa2 (dcr0) dimm0 */
1480         spa = nfit_buf + offset;
1481         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1482         spa->header.length = sizeof(*spa);
1483         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
1484         spa->range_index = 2+1;
1485         spa->address = t->dcr_dma[0];
1486         spa->length = DCR_SIZE;
1487         offset += spa->header.length;
1488
1489         /* spa3 (dcr1) dimm1 */
1490         spa = nfit_buf + offset;
1491         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1492         spa->header.length = sizeof(*spa);
1493         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
1494         spa->range_index = 3+1;
1495         spa->address = t->dcr_dma[1];
1496         spa->length = DCR_SIZE;
1497         offset += spa->header.length;
1498
1499         /* spa4 (dcr2) dimm2 */
1500         spa = nfit_buf + offset;
1501         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1502         spa->header.length = sizeof(*spa);
1503         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
1504         spa->range_index = 4+1;
1505         spa->address = t->dcr_dma[2];
1506         spa->length = DCR_SIZE;
1507         offset += spa->header.length;
1508
1509         /* spa5 (dcr3) dimm3 */
1510         spa = nfit_buf + offset;
1511         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1512         spa->header.length = sizeof(*spa);
1513         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
1514         spa->range_index = 5+1;
1515         spa->address = t->dcr_dma[3];
1516         spa->length = DCR_SIZE;
1517         offset += spa->header.length;
1518
1519         /* spa6 (bdw for dcr0) dimm0 */
1520         spa = nfit_buf + offset;
1521         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1522         spa->header.length = sizeof(*spa);
1523         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
1524         spa->range_index = 6+1;
1525         spa->address = t->dimm_dma[0];
1526         spa->length = DIMM_SIZE;
1527         offset += spa->header.length;
1528
1529         /* spa7 (bdw for dcr1) dimm1 */
1530         spa = nfit_buf + offset;
1531         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1532         spa->header.length = sizeof(*spa);
1533         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
1534         spa->range_index = 7+1;
1535         spa->address = t->dimm_dma[1];
1536         spa->length = DIMM_SIZE;
1537         offset += spa->header.length;
1538
1539         /* spa8 (bdw for dcr2) dimm2 */
1540         spa = nfit_buf + offset;
1541         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1542         spa->header.length = sizeof(*spa);
1543         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
1544         spa->range_index = 8+1;
1545         spa->address = t->dimm_dma[2];
1546         spa->length = DIMM_SIZE;
1547         offset += spa->header.length;
1548
1549         /* spa9 (bdw for dcr3) dimm3 */
1550         spa = nfit_buf + offset;
1551         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1552         spa->header.length = sizeof(*spa);
1553         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
1554         spa->range_index = 9+1;
1555         spa->address = t->dimm_dma[3];
1556         spa->length = DIMM_SIZE;
1557         offset += spa->header.length;
1558
1559         /* mem-region0 (spa0, dimm0) */
1560         memdev = nfit_buf + offset;
1561         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1562         memdev->header.length = sizeof(*memdev);
1563         memdev->device_handle = handle[0];
1564         memdev->physical_id = 0;
1565         memdev->region_id = 0;
1566         memdev->range_index = 0+1;
1567         memdev->region_index = 4+1;
1568         memdev->region_size = SPA0_SIZE/2;
1569         memdev->region_offset = 1;
1570         memdev->address = 0;
1571         memdev->interleave_index = 0;
1572         memdev->interleave_ways = 2;
1573         offset += memdev->header.length;
1574
1575         /* mem-region1 (spa0, dimm1) */
1576         memdev = nfit_buf + offset;
1577         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1578         memdev->header.length = sizeof(*memdev);
1579         memdev->device_handle = handle[1];
1580         memdev->physical_id = 1;
1581         memdev->region_id = 0;
1582         memdev->range_index = 0+1;
1583         memdev->region_index = 5+1;
1584         memdev->region_size = SPA0_SIZE/2;
1585         memdev->region_offset = (1 << 8);
1586         memdev->address = 0;
1587         memdev->interleave_index = 0;
1588         memdev->interleave_ways = 2;
1589         memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
1590         offset += memdev->header.length;
1591
1592         /* mem-region2 (spa1, dimm0) */
1593         memdev = nfit_buf + offset;
1594         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1595         memdev->header.length = sizeof(*memdev);
1596         memdev->device_handle = handle[0];
1597         memdev->physical_id = 0;
1598         memdev->region_id = 1;
1599         memdev->range_index = 1+1;
1600         memdev->region_index = 4+1;
1601         memdev->region_size = SPA1_SIZE/4;
1602         memdev->region_offset = (1 << 16);
1603         memdev->address = SPA0_SIZE/2;
1604         memdev->interleave_index = 0;
1605         memdev->interleave_ways = 4;
1606         memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
1607         offset += memdev->header.length;
1608
1609         /* mem-region3 (spa1, dimm1) */
1610         memdev = nfit_buf + offset;
1611         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1612         memdev->header.length = sizeof(*memdev);
1613         memdev->device_handle = handle[1];
1614         memdev->physical_id = 1;
1615         memdev->region_id = 1;
1616         memdev->range_index = 1+1;
1617         memdev->region_index = 5+1;
1618         memdev->region_size = SPA1_SIZE/4;
1619         memdev->region_offset = (1 << 24);
1620         memdev->address = SPA0_SIZE/2;
1621         memdev->interleave_index = 0;
1622         memdev->interleave_ways = 4;
1623         offset += memdev->header.length;
1624
1625         /* mem-region4 (spa1, dimm2) */
1626         memdev = nfit_buf + offset;
1627         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1628         memdev->header.length = sizeof(*memdev);
1629         memdev->device_handle = handle[2];
1630         memdev->physical_id = 2;
1631         memdev->region_id = 0;
1632         memdev->range_index = 1+1;
1633         memdev->region_index = 6+1;
1634         memdev->region_size = SPA1_SIZE/4;
1635         memdev->region_offset = (1ULL << 32);
1636         memdev->address = SPA0_SIZE/2;
1637         memdev->interleave_index = 0;
1638         memdev->interleave_ways = 4;
1639         memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
1640         offset += memdev->header.length;
1641
1642         /* mem-region5 (spa1, dimm3) */
1643         memdev = nfit_buf + offset;
1644         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1645         memdev->header.length = sizeof(*memdev);
1646         memdev->device_handle = handle[3];
1647         memdev->physical_id = 3;
1648         memdev->region_id = 0;
1649         memdev->range_index = 1+1;
1650         memdev->region_index = 7+1;
1651         memdev->region_size = SPA1_SIZE/4;
1652         memdev->region_offset = (1ULL << 40);
1653         memdev->address = SPA0_SIZE/2;
1654         memdev->interleave_index = 0;
1655         memdev->interleave_ways = 4;
1656         offset += memdev->header.length;
1657
1658         /* mem-region6 (spa/dcr0, dimm0) */
1659         memdev = nfit_buf + offset;
1660         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1661         memdev->header.length = sizeof(*memdev);
1662         memdev->device_handle = handle[0];
1663         memdev->physical_id = 0;
1664         memdev->region_id = 0;
1665         memdev->range_index = 2+1;
1666         memdev->region_index = 0+1;
1667         memdev->region_size = 0;
1668         memdev->region_offset = 0;
1669         memdev->address = 0;
1670         memdev->interleave_index = 0;
1671         memdev->interleave_ways = 1;
1672         offset += memdev->header.length;
1673
1674         /* mem-region7 (spa/dcr1, dimm1) */
1675         memdev = nfit_buf + offset;
1676         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1677         memdev->header.length = sizeof(*memdev);
1678         memdev->device_handle = handle[1];
1679         memdev->physical_id = 1;
1680         memdev->region_id = 0;
1681         memdev->range_index = 3+1;
1682         memdev->region_index = 1+1;
1683         memdev->region_size = 0;
1684         memdev->region_offset = 0;
1685         memdev->address = 0;
1686         memdev->interleave_index = 0;
1687         memdev->interleave_ways = 1;
1688         offset += memdev->header.length;
1689
1690         /* mem-region8 (spa/dcr2, dimm2) */
1691         memdev = nfit_buf + offset;
1692         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1693         memdev->header.length = sizeof(*memdev);
1694         memdev->device_handle = handle[2];
1695         memdev->physical_id = 2;
1696         memdev->region_id = 0;
1697         memdev->range_index = 4+1;
1698         memdev->region_index = 2+1;
1699         memdev->region_size = 0;
1700         memdev->region_offset = 0;
1701         memdev->address = 0;
1702         memdev->interleave_index = 0;
1703         memdev->interleave_ways = 1;
1704         offset += memdev->header.length;
1705
1706         /* mem-region9 (spa/dcr3, dimm3) */
1707         memdev = nfit_buf + offset;
1708         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1709         memdev->header.length = sizeof(*memdev);
1710         memdev->device_handle = handle[3];
1711         memdev->physical_id = 3;
1712         memdev->region_id = 0;
1713         memdev->range_index = 5+1;
1714         memdev->region_index = 3+1;
1715         memdev->region_size = 0;
1716         memdev->region_offset = 0;
1717         memdev->address = 0;
1718         memdev->interleave_index = 0;
1719         memdev->interleave_ways = 1;
1720         offset += memdev->header.length;
1721
1722         /* mem-region10 (spa/bdw0, dimm0) */
1723         memdev = nfit_buf + offset;
1724         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1725         memdev->header.length = sizeof(*memdev);
1726         memdev->device_handle = handle[0];
1727         memdev->physical_id = 0;
1728         memdev->region_id = 0;
1729         memdev->range_index = 6+1;
1730         memdev->region_index = 0+1;
1731         memdev->region_size = 0;
1732         memdev->region_offset = 0;
1733         memdev->address = 0;
1734         memdev->interleave_index = 0;
1735         memdev->interleave_ways = 1;
1736         offset += memdev->header.length;
1737
1738         /* mem-region11 (spa/bdw1, dimm1) */
1739         memdev = nfit_buf + offset;
1740         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1741         memdev->header.length = sizeof(*memdev);
1742         memdev->device_handle = handle[1];
1743         memdev->physical_id = 1;
1744         memdev->region_id = 0;
1745         memdev->range_index = 7+1;
1746         memdev->region_index = 1+1;
1747         memdev->region_size = 0;
1748         memdev->region_offset = 0;
1749         memdev->address = 0;
1750         memdev->interleave_index = 0;
1751         memdev->interleave_ways = 1;
1752         offset += memdev->header.length;
1753
1754         /* mem-region12 (spa/bdw2, dimm2) */
1755         memdev = nfit_buf + offset;
1756         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1757         memdev->header.length = sizeof(*memdev);
1758         memdev->device_handle = handle[2];
1759         memdev->physical_id = 2;
1760         memdev->region_id = 0;
1761         memdev->range_index = 8+1;
1762         memdev->region_index = 2+1;
1763         memdev->region_size = 0;
1764         memdev->region_offset = 0;
1765         memdev->address = 0;
1766         memdev->interleave_index = 0;
1767         memdev->interleave_ways = 1;
1768         offset += memdev->header.length;
1769
1770         /* mem-region13 (spa/dcr3, dimm3) */
1771         memdev = nfit_buf + offset;
1772         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1773         memdev->header.length = sizeof(*memdev);
1774         memdev->device_handle = handle[3];
1775         memdev->physical_id = 3;
1776         memdev->region_id = 0;
1777         memdev->range_index = 9+1;
1778         memdev->region_index = 3+1;
1779         memdev->region_size = 0;
1780         memdev->region_offset = 0;
1781         memdev->address = 0;
1782         memdev->interleave_index = 0;
1783         memdev->interleave_ways = 1;
1784         memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
1785         offset += memdev->header.length;
1786
1787         /* dcr-descriptor0: blk */
1788         dcr = nfit_buf + offset;
1789         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1790         dcr->header.length = sizeof(*dcr);
1791         dcr->region_index = 0+1;
1792         dcr_common_init(dcr);
1793         dcr->serial_number = ~handle[0];
1794         dcr->code = NFIT_FIC_BLK;
1795         dcr->windows = 1;
1796         dcr->window_size = DCR_SIZE;
1797         dcr->command_offset = 0;
1798         dcr->command_size = 8;
1799         dcr->status_offset = 8;
1800         dcr->status_size = 4;
1801         offset += dcr->header.length;
1802
1803         /* dcr-descriptor1: blk */
1804         dcr = nfit_buf + offset;
1805         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1806         dcr->header.length = sizeof(*dcr);
1807         dcr->region_index = 1+1;
1808         dcr_common_init(dcr);
1809         dcr->serial_number = ~handle[1];
1810         dcr->code = NFIT_FIC_BLK;
1811         dcr->windows = 1;
1812         dcr->window_size = DCR_SIZE;
1813         dcr->command_offset = 0;
1814         dcr->command_size = 8;
1815         dcr->status_offset = 8;
1816         dcr->status_size = 4;
1817         offset += dcr->header.length;
1818
1819         /* dcr-descriptor2: blk */
1820         dcr = nfit_buf + offset;
1821         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1822         dcr->header.length = sizeof(*dcr);
1823         dcr->region_index = 2+1;
1824         dcr_common_init(dcr);
1825         dcr->serial_number = ~handle[2];
1826         dcr->code = NFIT_FIC_BLK;
1827         dcr->windows = 1;
1828         dcr->window_size = DCR_SIZE;
1829         dcr->command_offset = 0;
1830         dcr->command_size = 8;
1831         dcr->status_offset = 8;
1832         dcr->status_size = 4;
1833         offset += dcr->header.length;
1834
1835         /* dcr-descriptor3: blk */
1836         dcr = nfit_buf + offset;
1837         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1838         dcr->header.length = sizeof(*dcr);
1839         dcr->region_index = 3+1;
1840         dcr_common_init(dcr);
1841         dcr->serial_number = ~handle[3];
1842         dcr->code = NFIT_FIC_BLK;
1843         dcr->windows = 1;
1844         dcr->window_size = DCR_SIZE;
1845         dcr->command_offset = 0;
1846         dcr->command_size = 8;
1847         dcr->status_offset = 8;
1848         dcr->status_size = 4;
1849         offset += dcr->header.length;
1850
1851         /* dcr-descriptor0: pmem */
1852         dcr = nfit_buf + offset;
1853         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1854         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1855                         window_size);
1856         dcr->region_index = 4+1;
1857         dcr_common_init(dcr);
1858         dcr->serial_number = ~handle[0];
1859         dcr->code = NFIT_FIC_BYTEN;
1860         dcr->windows = 0;
1861         offset += dcr->header.length;
1862
1863         /* dcr-descriptor1: pmem */
1864         dcr = nfit_buf + offset;
1865         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1866         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1867                         window_size);
1868         dcr->region_index = 5+1;
1869         dcr_common_init(dcr);
1870         dcr->serial_number = ~handle[1];
1871         dcr->code = NFIT_FIC_BYTEN;
1872         dcr->windows = 0;
1873         offset += dcr->header.length;
1874
1875         /* dcr-descriptor2: pmem */
1876         dcr = nfit_buf + offset;
1877         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1878         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1879                         window_size);
1880         dcr->region_index = 6+1;
1881         dcr_common_init(dcr);
1882         dcr->serial_number = ~handle[2];
1883         dcr->code = NFIT_FIC_BYTEN;
1884         dcr->windows = 0;
1885         offset += dcr->header.length;
1886
1887         /* dcr-descriptor3: pmem */
1888         dcr = nfit_buf + offset;
1889         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1890         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1891                         window_size);
1892         dcr->region_index = 7+1;
1893         dcr_common_init(dcr);
1894         dcr->serial_number = ~handle[3];
1895         dcr->code = NFIT_FIC_BYTEN;
1896         dcr->windows = 0;
1897         offset += dcr->header.length;
1898
1899         /* bdw0 (spa/dcr0, dimm0) */
1900         bdw = nfit_buf + offset;
1901         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1902         bdw->header.length = sizeof(*bdw);
1903         bdw->region_index = 0+1;
1904         bdw->windows = 1;
1905         bdw->offset = 0;
1906         bdw->size = BDW_SIZE;
1907         bdw->capacity = DIMM_SIZE;
1908         bdw->start_address = 0;
1909         offset += bdw->header.length;
1910
1911         /* bdw1 (spa/dcr1, dimm1) */
1912         bdw = nfit_buf + offset;
1913         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1914         bdw->header.length = sizeof(*bdw);
1915         bdw->region_index = 1+1;
1916         bdw->windows = 1;
1917         bdw->offset = 0;
1918         bdw->size = BDW_SIZE;
1919         bdw->capacity = DIMM_SIZE;
1920         bdw->start_address = 0;
1921         offset += bdw->header.length;
1922
1923         /* bdw2 (spa/dcr2, dimm2) */
1924         bdw = nfit_buf + offset;
1925         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1926         bdw->header.length = sizeof(*bdw);
1927         bdw->region_index = 2+1;
1928         bdw->windows = 1;
1929         bdw->offset = 0;
1930         bdw->size = BDW_SIZE;
1931         bdw->capacity = DIMM_SIZE;
1932         bdw->start_address = 0;
1933         offset += bdw->header.length;
1934
1935         /* bdw3 (spa/dcr3, dimm3) */
1936         bdw = nfit_buf + offset;
1937         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1938         bdw->header.length = sizeof(*bdw);
1939         bdw->region_index = 3+1;
1940         bdw->windows = 1;
1941         bdw->offset = 0;
1942         bdw->size = BDW_SIZE;
1943         bdw->capacity = DIMM_SIZE;
1944         bdw->start_address = 0;
1945         offset += bdw->header.length;
1946
1947         /* flush0 (dimm0) */
1948         flush = nfit_buf + offset;
1949         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1950         flush->header.length = flush_hint_size;
1951         flush->device_handle = handle[0];
1952         flush->hint_count = NUM_HINTS;
1953         for (i = 0; i < NUM_HINTS; i++)
1954                 flush->hint_address[i] = t->flush_dma[0] + i * sizeof(u64);
1955         offset += flush->header.length;
1956
1957         /* flush1 (dimm1) */
1958         flush = nfit_buf + offset;
1959         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1960         flush->header.length = flush_hint_size;
1961         flush->device_handle = handle[1];
1962         flush->hint_count = NUM_HINTS;
1963         for (i = 0; i < NUM_HINTS; i++)
1964                 flush->hint_address[i] = t->flush_dma[1] + i * sizeof(u64);
1965         offset += flush->header.length;
1966
1967         /* flush2 (dimm2) */
1968         flush = nfit_buf + offset;
1969         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1970         flush->header.length = flush_hint_size;
1971         flush->device_handle = handle[2];
1972         flush->hint_count = NUM_HINTS;
1973         for (i = 0; i < NUM_HINTS; i++)
1974                 flush->hint_address[i] = t->flush_dma[2] + i * sizeof(u64);
1975         offset += flush->header.length;
1976
1977         /* flush3 (dimm3) */
1978         flush = nfit_buf + offset;
1979         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1980         flush->header.length = flush_hint_size;
1981         flush->device_handle = handle[3];
1982         flush->hint_count = NUM_HINTS;
1983         for (i = 0; i < NUM_HINTS; i++)
1984                 flush->hint_address[i] = t->flush_dma[3] + i * sizeof(u64);
1985         offset += flush->header.length;
1986
1987         /* platform capabilities */
1988         pcap = nfit_buf + offset;
1989         pcap->header.type = ACPI_NFIT_TYPE_CAPABILITIES;
1990         pcap->header.length = sizeof(*pcap);
1991         pcap->highest_capability = 1;
1992         pcap->capabilities = ACPI_NFIT_CAPABILITY_CACHE_FLUSH |
1993                 ACPI_NFIT_CAPABILITY_MEM_FLUSH;
1994         offset += pcap->header.length;
1995
1996         if (t->setup_hotplug) {
1997                 /* dcr-descriptor4: blk */
1998                 dcr = nfit_buf + offset;
1999                 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
2000                 dcr->header.length = sizeof(*dcr);
2001                 dcr->region_index = 8+1;
2002                 dcr_common_init(dcr);
2003                 dcr->serial_number = ~handle[4];
2004                 dcr->code = NFIT_FIC_BLK;
2005                 dcr->windows = 1;
2006                 dcr->window_size = DCR_SIZE;
2007                 dcr->command_offset = 0;
2008                 dcr->command_size = 8;
2009                 dcr->status_offset = 8;
2010                 dcr->status_size = 4;
2011                 offset += dcr->header.length;
2012
2013                 /* dcr-descriptor4: pmem */
2014                 dcr = nfit_buf + offset;
2015                 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
2016                 dcr->header.length = offsetof(struct acpi_nfit_control_region,
2017                                 window_size);
2018                 dcr->region_index = 9+1;
2019                 dcr_common_init(dcr);
2020                 dcr->serial_number = ~handle[4];
2021                 dcr->code = NFIT_FIC_BYTEN;
2022                 dcr->windows = 0;
2023                 offset += dcr->header.length;
2024
2025                 /* bdw4 (spa/dcr4, dimm4) */
2026                 bdw = nfit_buf + offset;
2027                 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
2028                 bdw->header.length = sizeof(*bdw);
2029                 bdw->region_index = 8+1;
2030                 bdw->windows = 1;
2031                 bdw->offset = 0;
2032                 bdw->size = BDW_SIZE;
2033                 bdw->capacity = DIMM_SIZE;
2034                 bdw->start_address = 0;
2035                 offset += bdw->header.length;
2036
2037                 /* spa10 (dcr4) dimm4 */
2038                 spa = nfit_buf + offset;
2039                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
2040                 spa->header.length = sizeof(*spa);
2041                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
2042                 spa->range_index = 10+1;
2043                 spa->address = t->dcr_dma[4];
2044                 spa->length = DCR_SIZE;
2045                 offset += spa->header.length;
2046
2047                 /*
2048                  * spa11 (single-dimm interleave for hotplug, note storage
2049                  * does not actually alias the related block-data-window
2050                  * regions)
2051                  */
2052                 spa = nfit_buf + offset;
2053                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
2054                 spa->header.length = sizeof(*spa);
2055                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
2056                 spa->range_index = 11+1;
2057                 spa->address = t->spa_set_dma[2];
2058                 spa->length = SPA0_SIZE;
2059                 offset += spa->header.length;
2060
2061                 /* spa12 (bdw for dcr4) dimm4 */
2062                 spa = nfit_buf + offset;
2063                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
2064                 spa->header.length = sizeof(*spa);
2065                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
2066                 spa->range_index = 12+1;
2067                 spa->address = t->dimm_dma[4];
2068                 spa->length = DIMM_SIZE;
2069                 offset += spa->header.length;
2070
2071                 /* mem-region14 (spa/dcr4, dimm4) */
2072                 memdev = nfit_buf + offset;
2073                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
2074                 memdev->header.length = sizeof(*memdev);
2075                 memdev->device_handle = handle[4];
2076                 memdev->physical_id = 4;
2077                 memdev->region_id = 0;
2078                 memdev->range_index = 10+1;
2079                 memdev->region_index = 8+1;
2080                 memdev->region_size = 0;
2081                 memdev->region_offset = 0;
2082                 memdev->address = 0;
2083                 memdev->interleave_index = 0;
2084                 memdev->interleave_ways = 1;
2085                 offset += memdev->header.length;
2086
2087                 /* mem-region15 (spa11, dimm4) */
2088                 memdev = nfit_buf + offset;
2089                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
2090                 memdev->header.length = sizeof(*memdev);
2091                 memdev->device_handle = handle[4];
2092                 memdev->physical_id = 4;
2093                 memdev->region_id = 0;
2094                 memdev->range_index = 11+1;
2095                 memdev->region_index = 9+1;
2096                 memdev->region_size = SPA0_SIZE;
2097                 memdev->region_offset = (1ULL << 48);
2098                 memdev->address = 0;
2099                 memdev->interleave_index = 0;
2100                 memdev->interleave_ways = 1;
2101                 memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED;
2102                 offset += memdev->header.length;
2103
2104                 /* mem-region16 (spa/bdw4, dimm4) */
2105                 memdev = nfit_buf + offset;
2106                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
2107                 memdev->header.length = sizeof(*memdev);
2108                 memdev->device_handle = handle[4];
2109                 memdev->physical_id = 4;
2110                 memdev->region_id = 0;
2111                 memdev->range_index = 12+1;
2112                 memdev->region_index = 8+1;
2113                 memdev->region_size = 0;
2114                 memdev->region_offset = 0;
2115                 memdev->address = 0;
2116                 memdev->interleave_index = 0;
2117                 memdev->interleave_ways = 1;
2118                 offset += memdev->header.length;
2119
2120                 /* flush3 (dimm4) */
2121                 flush = nfit_buf + offset;
2122                 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
2123                 flush->header.length = flush_hint_size;
2124                 flush->device_handle = handle[4];
2125                 flush->hint_count = NUM_HINTS;
2126                 for (i = 0; i < NUM_HINTS; i++)
2127                         flush->hint_address[i] = t->flush_dma[4]
2128                                 + i * sizeof(u64);
2129                 offset += flush->header.length;
2130
2131                 /* sanity check to make sure we've filled the buffer */
2132                 WARN_ON(offset != t->nfit_size);
2133         }
2134
2135         t->nfit_filled = offset;
2136
2137         post_ars_status(&t->ars_state, &t->badrange, t->spa_set_dma[0],
2138                         SPA0_SIZE);
2139
2140         acpi_desc = &t->acpi_desc;
2141         set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_cmd_force_en);
2142         set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
2143         set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
2144         set_bit(ND_INTEL_SMART, &acpi_desc->dimm_cmd_force_en);
2145         set_bit(ND_INTEL_SMART_THRESHOLD, &acpi_desc->dimm_cmd_force_en);
2146         set_bit(ND_INTEL_SMART_SET_THRESHOLD, &acpi_desc->dimm_cmd_force_en);
2147         set_bit(ND_INTEL_SMART_INJECT, &acpi_desc->dimm_cmd_force_en);
2148         set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
2149         set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
2150         set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
2151         set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en);
2152         set_bit(ND_CMD_CALL, &acpi_desc->bus_cmd_force_en);
2153         set_bit(NFIT_CMD_TRANSLATE_SPA, &acpi_desc->bus_nfit_cmd_force_en);
2154         set_bit(NFIT_CMD_ARS_INJECT_SET, &acpi_desc->bus_nfit_cmd_force_en);
2155         set_bit(NFIT_CMD_ARS_INJECT_CLEAR, &acpi_desc->bus_nfit_cmd_force_en);
2156         set_bit(NFIT_CMD_ARS_INJECT_GET, &acpi_desc->bus_nfit_cmd_force_en);
2157         set_bit(ND_INTEL_FW_GET_INFO, &acpi_desc->dimm_cmd_force_en);
2158         set_bit(ND_INTEL_FW_START_UPDATE, &acpi_desc->dimm_cmd_force_en);
2159         set_bit(ND_INTEL_FW_SEND_DATA, &acpi_desc->dimm_cmd_force_en);
2160         set_bit(ND_INTEL_FW_FINISH_UPDATE, &acpi_desc->dimm_cmd_force_en);
2161         set_bit(ND_INTEL_FW_FINISH_QUERY, &acpi_desc->dimm_cmd_force_en);
2162         set_bit(ND_INTEL_ENABLE_LSS_STATUS, &acpi_desc->dimm_cmd_force_en);
2163 }
2164
2165 static void nfit_test1_setup(struct nfit_test *t)
2166 {
2167         size_t offset;
2168         void *nfit_buf = t->nfit_buf;
2169         struct acpi_nfit_memory_map *memdev;
2170         struct acpi_nfit_control_region *dcr;
2171         struct acpi_nfit_system_address *spa;
2172         struct acpi_nfit_desc *acpi_desc;
2173
2174         offset = 0;
2175         /* spa0 (flat range with no bdw aliasing) */
2176         spa = nfit_buf + offset;
2177         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
2178         spa->header.length = sizeof(*spa);
2179         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
2180         spa->range_index = 0+1;
2181         spa->address = t->spa_set_dma[0];
2182         spa->length = SPA2_SIZE;
2183         offset += spa->header.length;
2184
2185         /* virtual cd region */
2186         spa = nfit_buf + offset;
2187         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
2188         spa->header.length = sizeof(*spa);
2189         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_VCD), 16);
2190         spa->range_index = 0;
2191         spa->address = t->spa_set_dma[1];
2192         spa->length = SPA_VCD_SIZE;
2193         offset += spa->header.length;
2194
2195         /* mem-region0 (spa0, dimm0) */
2196         memdev = nfit_buf + offset;
2197         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
2198         memdev->header.length = sizeof(*memdev);
2199         memdev->device_handle = handle[5];
2200         memdev->physical_id = 0;
2201         memdev->region_id = 0;
2202         memdev->range_index = 0+1;
2203         memdev->region_index = 0+1;
2204         memdev->region_size = SPA2_SIZE;
2205         memdev->region_offset = 0;
2206         memdev->address = 0;
2207         memdev->interleave_index = 0;
2208         memdev->interleave_ways = 1;
2209         memdev->flags = ACPI_NFIT_MEM_SAVE_FAILED | ACPI_NFIT_MEM_RESTORE_FAILED
2210                 | ACPI_NFIT_MEM_FLUSH_FAILED | ACPI_NFIT_MEM_HEALTH_OBSERVED
2211                 | ACPI_NFIT_MEM_NOT_ARMED;
2212         offset += memdev->header.length;
2213
2214         /* dcr-descriptor0 */
2215         dcr = nfit_buf + offset;
2216         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
2217         dcr->header.length = offsetof(struct acpi_nfit_control_region,
2218                         window_size);
2219         dcr->region_index = 0+1;
2220         dcr_common_init(dcr);
2221         dcr->serial_number = ~handle[5];
2222         dcr->code = NFIT_FIC_BYTE;
2223         dcr->windows = 0;
2224         offset += dcr->header.length;
2225
2226         memdev = nfit_buf + offset;
2227         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
2228         memdev->header.length = sizeof(*memdev);
2229         memdev->device_handle = handle[6];
2230         memdev->physical_id = 0;
2231         memdev->region_id = 0;
2232         memdev->range_index = 0;
2233         memdev->region_index = 0+2;
2234         memdev->region_size = SPA2_SIZE;
2235         memdev->region_offset = 0;
2236         memdev->address = 0;
2237         memdev->interleave_index = 0;
2238         memdev->interleave_ways = 1;
2239         memdev->flags = ACPI_NFIT_MEM_MAP_FAILED;
2240         offset += memdev->header.length;
2241
2242         /* dcr-descriptor1 */
2243         dcr = nfit_buf + offset;
2244         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
2245         dcr->header.length = offsetof(struct acpi_nfit_control_region,
2246                         window_size);
2247         dcr->region_index = 0+2;
2248         dcr_common_init(dcr);
2249         dcr->serial_number = ~handle[6];
2250         dcr->code = NFIT_FIC_BYTE;
2251         dcr->windows = 0;
2252         offset += dcr->header.length;
2253
2254         /* sanity check to make sure we've filled the buffer */
2255         WARN_ON(offset != t->nfit_size);
2256
2257         t->nfit_filled = offset;
2258
2259         post_ars_status(&t->ars_state, &t->badrange, t->spa_set_dma[0],
2260                         SPA2_SIZE);
2261
2262         acpi_desc = &t->acpi_desc;
2263         set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
2264         set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
2265         set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
2266         set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en);
2267         set_bit(ND_INTEL_ENABLE_LSS_STATUS, &acpi_desc->dimm_cmd_force_en);
2268         set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_cmd_force_en);
2269         set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
2270         set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
2271 }
2272
2273 static int nfit_test_blk_do_io(struct nd_blk_region *ndbr, resource_size_t dpa,
2274                 void *iobuf, u64 len, int rw)
2275 {
2276         struct nfit_blk *nfit_blk = ndbr->blk_provider_data;
2277         struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
2278         struct nd_region *nd_region = &ndbr->nd_region;
2279         unsigned int lane;
2280
2281         lane = nd_region_acquire_lane(nd_region);
2282         if (rw)
2283                 memcpy(mmio->addr.base + dpa, iobuf, len);
2284         else {
2285                 memcpy(iobuf, mmio->addr.base + dpa, len);
2286
2287                 /* give us some some coverage of the arch_invalidate_pmem() API */
2288                 arch_invalidate_pmem(mmio->addr.base + dpa, len);
2289         }
2290         nd_region_release_lane(nd_region, lane);
2291
2292         return 0;
2293 }
2294
2295 static unsigned long nfit_ctl_handle;
2296
2297 union acpi_object *result;
2298
2299 static union acpi_object *nfit_test_evaluate_dsm(acpi_handle handle,
2300                 const guid_t *guid, u64 rev, u64 func, union acpi_object *argv4)
2301 {
2302         if (handle != &nfit_ctl_handle)
2303                 return ERR_PTR(-ENXIO);
2304
2305         return result;
2306 }
2307
2308 static int setup_result(void *buf, size_t size)
2309 {
2310         result = kmalloc(sizeof(union acpi_object) + size, GFP_KERNEL);
2311         if (!result)
2312                 return -ENOMEM;
2313         result->package.type = ACPI_TYPE_BUFFER,
2314         result->buffer.pointer = (void *) (result + 1);
2315         result->buffer.length = size;
2316         memcpy(result->buffer.pointer, buf, size);
2317         memset(buf, 0, size);
2318         return 0;
2319 }
2320
2321 static int nfit_ctl_test(struct device *dev)
2322 {
2323         int rc, cmd_rc;
2324         struct nvdimm *nvdimm;
2325         struct acpi_device *adev;
2326         struct nfit_mem *nfit_mem;
2327         struct nd_ars_record *record;
2328         struct acpi_nfit_desc *acpi_desc;
2329         const u64 test_val = 0x0123456789abcdefULL;
2330         unsigned long mask, cmd_size, offset;
2331         union {
2332                 struct nd_cmd_get_config_size cfg_size;
2333                 struct nd_cmd_clear_error clear_err;
2334                 struct nd_cmd_ars_status ars_stat;
2335                 struct nd_cmd_ars_cap ars_cap;
2336                 char buf[sizeof(struct nd_cmd_ars_status)
2337                         + sizeof(struct nd_ars_record)];
2338         } cmds;
2339
2340         adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL);
2341         if (!adev)
2342                 return -ENOMEM;
2343         *adev = (struct acpi_device) {
2344                 .handle = &nfit_ctl_handle,
2345                 .dev = {
2346                         .init_name = "test-adev",
2347                 },
2348         };
2349
2350         acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
2351         if (!acpi_desc)
2352                 return -ENOMEM;
2353         *acpi_desc = (struct acpi_nfit_desc) {
2354                 .nd_desc = {
2355                         .cmd_mask = 1UL << ND_CMD_ARS_CAP
2356                                 | 1UL << ND_CMD_ARS_START
2357                                 | 1UL << ND_CMD_ARS_STATUS
2358                                 | 1UL << ND_CMD_CLEAR_ERROR
2359                                 | 1UL << ND_CMD_CALL,
2360                         .module = THIS_MODULE,
2361                         .provider_name = "ACPI.NFIT",
2362                         .ndctl = acpi_nfit_ctl,
2363                         .bus_dsm_mask = 1UL << NFIT_CMD_TRANSLATE_SPA
2364                                 | 1UL << NFIT_CMD_ARS_INJECT_SET
2365                                 | 1UL << NFIT_CMD_ARS_INJECT_CLEAR
2366                                 | 1UL << NFIT_CMD_ARS_INJECT_GET,
2367                 },
2368                 .dev = &adev->dev,
2369         };
2370
2371         nfit_mem = devm_kzalloc(dev, sizeof(*nfit_mem), GFP_KERNEL);
2372         if (!nfit_mem)
2373                 return -ENOMEM;
2374
2375         mask = 1UL << ND_CMD_SMART | 1UL << ND_CMD_SMART_THRESHOLD
2376                 | 1UL << ND_CMD_DIMM_FLAGS | 1UL << ND_CMD_GET_CONFIG_SIZE
2377                 | 1UL << ND_CMD_GET_CONFIG_DATA | 1UL << ND_CMD_SET_CONFIG_DATA
2378                 | 1UL << ND_CMD_VENDOR;
2379         *nfit_mem = (struct nfit_mem) {
2380                 .adev = adev,
2381                 .family = NVDIMM_FAMILY_INTEL,
2382                 .dsm_mask = mask,
2383         };
2384
2385         nvdimm = devm_kzalloc(dev, sizeof(*nvdimm), GFP_KERNEL);
2386         if (!nvdimm)
2387                 return -ENOMEM;
2388         *nvdimm = (struct nvdimm) {
2389                 .provider_data = nfit_mem,
2390                 .cmd_mask = mask,
2391                 .dev = {
2392                         .init_name = "test-dimm",
2393                 },
2394         };
2395
2396
2397         /* basic checkout of a typical 'get config size' command */
2398         cmd_size = sizeof(cmds.cfg_size);
2399         cmds.cfg_size = (struct nd_cmd_get_config_size) {
2400                 .status = 0,
2401                 .config_size = SZ_128K,
2402                 .max_xfer = SZ_4K,
2403         };
2404         rc = setup_result(cmds.buf, cmd_size);
2405         if (rc)
2406                 return rc;
2407         rc = acpi_nfit_ctl(&acpi_desc->nd_desc, nvdimm, ND_CMD_GET_CONFIG_SIZE,
2408                         cmds.buf, cmd_size, &cmd_rc);
2409
2410         if (rc < 0 || cmd_rc || cmds.cfg_size.status != 0
2411                         || cmds.cfg_size.config_size != SZ_128K
2412                         || cmds.cfg_size.max_xfer != SZ_4K) {
2413                 dev_dbg(dev, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2414                                 __func__, __LINE__, rc, cmd_rc);
2415                 return -EIO;
2416         }
2417
2418
2419         /* test ars_status with zero output */
2420         cmd_size = offsetof(struct nd_cmd_ars_status, address);
2421         cmds.ars_stat = (struct nd_cmd_ars_status) {
2422                 .out_length = 0,
2423         };
2424         rc = setup_result(cmds.buf, cmd_size);
2425         if (rc)
2426                 return rc;
2427         rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_ARS_STATUS,
2428                         cmds.buf, cmd_size, &cmd_rc);
2429
2430         if (rc < 0 || cmd_rc) {
2431                 dev_dbg(dev, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2432                                 __func__, __LINE__, rc, cmd_rc);
2433                 return -EIO;
2434         }
2435
2436
2437         /* test ars_cap with benign extended status */
2438         cmd_size = sizeof(cmds.ars_cap);
2439         cmds.ars_cap = (struct nd_cmd_ars_cap) {
2440                 .status = ND_ARS_PERSISTENT << 16,
2441         };
2442         offset = offsetof(struct nd_cmd_ars_cap, status);
2443         rc = setup_result(cmds.buf + offset, cmd_size - offset);
2444         if (rc)
2445                 return rc;
2446         rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_ARS_CAP,
2447                         cmds.buf, cmd_size, &cmd_rc);
2448
2449         if (rc < 0 || cmd_rc) {
2450                 dev_dbg(dev, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2451                                 __func__, __LINE__, rc, cmd_rc);
2452                 return -EIO;
2453         }
2454
2455
2456         /* test ars_status with 'status' trimmed from 'out_length' */
2457         cmd_size = sizeof(cmds.ars_stat) + sizeof(struct nd_ars_record);
2458         cmds.ars_stat = (struct nd_cmd_ars_status) {
2459                 .out_length = cmd_size - 4,
2460         };
2461         record = &cmds.ars_stat.records[0];
2462         *record = (struct nd_ars_record) {
2463                 .length = test_val,
2464         };
2465         rc = setup_result(cmds.buf, cmd_size);
2466         if (rc)
2467                 return rc;
2468         rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_ARS_STATUS,
2469                         cmds.buf, cmd_size, &cmd_rc);
2470
2471         if (rc < 0 || cmd_rc || record->length != test_val) {
2472                 dev_dbg(dev, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2473                                 __func__, __LINE__, rc, cmd_rc);
2474                 return -EIO;
2475         }
2476
2477
2478         /* test ars_status with 'Output (Size)' including 'status' */
2479         cmd_size = sizeof(cmds.ars_stat) + sizeof(struct nd_ars_record);
2480         cmds.ars_stat = (struct nd_cmd_ars_status) {
2481                 .out_length = cmd_size,
2482         };
2483         record = &cmds.ars_stat.records[0];
2484         *record = (struct nd_ars_record) {
2485                 .length = test_val,
2486         };
2487         rc = setup_result(cmds.buf, cmd_size);
2488         if (rc)
2489                 return rc;
2490         rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_ARS_STATUS,
2491                         cmds.buf, cmd_size, &cmd_rc);
2492
2493         if (rc < 0 || cmd_rc || record->length != test_val) {
2494                 dev_dbg(dev, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2495                                 __func__, __LINE__, rc, cmd_rc);
2496                 return -EIO;
2497         }
2498
2499
2500         /* test extended status for get_config_size results in failure */
2501         cmd_size = sizeof(cmds.cfg_size);
2502         cmds.cfg_size = (struct nd_cmd_get_config_size) {
2503                 .status = 1 << 16,
2504         };
2505         rc = setup_result(cmds.buf, cmd_size);
2506         if (rc)
2507                 return rc;
2508         rc = acpi_nfit_ctl(&acpi_desc->nd_desc, nvdimm, ND_CMD_GET_CONFIG_SIZE,
2509                         cmds.buf, cmd_size, &cmd_rc);
2510
2511         if (rc < 0 || cmd_rc >= 0) {
2512                 dev_dbg(dev, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2513                                 __func__, __LINE__, rc, cmd_rc);
2514                 return -EIO;
2515         }
2516
2517         /* test clear error */
2518         cmd_size = sizeof(cmds.clear_err);
2519         cmds.clear_err = (struct nd_cmd_clear_error) {
2520                 .length = 512,
2521                 .cleared = 512,
2522         };
2523         rc = setup_result(cmds.buf, cmd_size);
2524         if (rc)
2525                 return rc;
2526         rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_CLEAR_ERROR,
2527                         cmds.buf, cmd_size, &cmd_rc);
2528         if (rc < 0 || cmd_rc) {
2529                 dev_dbg(dev, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2530                                 __func__, __LINE__, rc, cmd_rc);
2531                 return -EIO;
2532         }
2533
2534         return 0;
2535 }
2536
2537 static int nfit_test_probe(struct platform_device *pdev)
2538 {
2539         struct nvdimm_bus_descriptor *nd_desc;
2540         struct acpi_nfit_desc *acpi_desc;
2541         struct device *dev = &pdev->dev;
2542         struct nfit_test *nfit_test;
2543         struct nfit_mem *nfit_mem;
2544         union acpi_object *obj;
2545         int rc;
2546
2547         if (strcmp(dev_name(&pdev->dev), "nfit_test.0") == 0) {
2548                 rc = nfit_ctl_test(&pdev->dev);
2549                 if (rc)
2550                         return rc;
2551         }
2552
2553         nfit_test = to_nfit_test(&pdev->dev);
2554
2555         /* common alloc */
2556         if (nfit_test->num_dcr) {
2557                 int num = nfit_test->num_dcr;
2558
2559                 nfit_test->dimm = devm_kcalloc(dev, num, sizeof(void *),
2560                                 GFP_KERNEL);
2561                 nfit_test->dimm_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
2562                                 GFP_KERNEL);
2563                 nfit_test->flush = devm_kcalloc(dev, num, sizeof(void *),
2564                                 GFP_KERNEL);
2565                 nfit_test->flush_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
2566                                 GFP_KERNEL);
2567                 nfit_test->label = devm_kcalloc(dev, num, sizeof(void *),
2568                                 GFP_KERNEL);
2569                 nfit_test->label_dma = devm_kcalloc(dev, num,
2570                                 sizeof(dma_addr_t), GFP_KERNEL);
2571                 nfit_test->dcr = devm_kcalloc(dev, num,
2572                                 sizeof(struct nfit_test_dcr *), GFP_KERNEL);
2573                 nfit_test->dcr_dma = devm_kcalloc(dev, num,
2574                                 sizeof(dma_addr_t), GFP_KERNEL);
2575                 nfit_test->smart = devm_kcalloc(dev, num,
2576                                 sizeof(struct nd_intel_smart), GFP_KERNEL);
2577                 nfit_test->smart_threshold = devm_kcalloc(dev, num,
2578                                 sizeof(struct nd_intel_smart_threshold),
2579                                 GFP_KERNEL);
2580                 nfit_test->fw = devm_kcalloc(dev, num,
2581                                 sizeof(struct nfit_test_fw), GFP_KERNEL);
2582                 if (nfit_test->dimm && nfit_test->dimm_dma && nfit_test->label
2583                                 && nfit_test->label_dma && nfit_test->dcr
2584                                 && nfit_test->dcr_dma && nfit_test->flush
2585                                 && nfit_test->flush_dma
2586                                 && nfit_test->fw)
2587                         /* pass */;
2588                 else
2589                         return -ENOMEM;
2590         }
2591
2592         if (nfit_test->num_pm) {
2593                 int num = nfit_test->num_pm;
2594
2595                 nfit_test->spa_set = devm_kcalloc(dev, num, sizeof(void *),
2596                                 GFP_KERNEL);
2597                 nfit_test->spa_set_dma = devm_kcalloc(dev, num,
2598                                 sizeof(dma_addr_t), GFP_KERNEL);
2599                 if (nfit_test->spa_set && nfit_test->spa_set_dma)
2600                         /* pass */;
2601                 else
2602                         return -ENOMEM;
2603         }
2604
2605         /* per-nfit specific alloc */
2606         if (nfit_test->alloc(nfit_test))
2607                 return -ENOMEM;
2608
2609         nfit_test->setup(nfit_test);
2610         acpi_desc = &nfit_test->acpi_desc;
2611         acpi_nfit_desc_init(acpi_desc, &pdev->dev);
2612         acpi_desc->blk_do_io = nfit_test_blk_do_io;
2613         nd_desc = &acpi_desc->nd_desc;
2614         nd_desc->provider_name = NULL;
2615         nd_desc->module = THIS_MODULE;
2616         nd_desc->ndctl = nfit_test_ctl;
2617
2618         rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_buf,
2619                         nfit_test->nfit_filled);
2620         if (rc)
2621                 return rc;
2622
2623         rc = devm_add_action_or_reset(&pdev->dev, acpi_nfit_shutdown, acpi_desc);
2624         if (rc)
2625                 return rc;
2626
2627         if (nfit_test->setup != nfit_test0_setup)
2628                 return 0;
2629
2630         nfit_test->setup_hotplug = 1;
2631         nfit_test->setup(nfit_test);
2632
2633         obj = kzalloc(sizeof(*obj), GFP_KERNEL);
2634         if (!obj)
2635                 return -ENOMEM;
2636         obj->type = ACPI_TYPE_BUFFER;
2637         obj->buffer.length = nfit_test->nfit_size;
2638         obj->buffer.pointer = nfit_test->nfit_buf;
2639         *(nfit_test->_fit) = obj;
2640         __acpi_nfit_notify(&pdev->dev, nfit_test, 0x80);
2641
2642         /* associate dimm devices with nfit_mem data for notification testing */
2643         mutex_lock(&acpi_desc->init_mutex);
2644         list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
2645                 u32 nfit_handle = __to_nfit_memdev(nfit_mem)->device_handle;
2646                 int i;
2647
2648                 for (i = 0; i < NUM_DCR; i++)
2649                         if (nfit_handle == handle[i])
2650                                 dev_set_drvdata(nfit_test->dimm_dev[i],
2651                                                 nfit_mem);
2652         }
2653         mutex_unlock(&acpi_desc->init_mutex);
2654
2655         return 0;
2656 }
2657
2658 static int nfit_test_remove(struct platform_device *pdev)
2659 {
2660         return 0;
2661 }
2662
2663 static void nfit_test_release(struct device *dev)
2664 {
2665         struct nfit_test *nfit_test = to_nfit_test(dev);
2666
2667         kfree(nfit_test);
2668 }
2669
2670 static const struct platform_device_id nfit_test_id[] = {
2671         { KBUILD_MODNAME },
2672         { },
2673 };
2674
2675 static struct platform_driver nfit_test_driver = {
2676         .probe = nfit_test_probe,
2677         .remove = nfit_test_remove,
2678         .driver = {
2679                 .name = KBUILD_MODNAME,
2680         },
2681         .id_table = nfit_test_id,
2682 };
2683
2684 static __init int nfit_test_init(void)
2685 {
2686         int rc, i;
2687
2688         pmem_test();
2689         libnvdimm_test();
2690         acpi_nfit_test();
2691         device_dax_test();
2692
2693         nfit_test_setup(nfit_test_lookup, nfit_test_evaluate_dsm);
2694
2695         nfit_wq = create_singlethread_workqueue("nfit");
2696         if (!nfit_wq)
2697                 return -ENOMEM;
2698
2699         nfit_test_dimm = class_create(THIS_MODULE, "nfit_test_dimm");
2700         if (IS_ERR(nfit_test_dimm)) {
2701                 rc = PTR_ERR(nfit_test_dimm);
2702                 goto err_register;
2703         }
2704
2705         for (i = 0; i < NUM_NFITS; i++) {
2706                 struct nfit_test *nfit_test;
2707                 struct platform_device *pdev;
2708
2709                 nfit_test = kzalloc(sizeof(*nfit_test), GFP_KERNEL);
2710                 if (!nfit_test) {
2711                         rc = -ENOMEM;
2712                         goto err_register;
2713                 }
2714                 INIT_LIST_HEAD(&nfit_test->resources);
2715                 badrange_init(&nfit_test->badrange);
2716                 switch (i) {
2717                 case 0:
2718                         nfit_test->num_pm = NUM_PM;
2719                         nfit_test->dcr_idx = 0;
2720                         nfit_test->num_dcr = NUM_DCR;
2721                         nfit_test->alloc = nfit_test0_alloc;
2722                         nfit_test->setup = nfit_test0_setup;
2723                         break;
2724                 case 1:
2725                         nfit_test->num_pm = 2;
2726                         nfit_test->dcr_idx = NUM_DCR;
2727                         nfit_test->num_dcr = 2;
2728                         nfit_test->alloc = nfit_test1_alloc;
2729                         nfit_test->setup = nfit_test1_setup;
2730                         break;
2731                 default:
2732                         rc = -EINVAL;
2733                         goto err_register;
2734                 }
2735                 pdev = &nfit_test->pdev;
2736                 pdev->name = KBUILD_MODNAME;
2737                 pdev->id = i;
2738                 pdev->dev.release = nfit_test_release;
2739                 rc = platform_device_register(pdev);
2740                 if (rc) {
2741                         put_device(&pdev->dev);
2742                         goto err_register;
2743                 }
2744                 get_device(&pdev->dev);
2745
2746                 rc = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2747                 if (rc)
2748                         goto err_register;
2749
2750                 instances[i] = nfit_test;
2751                 INIT_WORK(&nfit_test->work, uc_error_notify);
2752         }
2753
2754         rc = platform_driver_register(&nfit_test_driver);
2755         if (rc)
2756                 goto err_register;
2757         return 0;
2758
2759  err_register:
2760         destroy_workqueue(nfit_wq);
2761         for (i = 0; i < NUM_NFITS; i++)
2762                 if (instances[i])
2763                         platform_device_unregister(&instances[i]->pdev);
2764         nfit_test_teardown();
2765         for (i = 0; i < NUM_NFITS; i++)
2766                 if (instances[i])
2767                         put_device(&instances[i]->pdev.dev);
2768
2769         return rc;
2770 }
2771
2772 static __exit void nfit_test_exit(void)
2773 {
2774         int i;
2775
2776         flush_workqueue(nfit_wq);
2777         destroy_workqueue(nfit_wq);
2778         for (i = 0; i < NUM_NFITS; i++)
2779                 platform_device_unregister(&instances[i]->pdev);
2780         platform_driver_unregister(&nfit_test_driver);
2781         nfit_test_teardown();
2782
2783         for (i = 0; i < NUM_NFITS; i++)
2784                 put_device(&instances[i]->pdev.dev);
2785         class_destroy(nfit_test_dimm);
2786 }
2787
2788 module_init(nfit_test_init);
2789 module_exit(nfit_test_exit);
2790 MODULE_LICENSE("GPL v2");
2791 MODULE_AUTHOR("Intel Corporation");