tools/power/x86/turbostat/turbostat.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * turbostat -- show CPU frequency and C-state residency
   4  * on modern Intel and AMD processors.
   5  *
   6  * Copyright (c) 2013 Intel Corporation.
   7  * Len Brown <len.brown@intel.com>
   8  */
   9
  10 #define _GNU_SOURCE
  11 #include MSRHEADER
  12 #include INTEL_FAMILY_HEADER
  13 #include <stdarg.h>
  14 #include <stdio.h>
  15 #include <err.h>
  16 #include <unistd.h>
  17 #include <sys/types.h>
  18 #include <sys/wait.h>
  19 #include <sys/stat.h>
  20 #include <sys/select.h>
  21 #include <sys/resource.h>
  22 #include <fcntl.h>
  23 #include <signal.h>
  24 #include <sys/time.h>
  25 #include <stdlib.h>
  26 #include <getopt.h>
  27 #include <dirent.h>
  28 #include <string.h>
  29 #include <ctype.h>
  30 #include <sched.h>
  31 #include <time.h>
  32 #include <cpuid.h>
  33 #include <sys/capability.h>
  34 #include <errno.h>
  35 #include <math.h>
  36 #include <linux/perf_event.h>
  37 #include <asm/unistd.h>
  38
  39 char *proc_stat = "/proc/stat";
  40 FILE *outf;
  41 int *fd_percpu;
  42 int *fd_instr_count_percpu;
  43 struct timeval interval_tv = {5, 0};
  44 struct timespec interval_ts = {5, 0};
  45 unsigned int num_iterations;
  46 unsigned int debug;
  47 unsigned int quiet;
  48 unsigned int shown;
  49 unsigned int sums_need_wide_columns;
  50 unsigned int rapl_joules;
  51 unsigned int summary_only;
  52 unsigned int list_header_only;
  53 unsigned int dump_only;
  54 unsigned int do_snb_cstates;
  55 unsigned int do_knl_cstates;
  56 unsigned int do_slm_cstates;
  57 unsigned int use_c1_residency_msr;
  58 unsigned int has_aperf;
  59 unsigned int has_epb;
  60 unsigned int do_irtl_snb;
  61 unsigned int do_irtl_hsw;
  62 unsigned int units = 1000000;   /* MHz etc */
  63 unsigned int genuine_intel;
  64 unsigned int authentic_amd;
  65 unsigned int hygon_genuine;
  66 unsigned int max_level, max_extended_level;
  67 unsigned int has_invariant_tsc;
  68 unsigned int do_nhm_platform_info;
  69 unsigned int no_MSR_MISC_PWR_MGMT;
  70 unsigned int aperf_mperf_multiplier = 1;
  71 double bclk;
  72 double base_hz;
  73 unsigned int has_base_hz;
  74 double tsc_tweak = 1.0;
  75 unsigned int show_pkg_only;
  76 unsigned int show_core_only;
  77 char *output_buffer, *outp;
  78 unsigned int do_rapl;
  79 unsigned int do_dts;
  80 unsigned int do_ptm;
  81 unsigned int do_ipc;
  82 unsigned long long  gfx_cur_rc6_ms;
  83 unsigned long long cpuidle_cur_cpu_lpi_us;
  84 unsigned long long cpuidle_cur_sys_lpi_us;
  85 unsigned int gfx_cur_mhz;
  86 unsigned int gfx_act_mhz;
  87 unsigned int tcc_activation_temp;
  88 unsigned int tcc_activation_temp_override;
  89 double rapl_power_units, rapl_time_units;
  90 double rapl_dram_energy_units, rapl_energy_units;
  91 double rapl_joule_counter_range;
  92 unsigned int do_core_perf_limit_reasons;
  93 unsigned int has_automatic_cstate_conversion;
  94 unsigned int do_gfx_perf_limit_reasons;
  95 unsigned int do_ring_perf_limit_reasons;
  96 unsigned int crystal_hz;
  97 unsigned long long tsc_hz;
  98 int base_cpu;
  99 double discover_bclk(unsigned int family, unsigned int model);
 100 unsigned int has_hwp;   /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
 101                         /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
 102 unsigned int has_hwp_notify;            /* IA32_HWP_INTERRUPT */
 103 unsigned int has_hwp_activity_window;   /* IA32_HWP_REQUEST[bits 41:32] */
 104 unsigned int has_hwp_epp;               /* IA32_HWP_REQUEST[bits 31:24] */
 105 unsigned int has_hwp_pkg;               /* IA32_HWP_REQUEST_PKG */
 106 unsigned int has_misc_feature_control;
 107 unsigned int first_counter_read = 1;
 108 int ignore_stdin;
 109
 110 #define RAPL_PKG                (1 << 0)
 111                                         /* 0x610 MSR_PKG_POWER_LIMIT */
 112                                         /* 0x611 MSR_PKG_ENERGY_STATUS */
 113 #define RAPL_PKG_PERF_STATUS    (1 << 1)
 114                                         /* 0x613 MSR_PKG_PERF_STATUS */
 115 #define RAPL_PKG_POWER_INFO     (1 << 2)
 116                                         /* 0x614 MSR_PKG_POWER_INFO */
 117
 118 #define RAPL_DRAM               (1 << 3)
 119                                         /* 0x618 MSR_DRAM_POWER_LIMIT */
 120                                         /* 0x619 MSR_DRAM_ENERGY_STATUS */
 121 #define RAPL_DRAM_PERF_STATUS   (1 << 4)
 122                                         /* 0x61b MSR_DRAM_PERF_STATUS */
 123 #define RAPL_DRAM_POWER_INFO    (1 << 5)
 124                                         /* 0x61c MSR_DRAM_POWER_INFO */
 125
 126 #define RAPL_CORES_POWER_LIMIT  (1 << 6)
 127                                         /* 0x638 MSR_PP0_POWER_LIMIT */
 128 #define RAPL_CORE_POLICY        (1 << 7)
 129                                         /* 0x63a MSR_PP0_POLICY */
 130
 131 #define RAPL_GFX                (1 << 8)
 132                                         /* 0x640 MSR_PP1_POWER_LIMIT */
 133                                         /* 0x641 MSR_PP1_ENERGY_STATUS */
 134                                         /* 0x642 MSR_PP1_POLICY */
 135
 136 #define RAPL_CORES_ENERGY_STATUS        (1 << 9)
 137                                         /* 0x639 MSR_PP0_ENERGY_STATUS */
 138 #define RAPL_PER_CORE_ENERGY    (1 << 10)
 139                                         /* Indicates cores energy collection is per-core,
 140                                          * not per-package. */
 141 #define RAPL_AMD_F17H           (1 << 11)
 142                                         /* 0xc0010299 MSR_RAPL_PWR_UNIT */
 143                                         /* 0xc001029a MSR_CORE_ENERGY_STAT */
 144                                         /* 0xc001029b MSR_PKG_ENERGY_STAT */
 145 #define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
 146 #define TJMAX_DEFAULT   100
 147
 148 /* MSRs that are not yet in the kernel-provided header. */
 149 #define MSR_RAPL_PWR_UNIT       0xc0010299
 150 #define MSR_CORE_ENERGY_STAT    0xc001029a
 151 #define MSR_PKG_ENERGY_STAT     0xc001029b
 152
 153 #define MAX(a, b) ((a) > (b) ? (a) : (b))
 154
 155 /*
 156  * buffer size used by sscanf() for added column names
 157  * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
 158  */
 159 #define NAME_BYTES 20
 160 #define PATH_BYTES 128
 161
 162 int backwards_count;
 163 char *progname;
 164
 165 #define CPU_SUBSET_MAXCPUS      1024    /* need to use before probe... */
 166 cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
 167 size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
 168 #define MAX_ADDED_COUNTERS 8
 169 #define MAX_ADDED_THREAD_COUNTERS 24
 170 #define BITMASK_SIZE 32
 171
 172 struct thread_data {
 173         struct timeval tv_begin;
 174         struct timeval tv_end;
 175         struct timeval tv_delta;
 176         unsigned long long tsc;
 177         unsigned long long aperf;
 178         unsigned long long mperf;
 179         unsigned long long c1;
 180         unsigned long long instr_count;
 181         unsigned long long  irq_count;
 182         unsigned int smi_count;
 183         unsigned int cpu_id;
 184         unsigned int apic_id;
 185         unsigned int x2apic_id;
 186         unsigned int flags;
 187 #define CPU_IS_FIRST_THREAD_IN_CORE     0x2
 188 #define CPU_IS_FIRST_CORE_IN_PACKAGE    0x4
 189         unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
 190 } *thread_even, *thread_odd;
 191
 192 struct core_data {
 193         unsigned long long c3;
 194         unsigned long long c6;
 195         unsigned long long c7;
 196         unsigned long long mc6_us;      /* duplicate as per-core for now, even though per module */
 197         unsigned int core_temp_c;
 198         unsigned int core_energy;       /* MSR_CORE_ENERGY_STAT */
 199         unsigned int core_id;
 200         unsigned long long counter[MAX_ADDED_COUNTERS];
 201 } *core_even, *core_odd;
 202
 203 struct pkg_data {
 204         unsigned long long pc2;
 205         unsigned long long pc3;
 206         unsigned long long pc6;
 207         unsigned long long pc7;
 208         unsigned long long pc8;
 209         unsigned long long pc9;
 210         unsigned long long pc10;
 211         unsigned long long cpu_lpi;
 212         unsigned long long sys_lpi;
 213         unsigned long long pkg_wtd_core_c0;
 214         unsigned long long pkg_any_core_c0;
 215         unsigned long long pkg_any_gfxe_c0;
 216         unsigned long long pkg_both_core_gfxe_c0;
 217         long long gfx_rc6_ms;
 218         unsigned int gfx_mhz;
 219         unsigned int gfx_act_mhz;
 220         unsigned int package_id;
 221         unsigned long long energy_pkg;  /* MSR_PKG_ENERGY_STATUS */
 222         unsigned long long energy_dram; /* MSR_DRAM_ENERGY_STATUS */
 223         unsigned long long energy_cores;        /* MSR_PP0_ENERGY_STATUS */
 224         unsigned long long energy_gfx;  /* MSR_PP1_ENERGY_STATUS */
 225         unsigned long long rapl_pkg_perf_status;        /* MSR_PKG_PERF_STATUS */
 226         unsigned long long rapl_dram_perf_status;       /* MSR_DRAM_PERF_STATUS */
 227         unsigned int pkg_temp_c;
 228         unsigned long long counter[MAX_ADDED_COUNTERS];
 229 } *package_even, *package_odd;
 230
 231 #define ODD_COUNTERS thread_odd, core_odd, package_odd
 232 #define EVEN_COUNTERS thread_even, core_even, package_even
 233
 234 #define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no)          \
 235         ((thread_base) +                                                      \
 236          ((pkg_no) *                                                          \
 237           topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
 238          ((node_no) * topo.cores_per_node * topo.threads_per_core) +          \
 239          ((core_no) * topo.threads_per_core) +                                \
 240          (thread_no))
 241
 242 #define GET_CORE(core_base, core_no, node_no, pkg_no)                   \
 243         ((core_base) +                                                  \
 244          ((pkg_no) *  topo.nodes_per_pkg * topo.cores_per_node) +       \
 245          ((node_no) * topo.cores_per_node) +                            \
 246          (core_no))
 247
 248
 249 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
 250
 251 enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
 252 enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
 253 enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
 254
 255 struct msr_counter {
 256         unsigned int msr_num;
 257         char name[NAME_BYTES];
 258         char path[PATH_BYTES];
 259         unsigned int width;
 260         enum counter_type type;
 261         enum counter_format format;
 262         struct msr_counter *next;
 263         unsigned int flags;
 264 #define FLAGS_HIDE      (1 << 0)
 265 #define FLAGS_SHOW      (1 << 1)
 266 #define SYSFS_PERCPU    (1 << 1)
 267 };
 268
 269 /*
 270  * The accumulated sum of MSR is defined as a monotonic
 271  * increasing MSR, it will be accumulated periodically,
 272  * despite its register's bit width.
 273  */
 274 enum {
 275         IDX_PKG_ENERGY,
 276         IDX_DRAM_ENERGY,
 277         IDX_PP0_ENERGY,
 278         IDX_PP1_ENERGY,
 279         IDX_PKG_PERF,
 280         IDX_DRAM_PERF,
 281         IDX_COUNT,
 282 };
 283
 284 int get_msr_sum(int cpu, off_t offset, unsigned long long *msr);
 285
 286 struct msr_sum_array {
 287         /* get_msr_sum() = sum + (get_msr() - last) */
 288         struct {
 289                 /*The accumulated MSR value is updated by the timer*/
 290                 unsigned long long sum;
 291                 /*The MSR footprint recorded in last timer*/
 292                 unsigned long long last;
 293         } entries[IDX_COUNT];
 294 };
 295
 296 /* The percpu MSR sum array.*/
 297 struct msr_sum_array *per_cpu_msr_sum;
 298
 299 int idx_to_offset(int idx)
 300 {
 301         int offset;
 302
 303         switch (idx) {
 304         case IDX_PKG_ENERGY:
 305                 offset = MSR_PKG_ENERGY_STATUS;
 306                 break;
 307         case IDX_DRAM_ENERGY:
 308                 offset = MSR_DRAM_ENERGY_STATUS;
 309                 break;
 310         case IDX_PP0_ENERGY:
 311                 offset = MSR_PP0_ENERGY_STATUS;
 312                 break;
 313         case IDX_PP1_ENERGY:
 314                 offset = MSR_PP1_ENERGY_STATUS;
 315                 break;
 316         case IDX_PKG_PERF:
 317                 offset = MSR_PKG_PERF_STATUS;
 318                 break;
 319         case IDX_DRAM_PERF:
 320                 offset = MSR_DRAM_PERF_STATUS;
 321                 break;
 322         default:
 323                 offset = -1;
 324         }
 325         return offset;
 326 }
 327
 328 int offset_to_idx(int offset)
 329 {
 330         int idx;
 331
 332         switch (offset) {
 333         case MSR_PKG_ENERGY_STATUS:
 334                 idx = IDX_PKG_ENERGY;
 335                 break;
 336         case MSR_DRAM_ENERGY_STATUS:
 337                 idx = IDX_DRAM_ENERGY;
 338                 break;
 339         case MSR_PP0_ENERGY_STATUS:
 340                 idx = IDX_PP0_ENERGY;
 341                 break;
 342         case MSR_PP1_ENERGY_STATUS:
 343                 idx = IDX_PP1_ENERGY;
 344                 break;
 345         case MSR_PKG_PERF_STATUS:
 346                 idx = IDX_PKG_PERF;
 347                 break;
 348         case MSR_DRAM_PERF_STATUS:
 349                 idx = IDX_DRAM_PERF;
 350                 break;
 351         default:
 352                 idx = -1;
 353         }
 354         return idx;
 355 }
 356
 357 int idx_valid(int idx)
 358 {
 359         switch (idx) {
 360         case IDX_PKG_ENERGY:
 361                 return do_rapl & RAPL_PKG;
 362         case IDX_DRAM_ENERGY:
 363                 return do_rapl & RAPL_DRAM;
 364         case IDX_PP0_ENERGY:
 365                 return do_rapl & RAPL_CORES_ENERGY_STATUS;
 366         case IDX_PP1_ENERGY:
 367                 return do_rapl & RAPL_GFX;
 368         case IDX_PKG_PERF:
 369                 return do_rapl & RAPL_PKG_PERF_STATUS;
 370         case IDX_DRAM_PERF:
 371                 return do_rapl & RAPL_DRAM_PERF_STATUS;
 372         default:
 373                 return 0;
 374         }
 375 }
 376 struct sys_counters {
 377         unsigned int added_thread_counters;
 378         unsigned int added_core_counters;
 379         unsigned int added_package_counters;
 380         struct msr_counter *tp;
 381         struct msr_counter *cp;
 382         struct msr_counter *pp;
 383 } sys;
 384
 385 struct system_summary {
 386         struct thread_data threads;
 387         struct core_data cores;
 388         struct pkg_data packages;
 389 } average;
 390
 391 struct cpu_topology {
 392         int physical_package_id;
 393         int die_id;
 394         int logical_cpu_id;
 395         int physical_node_id;
 396         int logical_node_id;    /* 0-based count within the package */
 397         int physical_core_id;
 398         int thread_id;
 399         cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
 400 } *cpus;
 401
 402 struct topo_params {
 403         int num_packages;
 404         int num_die;
 405         int num_cpus;
 406         int num_cores;
 407         int max_cpu_num;
 408         int max_node_num;
 409         int nodes_per_pkg;
 410         int cores_per_node;
 411         int threads_per_core;
 412 } topo;
 413
 414 struct timeval tv_even, tv_odd, tv_delta;
 415
 416 int *irq_column_2_cpu;  /* /proc/interrupts column numbers */
 417 int *irqs_per_cpu;              /* indexed by cpu_num */
 418
 419 void setup_all_buffers(void);
 420
 421 char *sys_lpi_file;
 422 char *sys_lpi_file_sysfs = "/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us";
 423 char *sys_lpi_file_debugfs = "/sys/kernel/debug/pmc_core/slp_s0_residency_usec";
 424
 425 int cpu_is_not_present(int cpu)
 426 {
 427         return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
 428 }
 429 /*
 430  * run func(thread, core, package) in topology order
 431  * skip non-present cpus
 432  */
 433
 434 int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
 435         struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
 436 {
 437         int retval, pkg_no, core_no, thread_no, node_no;
 438
 439         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
 440                 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
 441                         for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
 442                                 for (thread_no = 0; thread_no <
 443                                         topo.threads_per_core; ++thread_no) {
 444                                         struct thread_data *t;
 445                                         struct core_data *c;
 446                                         struct pkg_data *p;
 447
 448                                         t = GET_THREAD(thread_base, thread_no,
 449                                                        core_no, node_no,
 450                                                        pkg_no);
 451
 452                                         if (cpu_is_not_present(t->cpu_id))
 453                                                 continue;
 454
 455                                         c = GET_CORE(core_base, core_no,
 456                                                      node_no, pkg_no);
 457                                         p = GET_PKG(pkg_base, pkg_no);
 458
 459                                         retval = func(t, c, p);
 460                                         if (retval)
 461                                                 return retval;
 462                                 }
 463                         }
 464                 }
 465         }
 466         return 0;
 467 }
 468
 469 int cpu_migrate(int cpu)
 470 {
 471         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
 472         CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
 473         if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
 474                 return -1;
 475         else
 476                 return 0;
 477 }
 478 int get_msr_fd(int cpu)
 479 {
 480         char pathname[32];
 481         int fd;
 482
 483         fd = fd_percpu[cpu];
 484
 485         if (fd)
 486                 return fd;
 487
 488         sprintf(pathname, "/dev/cpu/%d/msr", cpu);
 489         fd = open(pathname, O_RDONLY);
 490         if (fd < 0)
 491                 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
 492
 493         fd_percpu[cpu] = fd;
 494
 495         return fd;
 496 }
 497
 498 static long perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu, int group_fd, unsigned long flags)
 499 {
 500         return syscall(__NR_perf_event_open, hw_event, pid, cpu, group_fd, flags);
 501 }
 502
 503 static int perf_instr_count_open(int cpu_num)
 504 {
 505         struct perf_event_attr pea;
 506         int fd;
 507
 508         memset(&pea, 0, sizeof(struct perf_event_attr));
 509         pea.type = PERF_TYPE_HARDWARE;
 510         pea.size = sizeof(struct perf_event_attr);
 511         pea.config = PERF_COUNT_HW_INSTRUCTIONS;
 512
 513         /* counter for cpu_num, including user + kernel and all processes */
 514         fd = perf_event_open(&pea, -1, cpu_num, -1, 0);
 515         if (fd == -1)
 516                 err(-1, "cpu%d: perf instruction counter\n", cpu_num);
 517
 518         return fd;
 519 }
 520
 521 int get_instr_count_fd(int cpu)
 522 {
 523         if (fd_instr_count_percpu[cpu])
 524                 return fd_instr_count_percpu[cpu];
 525
 526         fd_instr_count_percpu[cpu] = perf_instr_count_open(cpu);
 527
 528         return fd_instr_count_percpu[cpu];
 529 }
 530
 531 int get_msr(int cpu, off_t offset, unsigned long long *msr)
 532 {
 533         ssize_t retval;
 534
 535         retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
 536
 537         if (retval != sizeof *msr)
 538                 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
 539
 540         return 0;
 541 }
 542
 543 /*
 544  * This list matches the column headers, except
 545  * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
 546  * 2. Core and CPU are moved to the end, we can't have strings that contain them
 547  *    matching on them for --show and --hide.
 548  */
 549 struct msr_counter bic[] = {
 550         { 0x0, "usec" },
 551         { 0x0, "Time_Of_Day_Seconds" },
 552         { 0x0, "Package" },
 553         { 0x0, "Node" },
 554         { 0x0, "Avg_MHz" },
 555         { 0x0, "Busy%" },
 556         { 0x0, "Bzy_MHz" },
 557         { 0x0, "TSC_MHz" },
 558         { 0x0, "IRQ" },
 559         { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
 560         { 0x0, "sysfs" },
 561         { 0x0, "CPU%c1" },
 562         { 0x0, "CPU%c3" },
 563         { 0x0, "CPU%c6" },
 564         { 0x0, "CPU%c7" },
 565         { 0x0, "ThreadC" },
 566         { 0x0, "CoreTmp" },
 567         { 0x0, "CoreCnt" },
 568         { 0x0, "PkgTmp" },
 569         { 0x0, "GFX%rc6" },
 570         { 0x0, "GFXMHz" },
 571         { 0x0, "Pkg%pc2" },
 572         { 0x0, "Pkg%pc3" },
 573         { 0x0, "Pkg%pc6" },
 574         { 0x0, "Pkg%pc7" },
 575         { 0x0, "Pkg%pc8" },
 576         { 0x0, "Pkg%pc9" },
 577         { 0x0, "Pk%pc10" },
 578         { 0x0, "CPU%LPI" },
 579         { 0x0, "SYS%LPI" },
 580         { 0x0, "PkgWatt" },
 581         { 0x0, "CorWatt" },
 582         { 0x0, "GFXWatt" },
 583         { 0x0, "PkgCnt" },
 584         { 0x0, "RAMWatt" },
 585         { 0x0, "PKG_%" },
 586         { 0x0, "RAM_%" },
 587         { 0x0, "Pkg_J" },
 588         { 0x0, "Cor_J" },
 589         { 0x0, "GFX_J" },
 590         { 0x0, "RAM_J" },
 591         { 0x0, "Mod%c6" },
 592         { 0x0, "Totl%C0" },
 593         { 0x0, "Any%C0" },
 594         { 0x0, "GFX%C0" },
 595         { 0x0, "CPUGFX%" },
 596         { 0x0, "Core" },
 597         { 0x0, "CPU" },
 598         { 0x0, "APIC" },
 599         { 0x0, "X2APIC" },
 600         { 0x0, "Die" },
 601         { 0x0, "GFXAMHz" },
 602         { 0x0, "IPC" },
 603 };
 604
 605 #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
 606 #define BIC_USEC        (1ULL << 0)
 607 #define BIC_TOD         (1ULL << 1)
 608 #define BIC_Package     (1ULL << 2)
 609 #define BIC_Node        (1ULL << 3)
 610 #define BIC_Avg_MHz     (1ULL << 4)
 611 #define BIC_Busy        (1ULL << 5)
 612 #define BIC_Bzy_MHz     (1ULL << 6)
 613 #define BIC_TSC_MHz     (1ULL << 7)
 614 #define BIC_IRQ         (1ULL << 8)
 615 #define BIC_SMI         (1ULL << 9)
 616 #define BIC_sysfs       (1ULL << 10)
 617 #define BIC_CPU_c1      (1ULL << 11)
 618 #define BIC_CPU_c3      (1ULL << 12)
 619 #define BIC_CPU_c6      (1ULL << 13)
 620 #define BIC_CPU_c7      (1ULL << 14)
 621 #define BIC_ThreadC     (1ULL << 15)
 622 #define BIC_CoreTmp     (1ULL << 16)
 623 #define BIC_CoreCnt     (1ULL << 17)
 624 #define BIC_PkgTmp      (1ULL << 18)
 625 #define BIC_GFX_rc6     (1ULL << 19)
 626 #define BIC_GFXMHz      (1ULL << 20)
 627 #define BIC_Pkgpc2      (1ULL << 21)
 628 #define BIC_Pkgpc3      (1ULL << 22)
 629 #define BIC_Pkgpc6      (1ULL << 23)
 630 #define BIC_Pkgpc7      (1ULL << 24)
 631 #define BIC_Pkgpc8      (1ULL << 25)
 632 #define BIC_Pkgpc9      (1ULL << 26)
 633 #define BIC_Pkgpc10     (1ULL << 27)
 634 #define BIC_CPU_LPI     (1ULL << 28)
 635 #define BIC_SYS_LPI     (1ULL << 29)
 636 #define BIC_PkgWatt     (1ULL << 30)
 637 #define BIC_CorWatt     (1ULL << 31)
 638 #define BIC_GFXWatt     (1ULL << 32)
 639 #define BIC_PkgCnt      (1ULL << 33)
 640 #define BIC_RAMWatt     (1ULL << 34)
 641 #define BIC_PKG__       (1ULL << 35)
 642 #define BIC_RAM__       (1ULL << 36)
 643 #define BIC_Pkg_J       (1ULL << 37)
 644 #define BIC_Cor_J       (1ULL << 38)
 645 #define BIC_GFX_J       (1ULL << 39)
 646 #define BIC_RAM_J       (1ULL << 40)
 647 #define BIC_Mod_c6      (1ULL << 41)
 648 #define BIC_Totl_c0     (1ULL << 42)
 649 #define BIC_Any_c0      (1ULL << 43)
 650 #define BIC_GFX_c0      (1ULL << 44)
 651 #define BIC_CPUGFX      (1ULL << 45)
 652 #define BIC_Core        (1ULL << 46)
 653 #define BIC_CPU         (1ULL << 47)
 654 #define BIC_APIC        (1ULL << 48)
 655 #define BIC_X2APIC      (1ULL << 49)
 656 #define BIC_Die         (1ULL << 50)
 657 #define BIC_GFXACTMHz   (1ULL << 51)
 658 #define BIC_IPC         (1ULL << 52)
 659
 660 #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
 661
 662 unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
 663 unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
 664
 665 #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
 666 #define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
 667 #define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
 668 #define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
 669 #define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
 670 #define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT)
 671
 672
 673 #define MAX_DEFERRED 16
 674 char *deferred_skip_names[MAX_DEFERRED];
 675 int deferred_skip_index;
 676
 677 /*
 678  * HIDE_LIST - hide this list of counters, show the rest [default]
 679  * SHOW_LIST - show this list of counters, hide the rest
 680  */
 681 enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
 682
 683 void help(void)
 684 {
 685         fprintf(outf,
 686         "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
 687         "\n"
 688         "Turbostat forks the specified COMMAND and prints statistics\n"
 689         "when COMMAND completes.\n"
 690         "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
 691         "to print statistics, until interrupted.\n"
 692         "  -a, --add    add a counter\n"
 693         "                 eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
 694         "  -c, --cpu    cpu-set limit output to summary plus cpu-set:\n"
 695         "                 {core | package | j,k,l..m,n-p }\n"
 696         "  -d, --debug  displays usec, Time_Of_Day_Seconds and more debugging\n"
 697         "  -D, --Dump   displays the raw counter values\n"
 698         "  -e, --enable [all | column]\n"
 699         "               shows all or the specified disabled column\n"
 700         "  -H, --hide [column|column,column,...]\n"
 701         "               hide the specified column(s)\n"
 702         "  -i, --interval sec.subsec\n"
 703         "               Override default 5-second measurement interval\n"
 704         "  -J, --Joules displays energy in Joules instead of Watts\n"
 705         "  -l, --list   list column headers only\n"
 706         "  -n, --num_iterations num\n"
 707         "               number of the measurement iterations\n"
 708         "  -o, --out file\n"
 709         "               create or truncate \"file\" for all output\n"
 710         "  -q, --quiet  skip decoding system configuration header\n"
 711         "  -s, --show [column|column,column,...]\n"
 712         "               show only the specified column(s)\n"
 713         "  -S, --Summary\n"
 714         "               limits output to 1-line system summary per interval\n"
 715         "  -T, --TCC temperature\n"
 716         "               sets the Thermal Control Circuit temperature in\n"
 717         "                 degrees Celsius\n"
 718         "  -h, --help   print this help message\n"
 719         "  -v, --version        print version information\n"
 720         "\n"
 721         "For more help, run \"man turbostat\"\n");
 722 }
 723
 724 /*
 725  * bic_lookup
 726  * for all the strings in comma separate name_list,
 727  * set the approprate bit in return value.
 728  */
 729 unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
 730 {
 731         int i;
 732         unsigned long long retval = 0;
 733
 734         while (name_list) {
 735                 char *comma;
 736
 737                 comma = strchr(name_list, ',');
 738
 739                 if (comma)
 740                         *comma = '\0';
 741
 742                 if (!strcmp(name_list, "all"))
 743                         return ~0;
 744
 745                 for (i = 0; i < MAX_BIC; ++i) {
 746                         if (!strcmp(name_list, bic[i].name)) {
 747                                 retval |= (1ULL << i);
 748                                 break;
 749                         }
 750                 }
 751                 if (i == MAX_BIC) {
 752                         if (mode == SHOW_LIST) {
 753                                 fprintf(stderr, "Invalid counter name: %s\n", name_list);
 754                                 exit(-1);
 755                         }
 756                         deferred_skip_names[deferred_skip_index++] = name_list;
 757                         if (debug)
 758                                 fprintf(stderr, "deferred \"%s\"\n", name_list);
 759                         if (deferred_skip_index >= MAX_DEFERRED) {
 760                                 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
 761                                         MAX_DEFERRED, name_list);
 762                                 help();
 763                                 exit(1);
 764                         }
 765                 }
 766
 767                 name_list = comma;
 768                 if (name_list)
 769                         name_list++;
 770
 771         }
 772         return retval;
 773 }
 774
 775
 776 void print_header(char *delim)
 777 {
 778         struct msr_counter *mp;
 779         int printed = 0;
 780
 781         if (DO_BIC(BIC_USEC))
 782                 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
 783         if (DO_BIC(BIC_TOD))
 784                 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
 785         if (DO_BIC(BIC_Package))
 786                 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
 787         if (DO_BIC(BIC_Die))
 788                 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
 789         if (DO_BIC(BIC_Node))
 790                 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
 791         if (DO_BIC(BIC_Core))
 792                 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
 793         if (DO_BIC(BIC_CPU))
 794                 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
 795         if (DO_BIC(BIC_APIC))
 796                 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
 797         if (DO_BIC(BIC_X2APIC))
 798                 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
 799         if (DO_BIC(BIC_Avg_MHz))
 800                 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
 801         if (DO_BIC(BIC_Busy))
 802                 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
 803         if (DO_BIC(BIC_Bzy_MHz))
 804                 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
 805         if (DO_BIC(BIC_TSC_MHz))
 806                 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
 807
 808         if (DO_BIC(BIC_IPC))
 809                 outp += sprintf(outp, "%sIPC", (printed++ ? delim : ""));
 810
 811         if (DO_BIC(BIC_IRQ)) {
 812                 if (sums_need_wide_columns)
 813                         outp += sprintf(outp, "%s     IRQ", (printed++ ? delim : ""));
 814                 else
 815                         outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
 816         }
 817
 818         if (DO_BIC(BIC_SMI))
 819                 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
 820
 821         for (mp = sys.tp; mp; mp = mp->next) {
 822
 823                 if (mp->format == FORMAT_RAW) {
 824                         if (mp->width == 64)
 825                                 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
 826                         else
 827                                 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
 828                 } else {
 829                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 830                                 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
 831                         else
 832                                 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
 833                 }
 834         }
 835
 836         if (DO_BIC(BIC_CPU_c1))
 837                 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
 838         if (DO_BIC(BIC_CPU_c3))
 839                 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
 840         if (DO_BIC(BIC_CPU_c6))
 841                 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
 842         if (DO_BIC(BIC_CPU_c7))
 843                 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
 844
 845         if (DO_BIC(BIC_Mod_c6))
 846                 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
 847
 848         if (DO_BIC(BIC_CoreTmp))
 849                 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
 850
 851         if (do_rapl && !rapl_joules) {
 852                 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
 853                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 854         } else if (do_rapl && rapl_joules) {
 855                 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
 856                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 857         }
 858
 859         for (mp = sys.cp; mp; mp = mp->next) {
 860                 if (mp->format == FORMAT_RAW) {
 861                         if (mp->width == 64)
 862                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 863                         else
 864                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 865                 } else {
 866                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 867                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 868                         else
 869                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 870                 }
 871         }
 872
 873         if (DO_BIC(BIC_PkgTmp))
 874                 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
 875
 876         if (DO_BIC(BIC_GFX_rc6))
 877                 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
 878
 879         if (DO_BIC(BIC_GFXMHz))
 880                 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
 881
 882         if (DO_BIC(BIC_GFXACTMHz))
 883                 outp += sprintf(outp, "%sGFXAMHz", (printed++ ? delim : ""));
 884
 885         if (DO_BIC(BIC_Totl_c0))
 886                 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
 887         if (DO_BIC(BIC_Any_c0))
 888                 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
 889         if (DO_BIC(BIC_GFX_c0))
 890                 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
 891         if (DO_BIC(BIC_CPUGFX))
 892                 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
 893
 894         if (DO_BIC(BIC_Pkgpc2))
 895                 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
 896         if (DO_BIC(BIC_Pkgpc3))
 897                 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
 898         if (DO_BIC(BIC_Pkgpc6))
 899                 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
 900         if (DO_BIC(BIC_Pkgpc7))
 901                 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
 902         if (DO_BIC(BIC_Pkgpc8))
 903                 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
 904         if (DO_BIC(BIC_Pkgpc9))
 905                 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
 906         if (DO_BIC(BIC_Pkgpc10))
 907                 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
 908         if (DO_BIC(BIC_CPU_LPI))
 909                 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
 910         if (DO_BIC(BIC_SYS_LPI))
 911                 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
 912
 913         if (do_rapl && !rapl_joules) {
 914                 if (DO_BIC(BIC_PkgWatt))
 915                         outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
 916                 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 917                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 918                 if (DO_BIC(BIC_GFXWatt))
 919                         outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
 920                 if (DO_BIC(BIC_RAMWatt))
 921                         outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
 922                 if (DO_BIC(BIC_PKG__))
 923                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 924                 if (DO_BIC(BIC_RAM__))
 925                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 926         } else if (do_rapl && rapl_joules) {
 927                 if (DO_BIC(BIC_Pkg_J))
 928                         outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
 929                 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 930                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 931                 if (DO_BIC(BIC_GFX_J))
 932                         outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
 933                 if (DO_BIC(BIC_RAM_J))
 934                         outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
 935                 if (DO_BIC(BIC_PKG__))
 936                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 937                 if (DO_BIC(BIC_RAM__))
 938                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 939         }
 940         for (mp = sys.pp; mp; mp = mp->next) {
 941                 if (mp->format == FORMAT_RAW) {
 942                         if (mp->width == 64)
 943                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 944                         else
 945                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 946                 } else {
 947                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 948                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 949                         else
 950                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 951                 }
 952         }
 953
 954         outp += sprintf(outp, "\n");
 955 }
 956
 957 int dump_counters(struct thread_data *t, struct core_data *c,
 958         struct pkg_data *p)
 959 {
 960         int i;
 961         struct msr_counter *mp;
 962
 963         outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
 964
 965         if (t) {
 966                 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
 967                         t->cpu_id, t->flags);
 968                 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
 969                 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
 970                 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
 971                 outp += sprintf(outp, "c1: %016llX\n", t->c1);
 972
 973                 if (DO_BIC(BIC_IPC))
 974                         outp += sprintf(outp, "IPC: %lld\n", t->instr_count);
 975
 976                 if (DO_BIC(BIC_IRQ))
 977                         outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
 978                 if (DO_BIC(BIC_SMI))
 979                         outp += sprintf(outp, "SMI: %d\n", t->smi_count);
 980
 981                 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
 982                         outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
 983                                 i, mp->msr_num, t->counter[i]);
 984                 }
 985         }
 986
 987         if (c) {
 988                 outp += sprintf(outp, "core: %d\n", c->core_id);
 989                 outp += sprintf(outp, "c3: %016llX\n", c->c3);
 990                 outp += sprintf(outp, "c6: %016llX\n", c->c6);
 991                 outp += sprintf(outp, "c7: %016llX\n", c->c7);
 992                 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
 993                 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
 994
 995                 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
 996                         outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
 997                                 i, mp->msr_num, c->counter[i]);
 998                 }
 999                 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
1000         }
1001
1002         if (p) {
1003                 outp += sprintf(outp, "package: %d\n", p->package_id);
1004
1005                 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
1006                 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
1007                 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
1008                 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
1009
1010                 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
1011                 if (DO_BIC(BIC_Pkgpc3))
1012                         outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
1013                 if (DO_BIC(BIC_Pkgpc6))
1014                         outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
1015                 if (DO_BIC(BIC_Pkgpc7))
1016                         outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
1017                 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
1018                 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
1019                 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
1020                 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
1021                 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
1022                 outp += sprintf(outp, "Joules PKG: %0llX\n", p->energy_pkg);
1023                 outp += sprintf(outp, "Joules COR: %0llX\n", p->energy_cores);
1024                 outp += sprintf(outp, "Joules GFX: %0llX\n", p->energy_gfx);
1025                 outp += sprintf(outp, "Joules RAM: %0llX\n", p->energy_dram);
1026                 outp += sprintf(outp, "Throttle PKG: %0llX\n",
1027                         p->rapl_pkg_perf_status);
1028                 outp += sprintf(outp, "Throttle RAM: %0llX\n",
1029                         p->rapl_dram_perf_status);
1030                 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
1031
1032                 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1033                         outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
1034                                 i, mp->msr_num, p->counter[i]);
1035                 }
1036         }
1037
1038         outp += sprintf(outp, "\n");
1039
1040         return 0;
1041 }
1042
1043 /*
1044  * column formatting convention & formats
1045  */
1046 int format_counters(struct thread_data *t, struct core_data *c,
1047         struct pkg_data *p)
1048 {
1049         double interval_float, tsc;
1050         char *fmt8;
1051         int i;
1052         struct msr_counter *mp;
1053         char *delim = "\t";
1054         int printed = 0;
1055
1056          /* if showing only 1st thread in core and this isn't one, bail out */
1057         if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1058                 return 0;
1059
1060          /* if showing only 1st thread in pkg and this isn't one, bail out */
1061         if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1062                 return 0;
1063
1064         /*if not summary line and --cpu is used */
1065         if ((t != &average.threads) &&
1066                 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
1067                 return 0;
1068
1069         if (DO_BIC(BIC_USEC)) {
1070                 /* on each row, print how many usec each timestamp took to gather */
1071                 struct timeval tv;
1072
1073                 timersub(&t->tv_end, &t->tv_begin, &tv);
1074                 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
1075         }
1076
1077         /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
1078         if (DO_BIC(BIC_TOD))
1079                 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
1080
1081         interval_float = t->tv_delta.tv_sec + t->tv_delta.tv_usec/1000000.0;
1082
1083         tsc = t->tsc * tsc_tweak;
1084
1085         /* topo columns, print blanks on 1st (average) line */
1086         if (t == &average.threads) {
1087                 if (DO_BIC(BIC_Package))
1088                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1089                 if (DO_BIC(BIC_Die))
1090                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1091                 if (DO_BIC(BIC_Node))
1092                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1093                 if (DO_BIC(BIC_Core))
1094                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1095                 if (DO_BIC(BIC_CPU))
1096                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1097                 if (DO_BIC(BIC_APIC))
1098                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1099                 if (DO_BIC(BIC_X2APIC))
1100                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1101         } else {
1102                 if (DO_BIC(BIC_Package)) {
1103                         if (p)
1104                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
1105                         else
1106                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1107                 }
1108                 if (DO_BIC(BIC_Die)) {
1109                         if (c)
1110                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
1111                         else
1112                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1113                 }
1114                 if (DO_BIC(BIC_Node)) {
1115                         if (t)
1116                                 outp += sprintf(outp, "%s%d",
1117                                                 (printed++ ? delim : ""),
1118                                               cpus[t->cpu_id].physical_node_id);
1119                         else
1120                                 outp += sprintf(outp, "%s-",
1121                                                 (printed++ ? delim : ""));
1122                 }
1123                 if (DO_BIC(BIC_Core)) {
1124                         if (c)
1125                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
1126                         else
1127                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1128                 }
1129                 if (DO_BIC(BIC_CPU))
1130                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
1131                 if (DO_BIC(BIC_APIC))
1132                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
1133                 if (DO_BIC(BIC_X2APIC))
1134                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
1135         }
1136
1137         if (DO_BIC(BIC_Avg_MHz))
1138                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
1139                         1.0 / units * t->aperf / interval_float);
1140
1141         if (DO_BIC(BIC_Busy))
1142                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
1143
1144         if (DO_BIC(BIC_Bzy_MHz)) {
1145                 if (has_base_hz)
1146                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
1147                 else
1148                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
1149                                 tsc / units * t->aperf / t->mperf / interval_float);
1150         }
1151
1152         if (DO_BIC(BIC_TSC_MHz))
1153                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
1154
1155         if (DO_BIC(BIC_IPC))
1156                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 1.0 * t->instr_count / t->aperf);
1157
1158         /* IRQ */
1159         if (DO_BIC(BIC_IRQ)) {
1160                 if (sums_need_wide_columns)
1161                         outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
1162                 else
1163                         outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
1164         }
1165
1166         /* SMI */
1167         if (DO_BIC(BIC_SMI))
1168                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1169
1170         /* Added counters */
1171         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1172                 if (mp->format == FORMAT_RAW) {
1173                         if (mp->width == 32)
1174                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
1175                         else
1176                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
1177                 } else if (mp->format == FORMAT_DELTA) {
1178                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1179                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
1180                         else
1181                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
1182                 } else if (mp->format == FORMAT_PERCENT) {
1183                         if (mp->type == COUNTER_USEC)
1184                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
1185                         else
1186                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
1187                 }
1188         }
1189
1190         /* C1 */
1191         if (DO_BIC(BIC_CPU_c1))
1192                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
1193
1194
1195         /* print per-core data only for 1st thread in core */
1196         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1197                 goto done;
1198
1199         if (DO_BIC(BIC_CPU_c3))
1200                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
1201         if (DO_BIC(BIC_CPU_c6))
1202                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
1203         if (DO_BIC(BIC_CPU_c7))
1204                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
1205
1206         /* Mod%c6 */
1207         if (DO_BIC(BIC_Mod_c6))
1208                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
1209
1210         if (DO_BIC(BIC_CoreTmp))
1211                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
1212
1213         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1214                 if (mp->format == FORMAT_RAW) {
1215                         if (mp->width == 32)
1216                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
1217                         else
1218                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
1219                 } else if (mp->format == FORMAT_DELTA) {
1220                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1221                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
1222                         else
1223                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
1224                 } else if (mp->format == FORMAT_PERCENT) {
1225                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
1226                 }
1227         }
1228
1229         fmt8 = "%s%.2f";
1230
1231         if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1232                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1233         if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1234                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1235
1236         /* print per-package data only for 1st core in package */
1237         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1238                 goto done;
1239
1240         /* PkgTmp */
1241         if (DO_BIC(BIC_PkgTmp))
1242                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
1243
1244         /* GFXrc6 */
1245         if (DO_BIC(BIC_GFX_rc6)) {
1246                 if (p->gfx_rc6_ms == -1) {      /* detect GFX counter reset */
1247                         outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
1248                 } else {
1249                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
1250                                 p->gfx_rc6_ms / 10.0 / interval_float);
1251                 }
1252         }
1253
1254         /* GFXMHz */
1255         if (DO_BIC(BIC_GFXMHz))
1256                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
1257
1258         /* GFXACTMHz */
1259         if (DO_BIC(BIC_GFXACTMHz))
1260                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_act_mhz);
1261
1262         /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
1263         if (DO_BIC(BIC_Totl_c0))
1264                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
1265         if (DO_BIC(BIC_Any_c0))
1266                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
1267         if (DO_BIC(BIC_GFX_c0))
1268                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
1269         if (DO_BIC(BIC_CPUGFX))
1270                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
1271
1272         if (DO_BIC(BIC_Pkgpc2))
1273                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
1274         if (DO_BIC(BIC_Pkgpc3))
1275                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
1276         if (DO_BIC(BIC_Pkgpc6))
1277                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
1278         if (DO_BIC(BIC_Pkgpc7))
1279                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
1280         if (DO_BIC(BIC_Pkgpc8))
1281                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
1282         if (DO_BIC(BIC_Pkgpc9))
1283                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
1284         if (DO_BIC(BIC_Pkgpc10))
1285                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
1286
1287         if (DO_BIC(BIC_CPU_LPI))
1288                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1289         if (DO_BIC(BIC_SYS_LPI))
1290                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1291
1292         if (DO_BIC(BIC_PkgWatt))
1293                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
1294         if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1295                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
1296         if (DO_BIC(BIC_GFXWatt))
1297                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
1298         if (DO_BIC(BIC_RAMWatt))
1299                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
1300         if (DO_BIC(BIC_Pkg_J))
1301                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
1302         if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1303                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
1304         if (DO_BIC(BIC_GFX_J))
1305                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
1306         if (DO_BIC(BIC_RAM_J))
1307                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
1308         if (DO_BIC(BIC_PKG__))
1309                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
1310         if (DO_BIC(BIC_RAM__))
1311                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
1312
1313         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1314                 if (mp->format == FORMAT_RAW) {
1315                         if (mp->width == 32)
1316                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
1317                         else
1318                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
1319                 } else if (mp->format == FORMAT_DELTA) {
1320                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1321                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
1322                         else
1323                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
1324                 } else if (mp->format == FORMAT_PERCENT) {
1325                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
1326                 }
1327         }
1328
1329 done:
1330         if (*(outp - 1) != '\n')
1331                 outp += sprintf(outp, "\n");
1332
1333         return 0;
1334 }
1335
1336 void flush_output_stdout(void)
1337 {
1338         FILE *filep;
1339
1340         if (outf == stderr)
1341                 filep = stdout;
1342         else
1343                 filep = outf;
1344
1345         fputs(output_buffer, filep);
1346         fflush(filep);
1347
1348         outp = output_buffer;
1349 }
1350 void flush_output_stderr(void)
1351 {
1352         fputs(output_buffer, outf);
1353         fflush(outf);
1354         outp = output_buffer;
1355 }
1356 void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1357 {
1358         static int printed;
1359
1360         if (!printed || !summary_only)
1361                 print_header("\t");
1362
1363         format_counters(&average.threads, &average.cores, &average.packages);
1364
1365         printed = 1;
1366
1367         if (summary_only)
1368                 return;
1369
1370         for_all_cpus(format_counters, t, c, p);
1371 }
1372
1373 #define DELTA_WRAP32(new, old)                  \
1374         old = ((((unsigned long long)new << 32) - ((unsigned long long)old << 32)) >> 32);
1375
1376 int
1377 delta_package(struct pkg_data *new, struct pkg_data *old)
1378 {
1379         int i;
1380         struct msr_counter *mp;
1381
1382
1383         if (DO_BIC(BIC_Totl_c0))
1384                 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
1385         if (DO_BIC(BIC_Any_c0))
1386                 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
1387         if (DO_BIC(BIC_GFX_c0))
1388                 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
1389         if (DO_BIC(BIC_CPUGFX))
1390                 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
1391
1392         old->pc2 = new->pc2 - old->pc2;
1393         if (DO_BIC(BIC_Pkgpc3))
1394                 old->pc3 = new->pc3 - old->pc3;
1395         if (DO_BIC(BIC_Pkgpc6))
1396                 old->pc6 = new->pc6 - old->pc6;
1397         if (DO_BIC(BIC_Pkgpc7))
1398                 old->pc7 = new->pc7 - old->pc7;
1399         old->pc8 = new->pc8 - old->pc8;
1400         old->pc9 = new->pc9 - old->pc9;
1401         old->pc10 = new->pc10 - old->pc10;
1402         old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1403         old->sys_lpi = new->sys_lpi - old->sys_lpi;
1404         old->pkg_temp_c = new->pkg_temp_c;
1405
1406         /* flag an error when rc6 counter resets/wraps */
1407         if (old->gfx_rc6_ms >  new->gfx_rc6_ms)
1408                 old->gfx_rc6_ms = -1;
1409         else
1410                 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1411
1412         old->gfx_mhz = new->gfx_mhz;
1413         old->gfx_act_mhz = new->gfx_act_mhz;
1414
1415         old->energy_pkg = new->energy_pkg - old->energy_pkg;
1416         old->energy_cores = new->energy_cores - old->energy_cores;
1417         old->energy_gfx = new->energy_gfx - old->energy_gfx;
1418         old->energy_dram = new->energy_dram - old->energy_dram;
1419         old->rapl_pkg_perf_status = new->rapl_pkg_perf_status - old->rapl_pkg_perf_status;
1420         old->rapl_dram_perf_status = new->rapl_dram_perf_status - old->rapl_dram_perf_status;
1421
1422         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1423                 if (mp->format == FORMAT_RAW)
1424                         old->counter[i] = new->counter[i];
1425                 else
1426                         old->counter[i] = new->counter[i] - old->counter[i];
1427         }
1428
1429         return 0;
1430 }
1431
1432 void
1433 delta_core(struct core_data *new, struct core_data *old)
1434 {
1435         int i;
1436         struct msr_counter *mp;
1437
1438         old->c3 = new->c3 - old->c3;
1439         old->c6 = new->c6 - old->c6;
1440         old->c7 = new->c7 - old->c7;
1441         old->core_temp_c = new->core_temp_c;
1442         old->mc6_us = new->mc6_us - old->mc6_us;
1443
1444         DELTA_WRAP32(new->core_energy, old->core_energy);
1445
1446         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1447                 if (mp->format == FORMAT_RAW)
1448                         old->counter[i] = new->counter[i];
1449                 else
1450                         old->counter[i] = new->counter[i] - old->counter[i];
1451         }
1452 }
1453
1454 int soft_c1_residency_display(int bic)
1455 {
1456         if (!DO_BIC(BIC_CPU_c1) || use_c1_residency_msr)
1457                 return 0;
1458
1459         return DO_BIC_READ(bic);
1460 }
1461
1462 /*
1463  * old = new - old
1464  */
1465 int
1466 delta_thread(struct thread_data *new, struct thread_data *old,
1467         struct core_data *core_delta)
1468 {
1469         int i;
1470         struct msr_counter *mp;
1471
1472         /* we run cpuid just the 1st time, copy the results */
1473         if (DO_BIC(BIC_APIC))
1474                 new->apic_id = old->apic_id;
1475         if (DO_BIC(BIC_X2APIC))
1476                 new->x2apic_id = old->x2apic_id;
1477
1478         /*
1479          * the timestamps from start of measurement interval are in "old"
1480          * the timestamp from end of measurement interval are in "new"
1481          * over-write old w/ new so we can print end of interval values
1482          */
1483
1484         timersub(&new->tv_begin, &old->tv_begin, &old->tv_delta);
1485         old->tv_begin = new->tv_begin;
1486         old->tv_end = new->tv_end;
1487
1488         old->tsc = new->tsc - old->tsc;
1489
1490         /* check for TSC < 1 Mcycles over interval */
1491         if (old->tsc < (1000 * 1000))
1492                 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1493                      "You can disable all c-states by booting with \"idle=poll\"\n"
1494                      "or just the deep ones with \"processor.max_cstate=1\"");
1495
1496         old->c1 = new->c1 - old->c1;
1497
1498         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1499             soft_c1_residency_display(BIC_Avg_MHz)) {
1500                 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1501                         old->aperf = new->aperf - old->aperf;
1502                         old->mperf = new->mperf - old->mperf;
1503                 } else {
1504                         return -1;
1505                 }
1506         }
1507
1508
1509         if (use_c1_residency_msr) {
1510                 /*
1511                  * Some models have a dedicated C1 residency MSR,
1512                  * which should be more accurate than the derivation below.
1513                  */
1514         } else {
1515                 /*
1516                  * As counter collection is not atomic,
1517                  * it is possible for mperf's non-halted cycles + idle states
1518                  * to exceed TSC's all cycles: show c1 = 0% in that case.
1519                  */
1520                 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
1521                         old->c1 = 0;
1522                 else {
1523                         /* normal case, derive c1 */
1524                         old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
1525                                 - core_delta->c6 - core_delta->c7;
1526                 }
1527         }
1528
1529         if (old->mperf == 0) {
1530                 if (debug > 1)
1531                         fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
1532                 old->mperf = 1; /* divide by 0 protection */
1533         }
1534
1535         if (DO_BIC(BIC_IPC))
1536                 old->instr_count = new->instr_count - old->instr_count;
1537
1538         if (DO_BIC(BIC_IRQ))
1539                 old->irq_count = new->irq_count - old->irq_count;
1540
1541         if (DO_BIC(BIC_SMI))
1542                 old->smi_count = new->smi_count - old->smi_count;
1543
1544         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1545                 if (mp->format == FORMAT_RAW)
1546                         old->counter[i] = new->counter[i];
1547                 else
1548                         old->counter[i] = new->counter[i] - old->counter[i];
1549         }
1550         return 0;
1551 }
1552
1553 int delta_cpu(struct thread_data *t, struct core_data *c,
1554         struct pkg_data *p, struct thread_data *t2,
1555         struct core_data *c2, struct pkg_data *p2)
1556 {
1557         int retval = 0;
1558
1559         /* calculate core delta only for 1st thread in core */
1560         if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1561                 delta_core(c, c2);
1562
1563         /* always calculate thread delta */
1564         retval = delta_thread(t, t2, c2);       /* c2 is core delta */
1565         if (retval)
1566                 return retval;
1567
1568         /* calculate package delta only for 1st core in package */
1569         if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
1570                 retval = delta_package(p, p2);
1571
1572         return retval;
1573 }
1574
1575 void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1576 {
1577         int i;
1578         struct msr_counter  *mp;
1579
1580         t->tv_begin.tv_sec = 0;
1581         t->tv_begin.tv_usec = 0;
1582         t->tv_end.tv_sec = 0;
1583         t->tv_end.tv_usec = 0;
1584         t->tv_delta.tv_sec = 0;
1585         t->tv_delta.tv_usec = 0;
1586
1587         t->tsc = 0;
1588         t->aperf = 0;
1589         t->mperf = 0;
1590         t->c1 = 0;
1591
1592         t->instr_count = 0;
1593
1594         t->irq_count = 0;
1595         t->smi_count = 0;
1596
1597         /* tells format_counters to dump all fields from this set */
1598         t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1599
1600         c->c3 = 0;
1601         c->c6 = 0;
1602         c->c7 = 0;
1603         c->mc6_us = 0;
1604         c->core_temp_c = 0;
1605         c->core_energy = 0;
1606
1607         p->pkg_wtd_core_c0 = 0;
1608         p->pkg_any_core_c0 = 0;
1609         p->pkg_any_gfxe_c0 = 0;
1610         p->pkg_both_core_gfxe_c0 = 0;
1611
1612         p->pc2 = 0;
1613         if (DO_BIC(BIC_Pkgpc3))
1614                 p->pc3 = 0;
1615         if (DO_BIC(BIC_Pkgpc6))
1616                 p->pc6 = 0;
1617         if (DO_BIC(BIC_Pkgpc7))
1618                 p->pc7 = 0;
1619         p->pc8 = 0;
1620         p->pc9 = 0;
1621         p->pc10 = 0;
1622         p->cpu_lpi = 0;
1623         p->sys_lpi = 0;
1624
1625         p->energy_pkg = 0;
1626         p->energy_dram = 0;
1627         p->energy_cores = 0;
1628         p->energy_gfx = 0;
1629         p->rapl_pkg_perf_status = 0;
1630         p->rapl_dram_perf_status = 0;
1631         p->pkg_temp_c = 0;
1632
1633         p->gfx_rc6_ms = 0;
1634         p->gfx_mhz = 0;
1635         p->gfx_act_mhz = 0;
1636         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1637                 t->counter[i] = 0;
1638
1639         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1640                 c->counter[i] = 0;
1641
1642         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1643                 p->counter[i] = 0;
1644 }
1645 int sum_counters(struct thread_data *t, struct core_data *c,
1646         struct pkg_data *p)
1647 {
1648         int i;
1649         struct msr_counter *mp;
1650
1651         /* copy un-changing apic_id's */
1652         if (DO_BIC(BIC_APIC))
1653                 average.threads.apic_id = t->apic_id;
1654         if (DO_BIC(BIC_X2APIC))
1655                 average.threads.x2apic_id = t->x2apic_id;
1656
1657         /* remember first tv_begin */
1658         if (average.threads.tv_begin.tv_sec == 0)
1659                 average.threads.tv_begin = t->tv_begin;
1660
1661         /* remember last tv_end */
1662         average.threads.tv_end = t->tv_end;
1663
1664         average.threads.tsc += t->tsc;
1665         average.threads.aperf += t->aperf;
1666         average.threads.mperf += t->mperf;
1667         average.threads.c1 += t->c1;
1668
1669         average.threads.instr_count += t->instr_count;
1670
1671         average.threads.irq_count += t->irq_count;
1672         average.threads.smi_count += t->smi_count;
1673
1674         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1675                 if (mp->format == FORMAT_RAW)
1676                         continue;
1677                 average.threads.counter[i] += t->counter[i];
1678         }
1679
1680         /* sum per-core values only for 1st thread in core */
1681         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1682                 return 0;
1683
1684         average.cores.c3 += c->c3;
1685         average.cores.c6 += c->c6;
1686         average.cores.c7 += c->c7;
1687         average.cores.mc6_us += c->mc6_us;
1688
1689         average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1690
1691         average.cores.core_energy += c->core_energy;
1692
1693         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1694                 if (mp->format == FORMAT_RAW)
1695                         continue;
1696                 average.cores.counter[i] += c->counter[i];
1697         }
1698
1699         /* sum per-pkg values only for 1st core in pkg */
1700         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1701                 return 0;
1702
1703         if (DO_BIC(BIC_Totl_c0))
1704                 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
1705         if (DO_BIC(BIC_Any_c0))
1706                 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
1707         if (DO_BIC(BIC_GFX_c0))
1708                 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
1709         if (DO_BIC(BIC_CPUGFX))
1710                 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
1711
1712         average.packages.pc2 += p->pc2;
1713         if (DO_BIC(BIC_Pkgpc3))
1714                 average.packages.pc3 += p->pc3;
1715         if (DO_BIC(BIC_Pkgpc6))
1716                 average.packages.pc6 += p->pc6;
1717         if (DO_BIC(BIC_Pkgpc7))
1718                 average.packages.pc7 += p->pc7;
1719         average.packages.pc8 += p->pc8;
1720         average.packages.pc9 += p->pc9;
1721         average.packages.pc10 += p->pc10;
1722
1723         average.packages.cpu_lpi = p->cpu_lpi;
1724         average.packages.sys_lpi = p->sys_lpi;
1725
1726         average.packages.energy_pkg += p->energy_pkg;
1727         average.packages.energy_dram += p->energy_dram;
1728         average.packages.energy_cores += p->energy_cores;
1729         average.packages.energy_gfx += p->energy_gfx;
1730
1731         average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1732         average.packages.gfx_mhz = p->gfx_mhz;
1733         average.packages.gfx_act_mhz = p->gfx_act_mhz;
1734
1735         average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1736
1737         average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1738         average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1739
1740         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1741                 if (mp->format == FORMAT_RAW)
1742                         continue;
1743                 average.packages.counter[i] += p->counter[i];
1744         }
1745         return 0;
1746 }
1747 /*
1748  * sum the counters for all cpus in the system
1749  * compute the weighted average
1750  */
1751 void compute_average(struct thread_data *t, struct core_data *c,
1752         struct pkg_data *p)
1753 {
1754         int i;
1755         struct msr_counter *mp;
1756
1757         clear_counters(&average.threads, &average.cores, &average.packages);
1758
1759         for_all_cpus(sum_counters, t, c, p);
1760
1761         /* Use the global time delta for the average. */
1762         average.threads.tv_delta = tv_delta;
1763
1764         average.threads.tsc /= topo.num_cpus;
1765         average.threads.aperf /= topo.num_cpus;
1766         average.threads.mperf /= topo.num_cpus;
1767         average.threads.instr_count /= topo.num_cpus;
1768         average.threads.c1 /= topo.num_cpus;
1769
1770         if (average.threads.irq_count > 9999999)
1771                 sums_need_wide_columns = 1;
1772
1773         average.cores.c3 /= topo.num_cores;
1774         average.cores.c6 /= topo.num_cores;
1775         average.cores.c7 /= topo.num_cores;
1776         average.cores.mc6_us /= topo.num_cores;
1777
1778         if (DO_BIC(BIC_Totl_c0))
1779                 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1780         if (DO_BIC(BIC_Any_c0))
1781                 average.packages.pkg_any_core_c0 /= topo.num_packages;
1782         if (DO_BIC(BIC_GFX_c0))
1783                 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1784         if (DO_BIC(BIC_CPUGFX))
1785                 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1786
1787         average.packages.pc2 /= topo.num_packages;
1788         if (DO_BIC(BIC_Pkgpc3))
1789                 average.packages.pc3 /= topo.num_packages;
1790         if (DO_BIC(BIC_Pkgpc6))
1791                 average.packages.pc6 /= topo.num_packages;
1792         if (DO_BIC(BIC_Pkgpc7))
1793                 average.packages.pc7 /= topo.num_packages;
1794
1795         average.packages.pc8 /= topo.num_packages;
1796         average.packages.pc9 /= topo.num_packages;
1797         average.packages.pc10 /= topo.num_packages;
1798
1799         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1800                 if (mp->format == FORMAT_RAW)
1801                         continue;
1802                 if (mp->type == COUNTER_ITEMS) {
1803                         if (average.threads.counter[i] > 9999999)
1804                                 sums_need_wide_columns = 1;
1805                         continue;
1806                 }
1807                 average.threads.counter[i] /= topo.num_cpus;
1808         }
1809         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1810                 if (mp->format == FORMAT_RAW)
1811                         continue;
1812                 if (mp->type == COUNTER_ITEMS) {
1813                         if (average.cores.counter[i] > 9999999)
1814                                 sums_need_wide_columns = 1;
1815                 }
1816                 average.cores.counter[i] /= topo.num_cores;
1817         }
1818         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1819                 if (mp->format == FORMAT_RAW)
1820                         continue;
1821                 if (mp->type == COUNTER_ITEMS) {
1822                         if (average.packages.counter[i] > 9999999)
1823                                 sums_need_wide_columns = 1;
1824                 }
1825                 average.packages.counter[i] /= topo.num_packages;
1826         }
1827 }
1828
1829 static unsigned long long rdtsc(void)
1830 {
1831         unsigned int low, high;
1832
1833         asm volatile("rdtsc" : "=a" (low), "=d" (high));
1834
1835         return low | ((unsigned long long)high) << 32;
1836 }
1837
1838 /*
1839  * Open a file, and exit on failure
1840  */
1841 FILE *fopen_or_die(const char *path, const char *mode)
1842 {
1843         FILE *filep = fopen(path, mode);
1844
1845         if (!filep)
1846                 err(1, "%s: open failed", path);
1847         return filep;
1848 }
1849 /*
1850  * snapshot_sysfs_counter()
1851  *
1852  * return snapshot of given counter
1853  */
1854 unsigned long long snapshot_sysfs_counter(char *path)
1855 {
1856         FILE *fp;
1857         int retval;
1858         unsigned long long counter;
1859
1860         fp = fopen_or_die(path, "r");
1861
1862         retval = fscanf(fp, "%lld", &counter);
1863         if (retval != 1)
1864                 err(1, "snapshot_sysfs_counter(%s)", path);
1865
1866         fclose(fp);
1867
1868         return counter;
1869 }
1870
1871 int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1872 {
1873         if (mp->msr_num != 0) {
1874                 if (get_msr(cpu, mp->msr_num, counterp))
1875                         return -1;
1876         } else {
1877                 char path[128 + PATH_BYTES];
1878
1879                 if (mp->flags & SYSFS_PERCPU) {
1880                         sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1881                                  cpu, mp->path);
1882
1883                         *counterp = snapshot_sysfs_counter(path);
1884                 } else {
1885                         *counterp = snapshot_sysfs_counter(mp->path);
1886                 }
1887         }
1888
1889         return 0;
1890 }
1891
1892 int get_epb(int cpu)
1893 {
1894         char path[128 + PATH_BYTES];
1895         unsigned long long msr;
1896         int ret, epb = -1;
1897         FILE *fp;
1898
1899         sprintf(path, "/sys/devices/system/cpu/cpu%d/power/energy_perf_bias", cpu);
1900
1901         fp = fopen(path, "r");
1902         if (!fp)
1903                 goto msr_fallback;
1904
1905         ret = fscanf(fp, "%d", &epb);
1906         if (ret != 1)
1907                 err(1, "%s(%s)", __func__, path);
1908
1909         fclose(fp);
1910
1911         return epb;
1912
1913 msr_fallback:
1914         get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr);
1915
1916         return msr & 0xf;
1917 }
1918
1919 void get_apic_id(struct thread_data *t)
1920 {
1921         unsigned int eax, ebx, ecx, edx;
1922
1923         if (DO_BIC(BIC_APIC)) {
1924                 eax = ebx = ecx = edx = 0;
1925                 __cpuid(1, eax, ebx, ecx, edx);
1926
1927                 t->apic_id = (ebx >> 24) & 0xff;
1928         }
1929
1930         if (!DO_BIC(BIC_X2APIC))
1931                 return;
1932
1933         if (authentic_amd || hygon_genuine) {
1934                 unsigned int topology_extensions;
1935
1936                 if (max_extended_level < 0x8000001e)
1937                         return;
1938
1939                 eax = ebx = ecx = edx = 0;
1940                 __cpuid(0x80000001, eax, ebx, ecx, edx);
1941                         topology_extensions = ecx & (1 << 22);
1942
1943                 if (topology_extensions == 0)
1944                         return;
1945
1946                 eax = ebx = ecx = edx = 0;
1947                 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1948
1949                 t->x2apic_id = eax;
1950                 return;
1951         }
1952
1953         if (!genuine_intel)
1954                 return;
1955
1956         if (max_level < 0xb)
1957                 return;
1958
1959         ecx = 0;
1960         __cpuid(0xb, eax, ebx, ecx, edx);
1961         t->x2apic_id = edx;
1962
1963         if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1964                 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1965                                 t->cpu_id, t->apic_id, t->x2apic_id);
1966 }
1967
1968 /*
1969  * get_counters(...)
1970  * migrate to cpu
1971  * acquire and record local counters for that cpu
1972  */
1973 int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1974 {
1975         int cpu = t->cpu_id;
1976         unsigned long long msr;
1977         int aperf_mperf_retry_count = 0;
1978         struct msr_counter *mp;
1979         int i;
1980
1981         if (cpu_migrate(cpu)) {
1982                 fprintf(outf, "get_counters: Could not migrate to CPU %d\n", cpu);
1983                 return -1;
1984         }
1985
1986         gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1987
1988         if (first_counter_read)
1989                 get_apic_id(t);
1990 retry:
1991         t->tsc = rdtsc();       /* we are running on local CPU of interest */
1992
1993         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1994             soft_c1_residency_display(BIC_Avg_MHz)) {
1995                 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1996
1997                 /*
1998                  * The TSC, APERF and MPERF must be read together for
1999                  * APERF/MPERF and MPERF/TSC to give accurate results.
2000                  *
2001                  * Unfortunately, APERF and MPERF are read by
2002                  * individual system call, so delays may occur
2003                  * between them.  If the time to read them
2004                  * varies by a large amount, we re-read them.
2005                  */
2006
2007                 /*
2008                  * This initial dummy APERF read has been seen to
2009                  * reduce jitter in the subsequent reads.
2010                  */
2011
2012                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
2013                         return -3;
2014
2015                 t->tsc = rdtsc();       /* re-read close to APERF */
2016
2017                 tsc_before = t->tsc;
2018
2019                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
2020                         return -3;
2021
2022                 tsc_between = rdtsc();
2023
2024                 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
2025                         return -4;
2026
2027                 tsc_after = rdtsc();
2028
2029                 aperf_time = tsc_between - tsc_before;
2030                 mperf_time = tsc_after - tsc_between;
2031
2032                 /*
2033                  * If the system call latency to read APERF and MPERF
2034                  * differ by more than 2x, then try again.
2035                  */
2036                 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
2037                         aperf_mperf_retry_count++;
2038                         if (aperf_mperf_retry_count < 5)
2039                                 goto retry;
2040                         else
2041                                 warnx("cpu%d jitter %lld %lld",
2042                                         cpu, aperf_time, mperf_time);
2043                 }
2044                 aperf_mperf_retry_count = 0;
2045
2046                 t->aperf = t->aperf * aperf_mperf_multiplier;
2047                 t->mperf = t->mperf * aperf_mperf_multiplier;
2048         }
2049
2050         if (DO_BIC(BIC_IPC))
2051                 if (read(get_instr_count_fd(cpu), &t->instr_count, sizeof(long long)) != sizeof(long long))
2052                         return -4;
2053
2054         if (DO_BIC(BIC_IRQ))
2055                 t->irq_count = irqs_per_cpu[cpu];
2056         if (DO_BIC(BIC_SMI)) {
2057                 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
2058                         return -5;
2059                 t->smi_count = msr & 0xFFFFFFFF;
2060         }
2061         if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
2062                 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
2063                         return -6;
2064         }
2065
2066         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
2067                 if (get_mp(cpu, mp, &t->counter[i]))
2068                         return -10;
2069         }
2070
2071         /* collect core counters only for 1st thread in core */
2072         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2073                 goto done;
2074
2075         if (DO_BIC(BIC_CPU_c3) || soft_c1_residency_display(BIC_CPU_c3)) {
2076                 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
2077                         return -6;
2078         }
2079
2080         if ((DO_BIC(BIC_CPU_c6) || soft_c1_residency_display(BIC_CPU_c6)) && !do_knl_cstates) {
2081                 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
2082                         return -7;
2083         } else if (do_knl_cstates || soft_c1_residency_display(BIC_CPU_c6)) {
2084                 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
2085                         return -7;
2086         }
2087
2088         if (DO_BIC(BIC_CPU_c7) || soft_c1_residency_display(BIC_CPU_c7))
2089                 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
2090                         return -8;
2091
2092         if (DO_BIC(BIC_Mod_c6))
2093                 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
2094                         return -8;
2095
2096         if (DO_BIC(BIC_CoreTmp)) {
2097                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2098                         return -9;
2099                 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2100         }
2101
2102         if (do_rapl & RAPL_AMD_F17H) {
2103                 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
2104                         return -14;
2105                 c->core_energy = msr & 0xFFFFFFFF;
2106         }
2107
2108         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
2109                 if (get_mp(cpu, mp, &c->counter[i]))
2110                         return -10;
2111         }
2112
2113         /* collect package counters only for 1st core in package */
2114         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2115                 goto done;
2116
2117         if (DO_BIC(BIC_Totl_c0)) {
2118                 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
2119                         return -10;
2120         }
2121         if (DO_BIC(BIC_Any_c0)) {
2122                 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
2123                         return -11;
2124         }
2125         if (DO_BIC(BIC_GFX_c0)) {
2126                 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
2127                         return -12;
2128         }
2129         if (DO_BIC(BIC_CPUGFX)) {
2130                 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
2131                         return -13;
2132         }
2133         if (DO_BIC(BIC_Pkgpc3))
2134                 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
2135                         return -9;
2136         if (DO_BIC(BIC_Pkgpc6)) {
2137                 if (do_slm_cstates) {
2138                         if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
2139                                 return -10;
2140                 } else {
2141                         if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
2142                                 return -10;
2143                 }
2144         }
2145
2146         if (DO_BIC(BIC_Pkgpc2))
2147                 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
2148                         return -11;
2149         if (DO_BIC(BIC_Pkgpc7))
2150                 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
2151                         return -12;
2152         if (DO_BIC(BIC_Pkgpc8))
2153                 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
2154                         return -13;
2155         if (DO_BIC(BIC_Pkgpc9))
2156                 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
2157                         return -13;
2158         if (DO_BIC(BIC_Pkgpc10))
2159                 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
2160                         return -13;
2161
2162         if (DO_BIC(BIC_CPU_LPI))
2163                 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
2164         if (DO_BIC(BIC_SYS_LPI))
2165                 p->sys_lpi = cpuidle_cur_sys_lpi_us;
2166
2167         if (do_rapl & RAPL_PKG) {
2168                 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STATUS, &msr))
2169                         return -13;
2170                 p->energy_pkg = msr;
2171         }
2172         if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
2173                 if (get_msr_sum(cpu, MSR_PP0_ENERGY_STATUS, &msr))
2174                         return -14;
2175                 p->energy_cores = msr;
2176         }
2177         if (do_rapl & RAPL_DRAM) {
2178                 if (get_msr_sum(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
2179                         return -15;
2180                 p->energy_dram = msr;
2181         }
2182         if (do_rapl & RAPL_GFX) {
2183                 if (get_msr_sum(cpu, MSR_PP1_ENERGY_STATUS, &msr))
2184                         return -16;
2185                 p->energy_gfx = msr;
2186         }
2187         if (do_rapl & RAPL_PKG_PERF_STATUS) {
2188                 if (get_msr_sum(cpu, MSR_PKG_PERF_STATUS, &msr))
2189                         return -16;
2190                 p->rapl_pkg_perf_status = msr;
2191         }
2192         if (do_rapl & RAPL_DRAM_PERF_STATUS) {
2193                 if (get_msr_sum(cpu, MSR_DRAM_PERF_STATUS, &msr))
2194                         return -16;
2195                 p->rapl_dram_perf_status = msr;
2196         }
2197         if (do_rapl & RAPL_AMD_F17H) {
2198                 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STAT, &msr))
2199                         return -13;
2200                 p->energy_pkg = msr;
2201         }
2202         if (DO_BIC(BIC_PkgTmp)) {
2203                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2204                         return -17;
2205                 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2206         }
2207
2208         if (DO_BIC(BIC_GFX_rc6))
2209                 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2210
2211         if (DO_BIC(BIC_GFXMHz))
2212                 p->gfx_mhz = gfx_cur_mhz;
2213
2214         if (DO_BIC(BIC_GFXACTMHz))
2215                 p->gfx_act_mhz = gfx_act_mhz;
2216
2217         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
2218                 if (get_mp(cpu, mp, &p->counter[i]))
2219                         return -10;
2220         }
2221 done:
2222         gettimeofday(&t->tv_end, (struct timezone *)NULL);
2223
2224         return 0;
2225 }
2226
2227 /*
2228  * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2229  * If you change the values, note they are used both in comparisons
2230  * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2231  */
2232
2233 #define PCLUKN 0 /* Unknown */
2234 #define PCLRSV 1 /* Reserved */
2235 #define PCL__0 2 /* PC0 */
2236 #define PCL__1 3 /* PC1 */
2237 #define PCL__2 4 /* PC2 */
2238 #define PCL__3 5 /* PC3 */
2239 #define PCL__4 6 /* PC4 */
2240 #define PCL__6 7 /* PC6 */
2241 #define PCL_6N 8 /* PC6 No Retention */
2242 #define PCL_6R 9 /* PC6 Retention */
2243 #define PCL__7 10 /* PC7 */
2244 #define PCL_7S 11 /* PC7 Shrink */
2245 #define PCL__8 12 /* PC8 */
2246 #define PCL__9 13 /* PC9 */
2247 #define PCL_10 14 /* PC10 */
2248 #define PCLUNL 15 /* Unlimited */
2249
2250 int pkg_cstate_limit = PCLUKN;
2251 char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
2252         "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
2253
2254 int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2255 int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2256 int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2257 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
2258 int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2259 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2260 int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2261 int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2262
2263
2264 static void
2265 calculate_tsc_tweak()
2266 {
2267         tsc_tweak = base_hz / tsc_hz;
2268 }
2269
2270 static void
2271 dump_nhm_platform_info(void)
2272 {
2273         unsigned long long msr;
2274         unsigned int ratio;
2275
2276         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2277
2278         fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
2279
2280         ratio = (msr >> 40) & 0xFF;
2281         fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
2282                 ratio, bclk, ratio * bclk);
2283
2284         ratio = (msr >> 8) & 0xFF;
2285         fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2286                 ratio, bclk, ratio * bclk);
2287
2288         get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
2289         fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
2290                 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
2291
2292         return;
2293 }
2294
2295 static void
2296 dump_hsw_turbo_ratio_limits(void)
2297 {
2298         unsigned long long msr;
2299         unsigned int ratio;
2300
2301         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
2302
2303         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
2304
2305         ratio = (msr >> 8) & 0xFF;
2306         if (ratio)
2307                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
2308                         ratio, bclk, ratio * bclk);
2309
2310         ratio = (msr >> 0) & 0xFF;
2311         if (ratio)
2312                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
2313                         ratio, bclk, ratio * bclk);
2314         return;
2315 }
2316
2317 static void
2318 dump_ivt_turbo_ratio_limits(void)
2319 {
2320         unsigned long long msr;
2321         unsigned int ratio;
2322
2323         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
2324
2325         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
2326
2327         ratio = (msr >> 56) & 0xFF;
2328         if (ratio)
2329                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
2330                         ratio, bclk, ratio * bclk);
2331
2332         ratio = (msr >> 48) & 0xFF;
2333         if (ratio)
2334                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
2335                         ratio, bclk, ratio * bclk);
2336
2337         ratio = (msr >> 40) & 0xFF;
2338         if (ratio)
2339                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
2340                         ratio, bclk, ratio * bclk);
2341
2342         ratio = (msr >> 32) & 0xFF;
2343         if (ratio)
2344                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
2345                         ratio, bclk, ratio * bclk);
2346
2347         ratio = (msr >> 24) & 0xFF;
2348         if (ratio)
2349                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
2350                         ratio, bclk, ratio * bclk);
2351
2352         ratio = (msr >> 16) & 0xFF;
2353         if (ratio)
2354                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
2355                         ratio, bclk, ratio * bclk);
2356
2357         ratio = (msr >> 8) & 0xFF;
2358         if (ratio)
2359                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
2360                         ratio, bclk, ratio * bclk);
2361
2362         ratio = (msr >> 0) & 0xFF;
2363         if (ratio)
2364                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
2365                         ratio, bclk, ratio * bclk);
2366         return;
2367 }
2368 int has_turbo_ratio_group_limits(int family, int model)
2369 {
2370
2371         if (!genuine_intel)
2372                 return 0;
2373
2374         switch (model) {
2375         case INTEL_FAM6_ATOM_GOLDMONT:
2376         case INTEL_FAM6_SKYLAKE_X:
2377         case INTEL_FAM6_ATOM_GOLDMONT_D:
2378         case INTEL_FAM6_ATOM_TREMONT_D:
2379                 return 1;
2380         }
2381         return 0;
2382 }
2383
2384 static void
2385 dump_turbo_ratio_limits(int family, int model)
2386 {
2387         unsigned long long msr, core_counts;
2388         unsigned int ratio, group_size;
2389
2390         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2391         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
2392
2393         if (has_turbo_ratio_group_limits(family, model)) {
2394                 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2395                 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2396         } else {
2397                 core_counts = 0x0807060504030201;
2398         }
2399
2400         ratio = (msr >> 56) & 0xFF;
2401         group_size = (core_counts >> 56) & 0xFF;
2402         if (ratio)
2403                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2404                         ratio, bclk, ratio * bclk, group_size);
2405
2406         ratio = (msr >> 48) & 0xFF;
2407         group_size = (core_counts >> 48) & 0xFF;
2408         if (ratio)
2409                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2410                         ratio, bclk, ratio * bclk, group_size);
2411
2412         ratio = (msr >> 40) & 0xFF;
2413         group_size = (core_counts >> 40) & 0xFF;
2414         if (ratio)
2415                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2416                         ratio, bclk, ratio * bclk, group_size);
2417
2418         ratio = (msr >> 32) & 0xFF;
2419         group_size = (core_counts >> 32) & 0xFF;
2420         if (ratio)
2421                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2422                         ratio, bclk, ratio * bclk, group_size);
2423
2424         ratio = (msr >> 24) & 0xFF;
2425         group_size = (core_counts >> 24) & 0xFF;
2426         if (ratio)
2427                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2428                         ratio, bclk, ratio * bclk, group_size);
2429
2430         ratio = (msr >> 16) & 0xFF;
2431         group_size = (core_counts >> 16) & 0xFF;
2432         if (ratio)
2433                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2434                         ratio, bclk, ratio * bclk, group_size);
2435
2436         ratio = (msr >> 8) & 0xFF;
2437         group_size = (core_counts >> 8) & 0xFF;
2438         if (ratio)
2439                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2440                         ratio, bclk, ratio * bclk, group_size);
2441
2442         ratio = (msr >> 0) & 0xFF;
2443         group_size = (core_counts >> 0) & 0xFF;
2444         if (ratio)
2445                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2446                         ratio, bclk, ratio * bclk, group_size);
2447         return;
2448 }
2449
2450 static void
2451 dump_atom_turbo_ratio_limits(void)
2452 {
2453         unsigned long long msr;
2454         unsigned int ratio;
2455
2456         get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2457         fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2458
2459         ratio = (msr >> 0) & 0x3F;
2460         if (ratio)
2461                 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2462                         ratio, bclk, ratio * bclk);
2463
2464         ratio = (msr >> 8) & 0x3F;
2465         if (ratio)
2466                 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2467                         ratio, bclk, ratio * bclk);
2468
2469         ratio = (msr >> 16) & 0x3F;
2470         if (ratio)
2471                 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2472                         ratio, bclk, ratio * bclk);
2473
2474         get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2475         fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2476
2477         ratio = (msr >> 24) & 0x3F;
2478         if (ratio)
2479                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2480                         ratio, bclk, ratio * bclk);
2481
2482         ratio = (msr >> 16) & 0x3F;
2483         if (ratio)
2484                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2485                         ratio, bclk, ratio * bclk);
2486
2487         ratio = (msr >> 8) & 0x3F;
2488         if (ratio)
2489                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2490                         ratio, bclk, ratio * bclk);
2491
2492         ratio = (msr >> 0) & 0x3F;
2493         if (ratio)
2494                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2495                         ratio, bclk, ratio * bclk);
2496 }
2497
2498 static void
2499 dump_knl_turbo_ratio_limits(void)
2500 {
2501         const unsigned int buckets_no = 7;
2502
2503         unsigned long long msr;
2504         int delta_cores, delta_ratio;
2505         int i, b_nr;
2506         unsigned int cores[buckets_no];
2507         unsigned int ratio[buckets_no];
2508
2509         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2510
2511         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
2512                 base_cpu, msr);
2513
2514         /**
2515          * Turbo encoding in KNL is as follows:
2516          * [0] -- Reserved
2517          * [7:1] -- Base value of number of active cores of bucket 1.
2518          * [15:8] -- Base value of freq ratio of bucket 1.
2519          * [20:16] -- +ve delta of number of active cores of bucket 2.
2520          * i.e. active cores of bucket 2 =
2521          * active cores of bucket 1 + delta
2522          * [23:21] -- Negative delta of freq ratio of bucket 2.
2523          * i.e. freq ratio of bucket 2 =
2524          * freq ratio of bucket 1 - delta
2525          * [28:24]-- +ve delta of number of active cores of bucket 3.
2526          * [31:29]-- -ve delta of freq ratio of bucket 3.
2527          * [36:32]-- +ve delta of number of active cores of bucket 4.
2528          * [39:37]-- -ve delta of freq ratio of bucket 4.
2529          * [44:40]-- +ve delta of number of active cores of bucket 5.
2530          * [47:45]-- -ve delta of freq ratio of bucket 5.
2531          * [52:48]-- +ve delta of number of active cores of bucket 6.
2532          * [55:53]-- -ve delta of freq ratio of bucket 6.
2533          * [60:56]-- +ve delta of number of active cores of bucket 7.
2534          * [63:61]-- -ve delta of freq ratio of bucket 7.
2535          */
2536
2537         b_nr = 0;
2538         cores[b_nr] = (msr & 0xFF) >> 1;
2539         ratio[b_nr] = (msr >> 8) & 0xFF;
2540
2541         for (i = 16; i < 64; i += 8) {
2542                 delta_cores = (msr >> i) & 0x1F;
2543                 delta_ratio = (msr >> (i + 5)) & 0x7;
2544
2545                 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2546                 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2547                 b_nr++;
2548         }
2549
2550         for (i = buckets_no - 1; i >= 0; i--)
2551                 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
2552                         fprintf(outf,
2553                                 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2554                                 ratio[i], bclk, ratio[i] * bclk, cores[i]);
2555 }
2556
2557 static void
2558 dump_nhm_cst_cfg(void)
2559 {
2560         unsigned long long msr;
2561
2562         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2563
2564         fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
2565
2566         fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
2567                 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2568                 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2569                 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2570                 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2571                 (msr & (1 << 15)) ? "" : "UN",
2572                 (unsigned int)msr & 0xF,
2573                 pkg_cstate_limit_strings[pkg_cstate_limit]);
2574
2575 #define AUTOMATIC_CSTATE_CONVERSION             (1UL << 16)
2576         if (has_automatic_cstate_conversion) {
2577                 fprintf(outf, ", automatic c-state conversion=%s",
2578                         (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2579         }
2580
2581         fprintf(outf, ")\n");
2582
2583         return;
2584 }
2585
2586 static void
2587 dump_config_tdp(void)
2588 {
2589         unsigned long long msr;
2590
2591         get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
2592         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
2593         fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
2594
2595         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
2596         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
2597         if (msr) {
2598                 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2599                 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2600                 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2601                 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
2602         }
2603         fprintf(outf, ")\n");
2604
2605         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
2606         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
2607         if (msr) {
2608                 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2609                 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2610                 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2611                 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
2612         }
2613         fprintf(outf, ")\n");
2614
2615         get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
2616         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
2617         if ((msr) & 0x3)
2618                 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2619         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2620         fprintf(outf, ")\n");
2621
2622         get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
2623         fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
2624         fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
2625         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2626         fprintf(outf, ")\n");
2627 }
2628
2629 unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2630
2631 void print_irtl(void)
2632 {
2633         unsigned long long msr;
2634
2635         get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2636         fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2637         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2638                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2639
2640         get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2641         fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2642         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2643                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2644
2645         get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2646         fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2647         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2648                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2649
2650         if (!do_irtl_hsw)
2651                 return;
2652
2653         get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2654         fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2655         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2656                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2657
2658         get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2659         fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2660         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2661                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2662
2663         get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2664         fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2665         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2666                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2667
2668 }
2669 void free_fd_percpu(void)
2670 {
2671         int i;
2672
2673         for (i = 0; i < topo.max_cpu_num + 1; ++i) {
2674                 if (fd_percpu[i] != 0)
2675                         close(fd_percpu[i]);
2676         }
2677
2678         free(fd_percpu);
2679 }
2680
2681 void free_all_buffers(void)
2682 {
2683         int i;
2684
2685         CPU_FREE(cpu_present_set);
2686         cpu_present_set = NULL;
2687         cpu_present_setsize = 0;
2688
2689         CPU_FREE(cpu_affinity_set);
2690         cpu_affinity_set = NULL;
2691         cpu_affinity_setsize = 0;
2692
2693         free(thread_even);
2694         free(core_even);
2695         free(package_even);
2696
2697         thread_even = NULL;
2698         core_even = NULL;
2699         package_even = NULL;
2700
2701         free(thread_odd);
2702         free(core_odd);
2703         free(package_odd);
2704
2705         thread_odd = NULL;
2706         core_odd = NULL;
2707         package_odd = NULL;
2708
2709         free(output_buffer);
2710         output_buffer = NULL;
2711         outp = NULL;
2712
2713         free_fd_percpu();
2714
2715         free(irq_column_2_cpu);
2716         free(irqs_per_cpu);
2717
2718         for (i = 0; i <= topo.max_cpu_num; ++i) {
2719                 if (cpus[i].put_ids)
2720                         CPU_FREE(cpus[i].put_ids);
2721         }
2722         free(cpus);
2723 }
2724
2725
2726 /*
2727  * Parse a file containing a single int.
2728  * Return 0 if file can not be opened
2729  * Exit if file can be opened, but can not be parsed
2730  */
2731 int parse_int_file(const char *fmt, ...)
2732 {
2733         va_list args;
2734         char path[PATH_MAX];
2735         FILE *filep;
2736         int value;
2737
2738         va_start(args, fmt);
2739         vsnprintf(path, sizeof(path), fmt, args);
2740         va_end(args);
2741         filep = fopen(path, "r");
2742         if (!filep)
2743                 return 0;
2744         if (fscanf(filep, "%d", &value) != 1)
2745                 err(1, "%s: failed to parse number from file", path);
2746         fclose(filep);
2747         return value;
2748 }
2749
2750 /*
2751  * cpu_is_first_core_in_package(cpu)
2752  * return 1 if given CPU is 1st core in package
2753  */
2754 int cpu_is_first_core_in_package(int cpu)
2755 {
2756         return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
2757 }
2758
2759 int get_physical_package_id(int cpu)
2760 {
2761         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
2762 }
2763
2764 int get_die_id(int cpu)
2765 {
2766         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2767 }
2768
2769 int get_core_id(int cpu)
2770 {
2771         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
2772 }
2773
2774 void set_node_data(void)
2775 {
2776         int pkg, node, lnode, cpu, cpux;
2777         int cpu_count;
2778
2779         /* initialize logical_node_id */
2780         for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2781                 cpus[cpu].logical_node_id = -1;
2782
2783         cpu_count = 0;
2784         for (pkg = 0; pkg < topo.num_packages; pkg++) {
2785                 lnode = 0;
2786                 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2787                         if (cpus[cpu].physical_package_id != pkg)
2788                                 continue;
2789                         /* find a cpu with an unset logical_node_id */
2790                         if (cpus[cpu].logical_node_id != -1)
2791                                 continue;
2792                         cpus[cpu].logical_node_id = lnode;
2793                         node = cpus[cpu].physical_node_id;
2794                         cpu_count++;
2795                         /*
2796                          * find all matching cpus on this pkg and set
2797                          * the logical_node_id
2798                          */
2799                         for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2800                                 if ((cpus[cpux].physical_package_id == pkg) &&
2801                                    (cpus[cpux].physical_node_id == node)) {
2802                                         cpus[cpux].logical_node_id = lnode;
2803                                         cpu_count++;
2804                                 }
2805                         }
2806                         lnode++;
2807                         if (lnode > topo.nodes_per_pkg)
2808                                 topo.nodes_per_pkg = lnode;
2809                 }
2810                 if (cpu_count >= topo.max_cpu_num)
2811                         break;
2812         }
2813 }
2814
2815 int get_physical_node_id(struct cpu_topology *thiscpu)
2816 {
2817         char path[80];
2818         FILE *filep;
2819         int i;
2820         int cpu = thiscpu->logical_cpu_id;
2821
2822         for (i = 0; i <= topo.max_cpu_num; i++) {
2823                 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2824                         cpu, i);
2825                 filep = fopen(path, "r");
2826                 if (!filep)
2827                         continue;
2828                 fclose(filep);
2829                 return i;
2830         }
2831         return -1;
2832 }
2833
2834 int get_thread_siblings(struct cpu_topology *thiscpu)
2835 {
2836         char path[80], character;
2837         FILE *filep;
2838         unsigned long map;
2839         int so, shift, sib_core;
2840         int cpu = thiscpu->logical_cpu_id;
2841         int offset = topo.max_cpu_num + 1;
2842         size_t size;
2843         int thread_id = 0;
2844
2845         thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
2846         if (thiscpu->thread_id < 0)
2847                 thiscpu->thread_id = thread_id++;
2848         if (!thiscpu->put_ids)
2849                 return -1;
2850
2851         size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2852         CPU_ZERO_S(size, thiscpu->put_ids);
2853
2854         sprintf(path,
2855                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2856         filep = fopen(path, "r");
2857
2858         if (!filep) {
2859                 warnx("%s: open failed", path);
2860                 return -1;
2861         }
2862         do {
2863                 offset -= BITMASK_SIZE;
2864                 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2865                         err(1, "%s: failed to parse file", path);
2866                 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2867                         if ((map >> shift) & 0x1) {
2868                                 so = shift + offset;
2869                                 sib_core = get_core_id(so);
2870                                 if (sib_core == thiscpu->physical_core_id) {
2871                                         CPU_SET_S(so, size, thiscpu->put_ids);
2872                                         if ((so != cpu) &&
2873                                             (cpus[so].thread_id < 0))
2874                                                 cpus[so].thread_id =
2875                                                                     thread_id++;
2876                                 }
2877                         }
2878                 }
2879         } while (!strncmp(&character, ",", 1));
2880         fclose(filep);
2881
2882         return CPU_COUNT_S(size, thiscpu->put_ids);
2883 }
2884
2885 /*
2886  * run func(thread, core, package) in topology order
2887  * skip non-present cpus
2888  */
2889
2890 int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2891         struct pkg_data *, struct thread_data *, struct core_data *,
2892         struct pkg_data *), struct thread_data *thread_base,
2893         struct core_data *core_base, struct pkg_data *pkg_base,
2894         struct thread_data *thread_base2, struct core_data *core_base2,
2895         struct pkg_data *pkg_base2)
2896 {
2897         int retval, pkg_no, node_no, core_no, thread_no;
2898
2899         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
2900                 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2901                         for (core_no = 0; core_no < topo.cores_per_node;
2902                              ++core_no) {
2903                                 for (thread_no = 0; thread_no <
2904                                         topo.threads_per_core; ++thread_no) {
2905                                         struct thread_data *t, *t2;
2906                                         struct core_data *c, *c2;
2907                                         struct pkg_data *p, *p2;
2908
2909                                         t = GET_THREAD(thread_base, thread_no,
2910                                                        core_no, node_no,
2911                                                        pkg_no);
2912
2913                                         if (cpu_is_not_present(t->cpu_id))
2914                                                 continue;
2915
2916                                         t2 = GET_THREAD(thread_base2, thread_no,
2917                                                         core_no, node_no,
2918                                                         pkg_no);
2919
2920                                         c = GET_CORE(core_base, core_no,
2921                                                      node_no, pkg_no);
2922                                         c2 = GET_CORE(core_base2, core_no,
2923                                                       node_no,
2924                                                       pkg_no);
2925
2926                                         p = GET_PKG(pkg_base, pkg_no);
2927                                         p2 = GET_PKG(pkg_base2, pkg_no);
2928
2929                                         retval = func(t, c, p, t2, c2, p2);
2930                                         if (retval)
2931                                                 return retval;
2932                                 }
2933                         }
2934                 }
2935         }
2936         return 0;
2937 }
2938
2939 /*
2940  * run func(cpu) on every cpu in /proc/stat
2941  * return max_cpu number
2942  */
2943 int for_all_proc_cpus(int (func)(int))
2944 {
2945         FILE *fp;
2946         int cpu_num;
2947         int retval;
2948
2949         fp = fopen_or_die(proc_stat, "r");
2950
2951         retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
2952         if (retval != 0)
2953                 err(1, "%s: failed to parse format", proc_stat);
2954
2955         while (1) {
2956                 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
2957                 if (retval != 1)
2958                         break;
2959
2960                 retval = func(cpu_num);
2961                 if (retval) {
2962                         fclose(fp);
2963                         return(retval);
2964                 }
2965         }
2966         fclose(fp);
2967         return 0;
2968 }
2969
2970 void re_initialize(void)
2971 {
2972         free_all_buffers();
2973         setup_all_buffers();
2974         fprintf(outf, "turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
2975 }
2976
2977 void set_max_cpu_num(void)
2978 {
2979         FILE *filep;
2980         int base_cpu;
2981         unsigned long dummy;
2982         char pathname[64];
2983
2984         base_cpu = sched_getcpu();
2985         if (base_cpu < 0)
2986                 err(1, "cannot find calling cpu ID");
2987         sprintf(pathname,
2988                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings",
2989                 base_cpu);
2990
2991         filep = fopen_or_die(pathname, "r");
2992         topo.max_cpu_num = 0;
2993         while (fscanf(filep, "%lx,", &dummy) == 1)
2994                 topo.max_cpu_num += BITMASK_SIZE;
2995         fclose(filep);
2996         topo.max_cpu_num--; /* 0 based */
2997 }
2998
2999 /*
3000  * count_cpus()
3001  * remember the last one seen, it will be the max
3002  */
3003 int count_cpus(int cpu)
3004 {
3005         topo.num_cpus++;
3006         return 0;
3007 }
3008 int mark_cpu_present(int cpu)
3009 {
3010         CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
3011         return 0;
3012 }
3013
3014 int init_thread_id(int cpu)
3015 {
3016         cpus[cpu].thread_id = -1;
3017         return 0;
3018 }
3019
3020 /*
3021  * snapshot_proc_interrupts()
3022  *
3023  * read and record summary of /proc/interrupts
3024  *
3025  * return 1 if config change requires a restart, else return 0
3026  */
3027 int snapshot_proc_interrupts(void)
3028 {
3029         static FILE *fp;
3030         int column, retval;
3031
3032         if (fp == NULL)
3033                 fp = fopen_or_die("/proc/interrupts", "r");
3034         else
3035                 rewind(fp);
3036
3037         /* read 1st line of /proc/interrupts to get cpu* name for each column */
3038         for (column = 0; column < topo.num_cpus; ++column) {
3039                 int cpu_number;
3040
3041                 retval = fscanf(fp, " CPU%d", &cpu_number);
3042                 if (retval != 1)
3043                         break;
3044
3045                 if (cpu_number > topo.max_cpu_num) {
3046                         warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
3047                         return 1;
3048                 }
3049
3050                 irq_column_2_cpu[column] = cpu_number;
3051                 irqs_per_cpu[cpu_number] = 0;
3052         }
3053
3054         /* read /proc/interrupt count lines and sum up irqs per cpu */
3055         while (1) {
3056                 int column;
3057                 char buf[64];
3058
3059                 retval = fscanf(fp, " %s:", buf);       /* flush irq# "N:" */
3060                 if (retval != 1)
3061                         break;
3062
3063                 /* read the count per cpu */
3064                 for (column = 0; column < topo.num_cpus; ++column) {
3065
3066                         int cpu_number, irq_count;
3067
3068                         retval = fscanf(fp, " %d", &irq_count);
3069                         if (retval != 1)
3070                                 break;
3071
3072                         cpu_number = irq_column_2_cpu[column];
3073                         irqs_per_cpu[cpu_number] += irq_count;
3074
3075                 }
3076
3077                 while (getc(fp) != '\n')
3078                         ;       /* flush interrupt description */
3079
3080         }
3081         return 0;
3082 }
3083 /*
3084  * snapshot_gfx_rc6_ms()
3085  *
3086  * record snapshot of
3087  * /sys/class/drm/card0/power/rc6_residency_ms
3088  *
3089  * return 1 if config change requires a restart, else return 0
3090  */
3091 int snapshot_gfx_rc6_ms(void)
3092 {
3093         FILE *fp;
3094         int retval;
3095
3096         fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
3097
3098         retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
3099         if (retval != 1)
3100                 err(1, "GFX rc6");
3101
3102         fclose(fp);
3103
3104         return 0;
3105 }
3106 /*
3107  * snapshot_gfx_mhz()
3108  *
3109  * record snapshot of
3110  * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
3111  *
3112  * return 1 if config change requires a restart, else return 0
3113  */
3114 int snapshot_gfx_mhz(void)
3115 {
3116         static FILE *fp;
3117         int retval;
3118
3119         if (fp == NULL)
3120                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
3121         else {
3122                 rewind(fp);
3123                 fflush(fp);
3124         }
3125
3126         retval = fscanf(fp, "%d", &gfx_cur_mhz);
3127         if (retval != 1)
3128                 err(1, "GFX MHz");
3129
3130         return 0;
3131 }
3132
3133 /*
3134  * snapshot_gfx_cur_mhz()
3135  *
3136  * record snapshot of
3137  * /sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz
3138  *
3139  * return 1 if config change requires a restart, else return 0
3140  */
3141 int snapshot_gfx_act_mhz(void)
3142 {
3143         static FILE *fp;
3144         int retval;
3145
3146         if (fp == NULL)
3147                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", "r");
3148         else {
3149                 rewind(fp);
3150                 fflush(fp);
3151         }
3152
3153         retval = fscanf(fp, "%d", &gfx_act_mhz);
3154         if (retval != 1)
3155                 err(1, "GFX ACT MHz");
3156
3157         return 0;
3158 }
3159
3160 /*
3161  * snapshot_cpu_lpi()
3162  *
3163  * record snapshot of
3164  * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
3165  */
3166 int snapshot_cpu_lpi_us(void)
3167 {
3168         FILE *fp;
3169         int retval;
3170
3171         fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
3172
3173         retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
3174         if (retval != 1) {
3175                 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
3176                 BIC_NOT_PRESENT(BIC_CPU_LPI);
3177                 fclose(fp);
3178                 return -1;
3179         }
3180
3181         fclose(fp);
3182
3183         return 0;
3184 }
3185 /*
3186  * snapshot_sys_lpi()
3187  *
3188  * record snapshot of sys_lpi_file
3189  */
3190 int snapshot_sys_lpi_us(void)
3191 {
3192         FILE *fp;
3193         int retval;
3194
3195         fp = fopen_or_die(sys_lpi_file, "r");
3196
3197         retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
3198         if (retval != 1) {
3199                 fprintf(stderr, "Disabling Low Power Idle System output\n");
3200                 BIC_NOT_PRESENT(BIC_SYS_LPI);
3201                 fclose(fp);
3202                 return -1;
3203         }
3204         fclose(fp);
3205
3206         return 0;
3207 }
3208 /*
3209  * snapshot /proc and /sys files
3210  *
3211  * return 1 if configuration restart needed, else return 0
3212  */
3213 int snapshot_proc_sysfs_files(void)
3214 {
3215         if (DO_BIC(BIC_IRQ))
3216                 if (snapshot_proc_interrupts())
3217                         return 1;
3218
3219         if (DO_BIC(BIC_GFX_rc6))
3220                 snapshot_gfx_rc6_ms();
3221
3222         if (DO_BIC(BIC_GFXMHz))
3223                 snapshot_gfx_mhz();
3224
3225         if (DO_BIC(BIC_GFXACTMHz))
3226                 snapshot_gfx_act_mhz();
3227
3228         if (DO_BIC(BIC_CPU_LPI))
3229                 snapshot_cpu_lpi_us();
3230
3231         if (DO_BIC(BIC_SYS_LPI))
3232                 snapshot_sys_lpi_us();
3233
3234         return 0;
3235 }
3236
3237 int exit_requested;
3238
3239 static void signal_handler (int signal)
3240 {
3241         switch (signal) {
3242         case SIGINT:
3243                 exit_requested = 1;
3244                 if (debug)
3245                         fprintf(stderr, " SIGINT\n");
3246                 break;
3247         case SIGUSR1:
3248                 if (debug > 1)
3249                         fprintf(stderr, "SIGUSR1\n");
3250                 break;
3251         }
3252 }
3253
3254 void setup_signal_handler(void)
3255 {
3256         struct sigaction sa;
3257
3258         memset(&sa, 0, sizeof(sa));
3259
3260         sa.sa_handler = &signal_handler;
3261
3262         if (sigaction(SIGINT, &sa, NULL) < 0)
3263                 err(1, "sigaction SIGINT");
3264         if (sigaction(SIGUSR1, &sa, NULL) < 0)
3265                 err(1, "sigaction SIGUSR1");
3266 }
3267
3268 void do_sleep(void)
3269 {
3270         struct timeval tout;
3271         struct timespec rest;
3272         fd_set readfds;
3273         int retval;
3274
3275         FD_ZERO(&readfds);
3276         FD_SET(0, &readfds);
3277
3278         if (ignore_stdin) {
3279                 nanosleep(&interval_ts, NULL);
3280                 return;
3281         }
3282
3283         tout = interval_tv;
3284         retval = select(1, &readfds, NULL, NULL, &tout);
3285
3286         if (retval == 1) {
3287                 switch (getc(stdin)) {
3288                 case 'q':
3289                         exit_requested = 1;
3290                         break;
3291                 case EOF:
3292                         /*
3293                          * 'stdin' is a pipe closed on the other end. There
3294                          * won't be any further input.
3295                          */
3296                         ignore_stdin = 1;
3297                         /* Sleep the rest of the time */
3298                         rest.tv_sec = (tout.tv_sec + tout.tv_usec / 1000000);
3299                         rest.tv_nsec = (tout.tv_usec % 1000000) * 1000;
3300                         nanosleep(&rest, NULL);
3301                 }
3302         }
3303 }
3304
3305 int get_msr_sum(int cpu, off_t offset, unsigned long long *msr)
3306 {
3307         int ret, idx;
3308         unsigned long long msr_cur, msr_last;
3309
3310         if (!per_cpu_msr_sum)
3311                 return 1;
3312
3313         idx = offset_to_idx(offset);
3314         if (idx < 0)
3315                 return idx;
3316         /* get_msr_sum() = sum + (get_msr() - last) */
3317         ret = get_msr(cpu, offset, &msr_cur);
3318         if (ret)
3319                 return ret;
3320         msr_last = per_cpu_msr_sum[cpu].entries[idx].last;
3321         DELTA_WRAP32(msr_cur, msr_last);
3322         *msr = msr_last + per_cpu_msr_sum[cpu].entries[idx].sum;
3323
3324         return 0;
3325 }
3326
3327 timer_t timerid;
3328
3329 /* Timer callback, update the sum of MSRs periodically. */
3330 static int update_msr_sum(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3331 {
3332         int i, ret;
3333         int cpu = t->cpu_id;
3334
3335         for (i = IDX_PKG_ENERGY; i < IDX_COUNT; i++) {
3336                 unsigned long long msr_cur, msr_last;
3337                 int offset;
3338
3339                 if (!idx_valid(i))
3340                         continue;
3341                 offset = idx_to_offset(i);
3342                 if (offset < 0)
3343                         continue;
3344                 ret = get_msr(cpu, offset, &msr_cur);
3345                 if (ret) {
3346                         fprintf(outf, "Can not update msr(0x%x)\n", offset);
3347                         continue;
3348                 }
3349
3350                 msr_last = per_cpu_msr_sum[cpu].entries[i].last;
3351                 per_cpu_msr_sum[cpu].entries[i].last = msr_cur & 0xffffffff;
3352
3353                 DELTA_WRAP32(msr_cur, msr_last);
3354                 per_cpu_msr_sum[cpu].entries[i].sum += msr_last;
3355         }
3356         return 0;
3357 }
3358
3359 static void
3360 msr_record_handler(union sigval v)
3361 {
3362         for_all_cpus(update_msr_sum, EVEN_COUNTERS);
3363 }
3364
3365 void msr_sum_record(void)
3366 {
3367         struct itimerspec its;
3368         struct sigevent sev;
3369
3370         per_cpu_msr_sum = calloc(topo.max_cpu_num + 1, sizeof(struct msr_sum_array));
3371         if (!per_cpu_msr_sum) {
3372                 fprintf(outf, "Can not allocate memory for long time MSR.\n");
3373                 return;
3374         }
3375         /*
3376          * Signal handler might be restricted, so use thread notifier instead.
3377          */
3378         memset(&sev, 0, sizeof(struct sigevent));
3379         sev.sigev_notify = SIGEV_THREAD;
3380         sev.sigev_notify_function = msr_record_handler;
3381
3382         sev.sigev_value.sival_ptr = &timerid;
3383         if (timer_create(CLOCK_REALTIME, &sev, &timerid) == -1) {
3384                 fprintf(outf, "Can not create timer.\n");
3385                 goto release_msr;
3386         }
3387
3388         its.it_value.tv_sec = 0;
3389         its.it_value.tv_nsec = 1;
3390         /*
3391          * A wraparound time has been calculated early.
3392          * Some sources state that the peak power for a
3393          * microprocessor is usually 1.5 times the TDP rating,
3394          * use 2 * TDP for safety.
3395          */
3396         its.it_interval.tv_sec = rapl_joule_counter_range / 2;
3397         its.it_interval.tv_nsec = 0;
3398
3399         if (timer_settime(timerid, 0, &its, NULL) == -1) {
3400                 fprintf(outf, "Can not set timer.\n");
3401                 goto release_timer;
3402         }
3403         return;
3404
3405  release_timer:
3406         timer_delete(timerid);
3407  release_msr:
3408         free(per_cpu_msr_sum);
3409 }
3410
3411 void turbostat_loop()
3412 {
3413         int retval;
3414         int restarted = 0;
3415         int done_iters = 0;
3416
3417         setup_signal_handler();
3418
3419 restart:
3420         restarted++;
3421
3422         snapshot_proc_sysfs_files();
3423         retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3424         first_counter_read = 0;
3425         if (retval < -1) {
3426                 exit(retval);
3427         } else if (retval == -1) {
3428                 if (restarted > 10) {
3429                         exit(retval);
3430                 }
3431                 re_initialize();
3432                 goto restart;
3433         }
3434         restarted = 0;
3435         done_iters = 0;
3436         gettimeofday(&tv_even, (struct timezone *)NULL);
3437
3438         while (1) {
3439                 if (for_all_proc_cpus(cpu_is_not_present)) {
3440                         re_initialize();
3441                         goto restart;
3442                 }
3443                 do_sleep();
3444                 if (snapshot_proc_sysfs_files())
3445                         goto restart;
3446                 retval = for_all_cpus(get_counters, ODD_COUNTERS);
3447                 if (retval < -1) {
3448                         exit(retval);
3449                 } else if (retval == -1) {
3450                         re_initialize();
3451                         goto restart;
3452                 }
3453                 gettimeofday(&tv_odd, (struct timezone *)NULL);
3454                 timersub(&tv_odd, &tv_even, &tv_delta);
3455                 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3456                         re_initialize();
3457                         goto restart;
3458                 }
3459                 compute_average(EVEN_COUNTERS);
3460                 format_all_counters(EVEN_COUNTERS);
3461                 flush_output_stdout();
3462                 if (exit_requested)
3463                         break;
3464                 if (num_iterations && ++done_iters >= num_iterations)
3465                         break;
3466                 do_sleep();
3467                 if (snapshot_proc_sysfs_files())
3468                         goto restart;
3469                 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3470                 if (retval < -1) {
3471                         exit(retval);
3472                 } else if (retval == -1) {
3473                         re_initialize();
3474                         goto restart;
3475                 }
3476                 gettimeofday(&tv_even, (struct timezone *)NULL);
3477                 timersub(&tv_even, &tv_odd, &tv_delta);
3478                 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3479                         re_initialize();
3480                         goto restart;
3481                 }
3482                 compute_average(ODD_COUNTERS);
3483                 format_all_counters(ODD_COUNTERS);
3484                 flush_output_stdout();
3485                 if (exit_requested)
3486                         break;
3487                 if (num_iterations && ++done_iters >= num_iterations)
3488                         break;
3489         }
3490 }
3491
3492 void check_dev_msr()
3493 {
3494         struct stat sb;
3495         char pathname[32];
3496
3497         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3498         if (stat(pathname, &sb))
3499                 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3500                         err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
3501 }
3502
3503 /*
3504  * check for CAP_SYS_RAWIO
3505  * return 0 on success
3506  * return 1 on fail
3507  */
3508 int check_for_cap_sys_rawio(void)
3509 {
3510         cap_t caps;
3511         cap_flag_value_t cap_flag_value;
3512
3513         caps = cap_get_proc();
3514         if (caps == NULL)
3515                 err(-6, "cap_get_proc\n");
3516
3517         if (cap_get_flag(caps, CAP_SYS_RAWIO, CAP_EFFECTIVE, &cap_flag_value))
3518                 err(-6, "cap_get\n");
3519
3520         if (cap_flag_value != CAP_SET) {
3521                 warnx("capget(CAP_SYS_RAWIO) failed,"
3522                         " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3523                 return 1;
3524         }
3525
3526         if (cap_free(caps) == -1)
3527                 err(-6, "cap_free\n");
3528
3529         return 0;
3530 }
3531 void check_permissions(void)
3532 {
3533         int do_exit = 0;
3534         char pathname[32];
3535
3536         /* check for CAP_SYS_RAWIO */
3537         do_exit += check_for_cap_sys_rawio();
3538
3539         /* test file permissions */
3540         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3541         if (euidaccess(pathname, R_OK)) {
3542                 do_exit++;
3543                 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3544         }
3545
3546         /* if all else fails, thell them to be root */
3547         if (do_exit)
3548                 if (getuid() != 0)
3549                         warnx("... or simply run as root");
3550
3551         if (do_exit)
3552                 exit(-6);
3553 }
3554
3555 /*
3556  * NHM adds support for additional MSRs:
3557  *
3558  * MSR_SMI_COUNT                   0x00000034
3559  *
3560  * MSR_PLATFORM_INFO               0x000000ce
3561  * MSR_PKG_CST_CONFIG_CONTROL     0x000000e2
3562  *
3563  * MSR_MISC_PWR_MGMT               0x000001aa
3564  *
3565  * MSR_PKG_C3_RESIDENCY            0x000003f8
3566  * MSR_PKG_C6_RESIDENCY            0x000003f9
3567  * MSR_CORE_C3_RESIDENCY           0x000003fc
3568  * MSR_CORE_C6_RESIDENCY           0x000003fd
3569  *
3570  * Side effect:
3571  * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
3572  * sets has_misc_feature_control
3573  */
3574 int probe_nhm_msrs(unsigned int family, unsigned int model)
3575 {
3576         unsigned long long msr;
3577         unsigned int base_ratio;
3578         int *pkg_cstate_limits;
3579
3580         if (!genuine_intel)
3581                 return 0;
3582
3583         if (family != 6)
3584                 return 0;
3585
3586         bclk = discover_bclk(family, model);
3587
3588         switch (model) {
3589         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
3590         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3591                 pkg_cstate_limits = nhm_pkg_cstate_limits;
3592                 break;
3593         case INTEL_FAM6_SANDYBRIDGE:    /* SNB */
3594         case INTEL_FAM6_SANDYBRIDGE_X:  /* SNB Xeon */
3595         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3596         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3597                 pkg_cstate_limits = snb_pkg_cstate_limits;
3598                 has_misc_feature_control = 1;
3599                 break;
3600         case INTEL_FAM6_HASWELL:        /* HSW */
3601         case INTEL_FAM6_HASWELL_G:      /* HSW */
3602         case INTEL_FAM6_HASWELL_X:      /* HSX */
3603         case INTEL_FAM6_HASWELL_L:      /* HSW */
3604         case INTEL_FAM6_BROADWELL:      /* BDW */
3605         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3606         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3607         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3608         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3609                 pkg_cstate_limits = hsw_pkg_cstate_limits;
3610                 has_misc_feature_control = 1;
3611                 break;
3612         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3613                 pkg_cstate_limits = skx_pkg_cstate_limits;
3614                 has_misc_feature_control = 1;
3615                 break;
3616         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3617                 no_MSR_MISC_PWR_MGMT = 1;
3618         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
3619                 pkg_cstate_limits = slv_pkg_cstate_limits;
3620                 break;
3621         case INTEL_FAM6_ATOM_AIRMONT:   /* AMT */
3622                 pkg_cstate_limits = amt_pkg_cstate_limits;
3623                 no_MSR_MISC_PWR_MGMT = 1;
3624                 break;
3625         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI */
3626                 pkg_cstate_limits = phi_pkg_cstate_limits;
3627                 break;
3628         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3629         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3630         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
3631         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
3632         case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
3633                 pkg_cstate_limits = glm_pkg_cstate_limits;
3634                 break;
3635         default:
3636                 return 0;
3637         }
3638         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
3639         pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
3640
3641         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
3642         base_ratio = (msr >> 8) & 0xFF;
3643
3644         base_hz = base_ratio * bclk * 1000000;
3645         has_base_hz = 1;
3646         return 1;
3647 }
3648 /*
3649  * SLV client has support for unique MSRs:
3650  *
3651  * MSR_CC6_DEMOTION_POLICY_CONFIG
3652  * MSR_MC6_DEMOTION_POLICY_CONFIG
3653  */
3654
3655 int has_slv_msrs(unsigned int family, unsigned int model)
3656 {
3657         if (!genuine_intel)
3658                 return 0;
3659
3660         switch (model) {
3661         case INTEL_FAM6_ATOM_SILVERMONT:
3662         case INTEL_FAM6_ATOM_SILVERMONT_MID:
3663         case INTEL_FAM6_ATOM_AIRMONT_MID:
3664                 return 1;
3665         }
3666         return 0;
3667 }
3668 int is_dnv(unsigned int family, unsigned int model)
3669 {
3670
3671         if (!genuine_intel)
3672                 return 0;
3673
3674         switch (model) {
3675         case INTEL_FAM6_ATOM_GOLDMONT_D:
3676                 return 1;
3677         }
3678         return 0;
3679 }
3680 int is_bdx(unsigned int family, unsigned int model)
3681 {
3682
3683         if (!genuine_intel)
3684                 return 0;
3685
3686         switch (model) {
3687         case INTEL_FAM6_BROADWELL_X:
3688                 return 1;
3689         }
3690         return 0;
3691 }
3692 int is_skx(unsigned int family, unsigned int model)
3693 {
3694
3695         if (!genuine_intel)
3696                 return 0;
3697
3698         switch (model) {
3699         case INTEL_FAM6_SKYLAKE_X:
3700                 return 1;
3701         }
3702         return 0;
3703 }
3704 int is_ehl(unsigned int family, unsigned int model)
3705 {
3706         if (!genuine_intel)
3707                 return 0;
3708
3709         switch (model) {
3710         case INTEL_FAM6_ATOM_TREMONT:
3711                 return 1;
3712         }
3713         return 0;
3714 }
3715 int is_jvl(unsigned int family, unsigned int model)
3716 {
3717         if (!genuine_intel)
3718                 return 0;
3719
3720         switch (model) {
3721         case INTEL_FAM6_ATOM_TREMONT_D:
3722                 return 1;
3723         }
3724         return 0;
3725 }
3726
3727 int has_turbo_ratio_limit(unsigned int family, unsigned int model)
3728 {
3729         if (has_slv_msrs(family, model))
3730                 return 0;
3731
3732         switch (model) {
3733         /* Nehalem compatible, but do not include turbo-ratio limit support */
3734         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3735         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI - Knights Landing (different MSR definition) */
3736                 return 0;
3737         default:
3738                 return 1;
3739         }
3740 }
3741 int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3742 {
3743         if (has_slv_msrs(family, model))
3744                 return 1;
3745
3746         return 0;
3747 }
3748 int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3749 {
3750         if (!genuine_intel)
3751                 return 0;
3752
3753         if (family != 6)
3754                 return 0;
3755
3756         switch (model) {
3757         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3758         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3759                 return 1;
3760         default:
3761                 return 0;
3762         }
3763 }
3764 int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3765 {
3766         if (!genuine_intel)
3767                 return 0;
3768
3769         if (family != 6)
3770                 return 0;
3771
3772         switch (model) {
3773         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3774                 return 1;
3775         default:
3776                 return 0;
3777         }
3778 }
3779
3780 int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3781 {
3782         if (!genuine_intel)
3783                 return 0;
3784
3785         if (family != 6)
3786                 return 0;
3787
3788         switch (model) {
3789         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3790                 return 1;
3791         default:
3792                 return 0;
3793         }
3794 }
3795 int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3796 {
3797         if (!genuine_intel)
3798                 return 0;
3799
3800         if (family != 6)
3801                 return 0;
3802
3803         switch (model) {
3804         case INTEL_FAM6_ATOM_GOLDMONT:
3805         case INTEL_FAM6_SKYLAKE_X:
3806                 return 1;
3807         default:
3808                 return 0;
3809         }
3810 }
3811 int has_config_tdp(unsigned int family, unsigned int model)
3812 {
3813         if (!genuine_intel)
3814                 return 0;
3815
3816         if (family != 6)
3817                 return 0;
3818
3819         switch (model) {
3820         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3821         case INTEL_FAM6_HASWELL:        /* HSW */
3822         case INTEL_FAM6_HASWELL_X:      /* HSX */
3823         case INTEL_FAM6_HASWELL_L:      /* HSW */
3824         case INTEL_FAM6_HASWELL_G:      /* HSW */
3825         case INTEL_FAM6_BROADWELL:      /* BDW */
3826         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3827         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3828         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3829         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3830         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3831
3832         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3833                 return 1;
3834         default:
3835                 return 0;
3836         }
3837 }
3838
3839 static void
3840 remove_underbar(char *s)
3841 {
3842         char *to = s;
3843
3844         while (*s) {
3845                 if (*s != '_')
3846                         *to++ = *s;
3847                 s++;
3848         }
3849
3850         *to = 0;
3851 }
3852
3853 static void
3854 dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
3855 {
3856         if (!do_nhm_platform_info)
3857                 return;
3858
3859         dump_nhm_platform_info();
3860
3861         if (has_hsw_turbo_ratio_limit(family, model))
3862                 dump_hsw_turbo_ratio_limits();
3863
3864         if (has_ivt_turbo_ratio_limit(family, model))
3865                 dump_ivt_turbo_ratio_limits();
3866
3867         if (has_turbo_ratio_limit(family, model))
3868                 dump_turbo_ratio_limits(family, model);
3869
3870         if (has_atom_turbo_ratio_limit(family, model))
3871                 dump_atom_turbo_ratio_limits();
3872
3873         if (has_knl_turbo_ratio_limit(family, model))
3874                 dump_knl_turbo_ratio_limits();
3875
3876         if (has_config_tdp(family, model))
3877                 dump_config_tdp();
3878
3879         dump_nhm_cst_cfg();
3880 }
3881
3882 static void dump_sysfs_file(char *path)
3883 {
3884         FILE *input;
3885         char cpuidle_buf[64];
3886
3887         input = fopen(path, "r");
3888         if (input == NULL) {
3889                 if (debug)
3890                         fprintf(outf, "NSFOD %s\n", path);
3891                 return;
3892         }
3893         if (!fgets(cpuidle_buf, sizeof(cpuidle_buf), input))
3894                 err(1, "%s: failed to read file", path);
3895         fclose(input);
3896
3897         fprintf(outf, "%s: %s", strrchr(path, '/') + 1, cpuidle_buf);
3898 }
3899 static void
3900 dump_sysfs_cstate_config(void)
3901 {
3902         char path[64];
3903         char name_buf[16];
3904         char desc[64];
3905         FILE *input;
3906         int state;
3907         char *sp;
3908
3909         if (access("/sys/devices/system/cpu/cpuidle", R_OK)) {
3910                 fprintf(outf, "cpuidle not loaded\n");
3911                 return;
3912         }
3913
3914         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_driver");
3915         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor");
3916         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor_ro");
3917
3918         for (state = 0; state < 10; ++state) {
3919
3920                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3921                         base_cpu, state);
3922                 input = fopen(path, "r");
3923                 if (input == NULL)
3924                         continue;
3925                 if (!fgets(name_buf, sizeof(name_buf), input))
3926                         err(1, "%s: failed to read file", path);
3927
3928                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3929                 sp = strchr(name_buf, '-');
3930                 if (!sp)
3931                         sp = strchrnul(name_buf, '\n');
3932                 *sp = '\0';
3933                 fclose(input);
3934
3935                 remove_underbar(name_buf);
3936
3937                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3938                         base_cpu, state);
3939                 input = fopen(path, "r");
3940                 if (input == NULL)
3941                         continue;
3942                 if (!fgets(desc, sizeof(desc), input))
3943                         err(1, "%s: failed to read file", path);
3944
3945                 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3946                 fclose(input);
3947         }
3948 }
3949 static void
3950 dump_sysfs_pstate_config(void)
3951 {
3952         char path[64];
3953         char driver_buf[64];
3954         char governor_buf[64];
3955         FILE *input;
3956         int turbo;
3957
3958         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3959                         base_cpu);
3960         input = fopen(path, "r");
3961         if (input == NULL) {
3962                 fprintf(outf, "NSFOD %s\n", path);
3963                 return;
3964         }
3965         if (!fgets(driver_buf, sizeof(driver_buf), input))
3966                 err(1, "%s: failed to read file", path);
3967         fclose(input);
3968
3969         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3970                         base_cpu);
3971         input = fopen(path, "r");
3972         if (input == NULL) {
3973                 fprintf(outf, "NSFOD %s\n", path);
3974                 return;
3975         }
3976         if (!fgets(governor_buf, sizeof(governor_buf), input))
3977                 err(1, "%s: failed to read file", path);
3978         fclose(input);
3979
3980         fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3981         fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3982
3983         sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3984         input = fopen(path, "r");
3985         if (input != NULL) {
3986                 if (fscanf(input, "%d", &turbo) != 1)
3987                         err(1, "%s: failed to parse number from file", path);
3988                 fprintf(outf, "cpufreq boost: %d\n", turbo);
3989                 fclose(input);
3990         }
3991
3992         sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3993         input = fopen(path, "r");
3994         if (input != NULL) {
3995                 if (fscanf(input, "%d", &turbo) != 1)
3996                         err(1, "%s: failed to parse number from file", path);
3997                 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3998                 fclose(input);
3999         }
4000 }
4001
4002
4003 /*
4004  * print_epb()
4005  * Decode the ENERGY_PERF_BIAS MSR
4006  */
4007 int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4008 {
4009         char *epb_string;
4010         int cpu, epb;
4011
4012         if (!has_epb)
4013                 return 0;
4014
4015         cpu = t->cpu_id;
4016
4017         /* EPB is per-package */
4018         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4019                 return 0;
4020
4021         if (cpu_migrate(cpu)) {
4022                 fprintf(outf, "print_epb: Could not migrate to CPU %d\n", cpu);
4023                 return -1;
4024         }
4025
4026         epb = get_epb(cpu);
4027         if (epb < 0)
4028                 return 0;
4029
4030         switch (epb) {
4031         case ENERGY_PERF_BIAS_PERFORMANCE:
4032                 epb_string = "performance";
4033                 break;
4034         case ENERGY_PERF_BIAS_NORMAL:
4035                 epb_string = "balanced";
4036                 break;
4037         case ENERGY_PERF_BIAS_POWERSAVE:
4038                 epb_string = "powersave";
4039                 break;
4040         default:
4041                 epb_string = "custom";
4042                 break;
4043         }
4044         fprintf(outf, "cpu%d: EPB: %d (%s)\n", cpu, epb, epb_string);
4045
4046         return 0;
4047 }
4048 /*
4049  * print_hwp()
4050  * Decode the MSR_HWP_CAPABILITIES
4051  */
4052 int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4053 {
4054         unsigned long long msr;
4055         int cpu;
4056
4057         if (!has_hwp)
4058                 return 0;
4059
4060         cpu = t->cpu_id;
4061
4062         /* MSR_HWP_CAPABILITIES is per-package */
4063         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4064                 return 0;
4065
4066         if (cpu_migrate(cpu)) {
4067                 fprintf(outf, "print_hwp: Could not migrate to CPU %d\n", cpu);
4068                 return -1;
4069         }
4070
4071         if (get_msr(cpu, MSR_PM_ENABLE, &msr))
4072                 return 0;
4073
4074         fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
4075                 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
4076
4077         /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
4078         if ((msr & (1 << 0)) == 0)
4079                 return 0;
4080
4081         if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
4082                 return 0;
4083
4084         fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
4085                         "(high %d guar %d eff %d low %d)\n",
4086                         cpu, msr,
4087                         (unsigned int)HWP_HIGHEST_PERF(msr),
4088                         (unsigned int)HWP_GUARANTEED_PERF(msr),
4089                         (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
4090                         (unsigned int)HWP_LOWEST_PERF(msr));
4091
4092         if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
4093                 return 0;
4094
4095         fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
4096                         "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
4097                         cpu, msr,
4098                         (unsigned int)(((msr) >> 0) & 0xff),
4099                         (unsigned int)(((msr) >> 8) & 0xff),
4100                         (unsigned int)(((msr) >> 16) & 0xff),
4101                         (unsigned int)(((msr) >> 24) & 0xff),
4102                         (unsigned int)(((msr) >> 32) & 0xff3),
4103                         (unsigned int)(((msr) >> 42) & 0x1));
4104
4105         if (has_hwp_pkg) {
4106                 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
4107                         return 0;
4108
4109                 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
4110                         "(min %d max %d des %d epp 0x%x window 0x%x)\n",
4111                         cpu, msr,
4112                         (unsigned int)(((msr) >> 0) & 0xff),
4113                         (unsigned int)(((msr) >> 8) & 0xff),
4114                         (unsigned int)(((msr) >> 16) & 0xff),
4115                         (unsigned int)(((msr) >> 24) & 0xff),
4116                         (unsigned int)(((msr) >> 32) & 0xff3));
4117         }
4118         if (has_hwp_notify) {
4119                 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
4120                         return 0;
4121
4122                 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
4123                         "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
4124                         cpu, msr,
4125                         ((msr) & 0x1) ? "EN" : "Dis",
4126                         ((msr) & 0x2) ? "EN" : "Dis");
4127         }
4128         if (get_msr(cpu, MSR_HWP_STATUS, &msr))
4129                 return 0;
4130
4131         fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
4132                         "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
4133                         cpu, msr,
4134                         ((msr) & 0x1) ? "" : "No-",
4135                         ((msr) & 0x2) ? "" : "No-");
4136
4137         return 0;
4138 }
4139
4140 /*
4141  * print_perf_limit()
4142  */
4143 int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4144 {
4145         unsigned long long msr;
4146         int cpu;
4147
4148         cpu = t->cpu_id;
4149
4150         /* per-package */
4151         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4152                 return 0;
4153
4154         if (cpu_migrate(cpu)) {
4155                 fprintf(outf, "print_perf_limit: Could not migrate to CPU %d\n", cpu);
4156                 return -1;
4157         }
4158
4159         if (do_core_perf_limit_reasons) {
4160                 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
4161                 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4162                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
4163                         (msr & 1 << 15) ? "bit15, " : "",
4164                         (msr & 1 << 14) ? "bit14, " : "",
4165                         (msr & 1 << 13) ? "Transitions, " : "",
4166                         (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
4167                         (msr & 1 << 11) ? "PkgPwrL2, " : "",
4168                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4169                         (msr & 1 << 9) ? "CorePwr, " : "",
4170                         (msr & 1 << 8) ? "Amps, " : "",
4171                         (msr & 1 << 6) ? "VR-Therm, " : "",
4172                         (msr & 1 << 5) ? "Auto-HWP, " : "",
4173                         (msr & 1 << 4) ? "Graphics, " : "",
4174                         (msr & 1 << 2) ? "bit2, " : "",
4175                         (msr & 1 << 1) ? "ThermStatus, " : "",
4176                         (msr & 1 << 0) ? "PROCHOT, " : "");
4177                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
4178                         (msr & 1 << 31) ? "bit31, " : "",
4179                         (msr & 1 << 30) ? "bit30, " : "",
4180                         (msr & 1 << 29) ? "Transitions, " : "",
4181                         (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
4182                         (msr & 1 << 27) ? "PkgPwrL2, " : "",
4183                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4184                         (msr & 1 << 25) ? "CorePwr, " : "",
4185                         (msr & 1 << 24) ? "Amps, " : "",
4186                         (msr & 1 << 22) ? "VR-Therm, " : "",
4187                         (msr & 1 << 21) ? "Auto-HWP, " : "",
4188                         (msr & 1 << 20) ? "Graphics, " : "",
4189                         (msr & 1 << 18) ? "bit18, " : "",
4190                         (msr & 1 << 17) ? "ThermStatus, " : "",
4191                         (msr & 1 << 16) ? "PROCHOT, " : "");
4192
4193         }
4194         if (do_gfx_perf_limit_reasons) {
4195                 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
4196                 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4197                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
4198                         (msr & 1 << 0) ? "PROCHOT, " : "",
4199                         (msr & 1 << 1) ? "ThermStatus, " : "",
4200                         (msr & 1 << 4) ? "Graphics, " : "",
4201                         (msr & 1 << 6) ? "VR-Therm, " : "",
4202                         (msr & 1 << 8) ? "Amps, " : "",
4203                         (msr & 1 << 9) ? "GFXPwr, " : "",
4204                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4205                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
4206                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
4207                         (msr & 1 << 16) ? "PROCHOT, " : "",
4208                         (msr & 1 << 17) ? "ThermStatus, " : "",
4209                         (msr & 1 << 20) ? "Graphics, " : "",
4210                         (msr & 1 << 22) ? "VR-Therm, " : "",
4211                         (msr & 1 << 24) ? "Amps, " : "",
4212                         (msr & 1 << 25) ? "GFXPwr, " : "",
4213                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4214                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
4215         }
4216         if (do_ring_perf_limit_reasons) {
4217                 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
4218                 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4219                 fprintf(outf, " (Active: %s%s%s%s%s%s)",
4220                         (msr & 1 << 0) ? "PROCHOT, " : "",
4221                         (msr & 1 << 1) ? "ThermStatus, " : "",
4222                         (msr & 1 << 6) ? "VR-Therm, " : "",
4223                         (msr & 1 << 8) ? "Amps, " : "",
4224                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4225                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
4226                 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
4227                         (msr & 1 << 16) ? "PROCHOT, " : "",
4228                         (msr & 1 << 17) ? "ThermStatus, " : "",
4229                         (msr & 1 << 22) ? "VR-Therm, " : "",
4230                         (msr & 1 << 24) ? "Amps, " : "",
4231                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4232                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
4233         }
4234         return 0;
4235 }
4236
4237 #define RAPL_POWER_GRANULARITY  0x7FFF  /* 15 bit power granularity */
4238 #define RAPL_TIME_GRANULARITY   0x3F /* 6 bit time granularity */
4239
4240 double get_tdp_intel(unsigned int model)
4241 {
4242         unsigned long long msr;
4243
4244         if (do_rapl & RAPL_PKG_POWER_INFO)
4245                 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
4246                         return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
4247
4248         switch (model) {
4249         case INTEL_FAM6_ATOM_SILVERMONT:
4250         case INTEL_FAM6_ATOM_SILVERMONT_D:
4251                 return 30.0;
4252         default:
4253                 return 135.0;
4254         }
4255 }
4256
4257 double get_tdp_amd(unsigned int family)
4258 {
4259         /* This is the max stock TDP of HEDT/Server Fam17h+ chips */
4260         return 280.0;
4261 }
4262
4263 /*
4264  * rapl_dram_energy_units_probe()
4265  * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
4266  */
4267 static double
4268 rapl_dram_energy_units_probe(int  model, double rapl_energy_units)
4269 {
4270         /* only called for genuine_intel, family 6 */
4271
4272         switch (model) {
4273         case INTEL_FAM6_HASWELL_X:      /* HSX */
4274         case INTEL_FAM6_BROADWELL_X:    /* BDX */
4275         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4276                 return (rapl_dram_energy_units = 15.3 / 1000000);
4277         default:
4278                 return (rapl_energy_units);
4279         }
4280 }
4281
4282 void rapl_probe_intel(unsigned int family, unsigned int model)
4283 {
4284         unsigned long long msr;
4285         unsigned int time_unit;
4286         double tdp;
4287
4288         if (family != 6)
4289                 return;
4290
4291         switch (model) {
4292         case INTEL_FAM6_SANDYBRIDGE:
4293         case INTEL_FAM6_IVYBRIDGE:
4294         case INTEL_FAM6_HASWELL:        /* HSW */
4295         case INTEL_FAM6_HASWELL_L:      /* HSW */
4296         case INTEL_FAM6_HASWELL_G:      /* HSW */
4297         case INTEL_FAM6_BROADWELL:      /* BDW */
4298         case INTEL_FAM6_BROADWELL_G:    /* BDW */
4299                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
4300                 if (rapl_joules) {
4301                         BIC_PRESENT(BIC_Pkg_J);
4302                         BIC_PRESENT(BIC_Cor_J);
4303                         BIC_PRESENT(BIC_GFX_J);
4304                 } else {
4305                         BIC_PRESENT(BIC_PkgWatt);
4306                         BIC_PRESENT(BIC_CorWatt);
4307                         BIC_PRESENT(BIC_GFXWatt);
4308                 }
4309                 break;
4310         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4311         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4312                 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
4313                 if (rapl_joules)
4314                         BIC_PRESENT(BIC_Pkg_J);
4315                 else
4316                         BIC_PRESENT(BIC_PkgWatt);
4317                 break;
4318         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
4319                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
4320                 if (rapl_joules) {
4321                         BIC_PRESENT(BIC_Pkg_J);
4322                         BIC_PRESENT(BIC_Cor_J);
4323                         BIC_PRESENT(BIC_RAM_J);
4324                         BIC_PRESENT(BIC_GFX_J);
4325                 } else {
4326                         BIC_PRESENT(BIC_PkgWatt);
4327                         BIC_PRESENT(BIC_CorWatt);
4328                         BIC_PRESENT(BIC_RAMWatt);
4329                         BIC_PRESENT(BIC_GFXWatt);
4330                 }
4331                 break;
4332         case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
4333                 do_rapl = RAPL_PKG | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
4334                 BIC_PRESENT(BIC_PKG__);
4335                 if (rapl_joules)
4336                         BIC_PRESENT(BIC_Pkg_J);
4337                 else
4338                         BIC_PRESENT(BIC_PkgWatt);
4339                 break;
4340         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4341         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4342                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
4343                 BIC_PRESENT(BIC_PKG__);
4344                 BIC_PRESENT(BIC_RAM__);
4345                 if (rapl_joules) {
4346                         BIC_PRESENT(BIC_Pkg_J);
4347                         BIC_PRESENT(BIC_Cor_J);
4348                         BIC_PRESENT(BIC_RAM_J);
4349                         BIC_PRESENT(BIC_GFX_J);
4350                 } else {
4351                         BIC_PRESENT(BIC_PkgWatt);
4352                         BIC_PRESENT(BIC_CorWatt);
4353                         BIC_PRESENT(BIC_RAMWatt);
4354                         BIC_PRESENT(BIC_GFXWatt);
4355                 }
4356                 break;
4357         case INTEL_FAM6_HASWELL_X:      /* HSX */
4358         case INTEL_FAM6_BROADWELL_X:    /* BDX */
4359         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
4360         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4361                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
4362                 BIC_PRESENT(BIC_PKG__);
4363                 BIC_PRESENT(BIC_RAM__);
4364                 if (rapl_joules) {
4365                         BIC_PRESENT(BIC_Pkg_J);
4366                         BIC_PRESENT(BIC_RAM_J);
4367                 } else {
4368                         BIC_PRESENT(BIC_PkgWatt);
4369                         BIC_PRESENT(BIC_RAMWatt);
4370                 }
4371                 break;
4372         case INTEL_FAM6_SANDYBRIDGE_X:
4373         case INTEL_FAM6_IVYBRIDGE_X:
4374                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
4375                 BIC_PRESENT(BIC_PKG__);
4376                 BIC_PRESENT(BIC_RAM__);
4377                 if (rapl_joules) {
4378                         BIC_PRESENT(BIC_Pkg_J);
4379                         BIC_PRESENT(BIC_Cor_J);
4380                         BIC_PRESENT(BIC_RAM_J);
4381                 } else {
4382                         BIC_PRESENT(BIC_PkgWatt);
4383                         BIC_PRESENT(BIC_CorWatt);
4384                         BIC_PRESENT(BIC_RAMWatt);
4385                 }
4386                 break;
4387         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4388         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
4389                 do_rapl = RAPL_PKG | RAPL_CORES;
4390                 if (rapl_joules) {
4391                         BIC_PRESENT(BIC_Pkg_J);
4392                         BIC_PRESENT(BIC_Cor_J);
4393                 } else {
4394                         BIC_PRESENT(BIC_PkgWatt);
4395                         BIC_PRESENT(BIC_CorWatt);
4396                 }
4397                 break;
4398         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
4399                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
4400                 BIC_PRESENT(BIC_PKG__);
4401                 BIC_PRESENT(BIC_RAM__);
4402                 if (rapl_joules) {
4403                         BIC_PRESENT(BIC_Pkg_J);
4404                         BIC_PRESENT(BIC_Cor_J);
4405                         BIC_PRESENT(BIC_RAM_J);
4406                 } else {
4407                         BIC_PRESENT(BIC_PkgWatt);
4408                         BIC_PRESENT(BIC_CorWatt);
4409                         BIC_PRESENT(BIC_RAMWatt);
4410                 }
4411                 break;
4412         default:
4413                 return;
4414         }
4415
4416         /* units on package 0, verify later other packages match */
4417         if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
4418                 return;
4419
4420         rapl_power_units = 1.0 / (1 << (msr & 0xF));
4421         if (model == INTEL_FAM6_ATOM_SILVERMONT)
4422                 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
4423         else
4424                 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
4425
4426         rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
4427
4428         time_unit = msr >> 16 & 0xF;
4429         if (time_unit == 0)
4430                 time_unit = 0xA;
4431
4432         rapl_time_units = 1.0 / (1 << (time_unit));
4433
4434         tdp = get_tdp_intel(model);
4435
4436         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4437         if (!quiet)
4438                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4439 }
4440
4441 void rapl_probe_amd(unsigned int family, unsigned int model)
4442 {
4443         unsigned long long msr;
4444         unsigned int eax, ebx, ecx, edx;
4445         unsigned int has_rapl = 0;
4446         double tdp;
4447
4448         if (max_extended_level >= 0x80000007) {
4449                 __cpuid(0x80000007, eax, ebx, ecx, edx);
4450                 /* RAPL (Fam 17h+) */
4451                 has_rapl = edx & (1 << 14);
4452         }
4453
4454         if (!has_rapl || family < 0x17)
4455                 return;
4456
4457         do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
4458         if (rapl_joules) {
4459                 BIC_PRESENT(BIC_Pkg_J);
4460                 BIC_PRESENT(BIC_Cor_J);
4461         } else {
4462                 BIC_PRESENT(BIC_PkgWatt);
4463                 BIC_PRESENT(BIC_CorWatt);
4464         }
4465
4466         if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
4467                 return;
4468
4469         rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4470         rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4471         rapl_power_units = ldexp(1.0, -(msr & 0xf));
4472
4473         tdp = get_tdp_amd(family);
4474
4475         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4476         if (!quiet)
4477                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4478 }
4479
4480 /*
4481  * rapl_probe()
4482  *
4483  * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4484  */
4485 void rapl_probe(unsigned int family, unsigned int model)
4486 {
4487         if (genuine_intel)
4488                 rapl_probe_intel(family, model);
4489         if (authentic_amd || hygon_genuine)
4490                 rapl_probe_amd(family, model);
4491 }
4492
4493 void perf_limit_reasons_probe(unsigned int family, unsigned int model)
4494 {
4495         if (!genuine_intel)
4496                 return;
4497
4498         if (family != 6)
4499                 return;
4500
4501         switch (model) {
4502         case INTEL_FAM6_HASWELL:        /* HSW */
4503         case INTEL_FAM6_HASWELL_L:      /* HSW */
4504         case INTEL_FAM6_HASWELL_G:      /* HSW */
4505                 do_gfx_perf_limit_reasons = 1;
4506         case INTEL_FAM6_HASWELL_X:      /* HSX */
4507                 do_core_perf_limit_reasons = 1;
4508                 do_ring_perf_limit_reasons = 1;
4509         default:
4510                 return;
4511         }
4512 }
4513
4514 void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4515 {
4516         if (is_skx(family, model) || is_bdx(family, model))
4517                 has_automatic_cstate_conversion = 1;
4518 }
4519
4520 int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4521 {
4522         unsigned long long msr;
4523         unsigned int dts, dts2;
4524         int cpu;
4525
4526         if (!(do_dts || do_ptm))
4527                 return 0;
4528
4529         cpu = t->cpu_id;
4530
4531         /* DTS is per-core, no need to print for each thread */
4532         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
4533                 return 0;
4534
4535         if (cpu_migrate(cpu)) {
4536                 fprintf(outf, "print_thermal: Could not migrate to CPU %d\n", cpu);
4537                 return -1;
4538         }
4539
4540         if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4541                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4542                         return 0;
4543
4544                 dts = (msr >> 16) & 0x7F;
4545                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
4546                         cpu, msr, tcc_activation_temp - dts);
4547
4548                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4549                         return 0;
4550
4551                 dts = (msr >> 16) & 0x7F;
4552                 dts2 = (msr >> 8) & 0x7F;
4553                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4554                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4555         }
4556
4557
4558         if (do_dts && debug) {
4559                 unsigned int resolution;
4560
4561                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4562                         return 0;
4563
4564                 dts = (msr >> 16) & 0x7F;
4565                 resolution = (msr >> 27) & 0xF;
4566                 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
4567                         cpu, msr, tcc_activation_temp - dts, resolution);
4568
4569                 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4570                         return 0;
4571
4572                 dts = (msr >> 16) & 0x7F;
4573                 dts2 = (msr >> 8) & 0x7F;
4574                 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4575                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4576         }
4577
4578         return 0;
4579 }
4580
4581 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4582 {
4583         fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
4584                 cpu, label,
4585                 ((msr >> 15) & 1) ? "EN" : "DIS",
4586                 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4587                 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4588                 (((msr >> 16) & 1) ? "EN" : "DIS"));
4589
4590         return;
4591 }
4592
4593 int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4594 {
4595         unsigned long long msr;
4596         const char *msr_name;
4597         int cpu;
4598
4599         if (!do_rapl)
4600                 return 0;
4601
4602         /* RAPL counters are per package, so print only for 1st thread/package */
4603         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4604                 return 0;
4605
4606         cpu = t->cpu_id;
4607         if (cpu_migrate(cpu)) {
4608                 fprintf(outf, "print_rapl: Could not migrate to CPU %d\n", cpu);
4609                 return -1;
4610         }
4611
4612         if (do_rapl & RAPL_AMD_F17H) {
4613                 msr_name = "MSR_RAPL_PWR_UNIT";
4614                 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4615                         return -1;
4616         } else {
4617                 msr_name = "MSR_RAPL_POWER_UNIT";
4618                 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4619                         return -1;
4620         }
4621
4622         fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
4623                 rapl_power_units, rapl_energy_units, rapl_time_units);
4624
4625         if (do_rapl & RAPL_PKG_POWER_INFO) {
4626
4627                 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4628                         return -5;
4629
4630
4631                 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4632                         cpu, msr,
4633                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4634                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4635                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4636                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4637
4638         }
4639         if (do_rapl & RAPL_PKG) {
4640
4641                 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4642                         return -9;
4643
4644                 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
4645                         cpu, msr, (msr >> 63) & 1 ? "" : "UN");
4646
4647                 print_power_limit_msr(cpu, msr, "PKG Limit #1");
4648                 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
4649                         cpu,
4650                         ((msr >> 47) & 1) ? "EN" : "DIS",
4651                         ((msr >> 32) & 0x7FFF) * rapl_power_units,
4652                         (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4653                         ((msr >> 48) & 1) ? "EN" : "DIS");
4654         }
4655
4656         if (do_rapl & RAPL_DRAM_POWER_INFO) {
4657                 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4658                         return -6;
4659
4660                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4661                         cpu, msr,
4662                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4663                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4664                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4665                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4666         }
4667         if (do_rapl & RAPL_DRAM) {
4668                 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4669                         return -9;
4670                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
4671                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4672
4673                 print_power_limit_msr(cpu, msr, "DRAM Limit");
4674         }
4675         if (do_rapl & RAPL_CORE_POLICY) {
4676                 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4677                         return -7;
4678
4679                 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
4680         }
4681         if (do_rapl & RAPL_CORES_POWER_LIMIT) {
4682                 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4683                         return -9;
4684                 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4685                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4686                 print_power_limit_msr(cpu, msr, "Cores Limit");
4687         }
4688         if (do_rapl & RAPL_GFX) {
4689                 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4690                         return -8;
4691
4692                 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
4693
4694                 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4695                         return -9;
4696                 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4697                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4698                 print_power_limit_msr(cpu, msr, "GFX Limit");
4699         }
4700         return 0;
4701 }
4702
4703 /*
4704  * SNB adds support for additional MSRs:
4705  *
4706  * MSR_PKG_C7_RESIDENCY            0x000003fa
4707  * MSR_CORE_C7_RESIDENCY           0x000003fe
4708  * MSR_PKG_C2_RESIDENCY            0x0000060d
4709  */
4710
4711 int has_snb_msrs(unsigned int family, unsigned int model)
4712 {
4713         if (!genuine_intel)
4714                 return 0;
4715
4716         switch (model) {
4717         case INTEL_FAM6_SANDYBRIDGE:
4718         case INTEL_FAM6_SANDYBRIDGE_X:
4719         case INTEL_FAM6_IVYBRIDGE:              /* IVB */
4720         case INTEL_FAM6_IVYBRIDGE_X:            /* IVB Xeon */
4721         case INTEL_FAM6_HASWELL:                /* HSW */
4722         case INTEL_FAM6_HASWELL_X:              /* HSW */
4723         case INTEL_FAM6_HASWELL_L:              /* HSW */
4724         case INTEL_FAM6_HASWELL_G:              /* HSW */
4725         case INTEL_FAM6_BROADWELL:              /* BDW */
4726         case INTEL_FAM6_BROADWELL_G:            /* BDW */
4727         case INTEL_FAM6_BROADWELL_X:            /* BDX */
4728         case INTEL_FAM6_SKYLAKE_L:              /* SKL */
4729         case INTEL_FAM6_CANNONLAKE_L:           /* CNL */
4730         case INTEL_FAM6_SKYLAKE_X:              /* SKX */
4731         case INTEL_FAM6_ATOM_GOLDMONT:          /* BXT */
4732         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4733         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
4734         case INTEL_FAM6_ATOM_TREMONT:           /* EHL */
4735         case INTEL_FAM6_ATOM_TREMONT_D:         /* JVL */
4736                 return 1;
4737         }
4738         return 0;
4739 }
4740
4741 /*
4742  * HSW ULT added support for C8/C9/C10 MSRs:
4743  *
4744  * MSR_PKG_C8_RESIDENCY         0x00000630
4745  * MSR_PKG_C9_RESIDENCY         0x00000631
4746  * MSR_PKG_C10_RESIDENCY        0x00000632
4747  *
4748  * MSR_PKGC8_IRTL               0x00000633
4749  * MSR_PKGC9_IRTL               0x00000634
4750  * MSR_PKGC10_IRTL              0x00000635
4751  *
4752  */
4753 int has_c8910_msrs(unsigned int family, unsigned int model)
4754 {
4755         if (!genuine_intel)
4756                 return 0;
4757
4758         switch (model) {
4759         case INTEL_FAM6_HASWELL_L:      /* HSW */
4760         case INTEL_FAM6_BROADWELL:      /* BDW */
4761         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4762         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4763         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4764         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4765         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
4766                 return 1;
4767         }
4768         return 0;
4769 }
4770
4771 /*
4772  * SKL adds support for additional MSRS:
4773  *
4774  * MSR_PKG_WEIGHTED_CORE_C0_RES    0x00000658
4775  * MSR_PKG_ANY_CORE_C0_RES         0x00000659
4776  * MSR_PKG_ANY_GFXE_C0_RES         0x0000065A
4777  * MSR_PKG_BOTH_CORE_GFXE_C0_RES   0x0000065B
4778  */
4779 int has_skl_msrs(unsigned int family, unsigned int model)
4780 {
4781         if (!genuine_intel)
4782                 return 0;
4783
4784         switch (model) {
4785         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4786         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4787                 return 1;
4788         }
4789         return 0;
4790 }
4791
4792 int is_slm(unsigned int family, unsigned int model)
4793 {
4794         if (!genuine_intel)
4795                 return 0;
4796         switch (model) {
4797         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4798         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
4799                 return 1;
4800         }
4801         return 0;
4802 }
4803
4804 int is_knl(unsigned int family, unsigned int model)
4805 {
4806         if (!genuine_intel)
4807                 return 0;
4808         switch (model) {
4809         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4810                 return 1;
4811         }
4812         return 0;
4813 }
4814
4815 int is_cnl(unsigned int family, unsigned int model)
4816 {
4817         if (!genuine_intel)
4818                 return 0;
4819
4820         switch (model) {
4821         case INTEL_FAM6_CANNONLAKE_L: /* CNL */
4822                 return 1;
4823         }
4824
4825         return 0;
4826 }
4827
4828 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4829 {
4830         if (is_knl(family, model))
4831                 return 1024;
4832         return 1;
4833 }
4834
4835 #define SLM_BCLK_FREQS 5
4836 double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4837
4838 double slm_bclk(void)
4839 {
4840         unsigned long long msr = 3;
4841         unsigned int i;
4842         double freq;
4843
4844         if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
4845                 fprintf(outf, "SLM BCLK: unknown\n");
4846
4847         i = msr & 0xf;
4848         if (i >= SLM_BCLK_FREQS) {
4849                 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
4850                 i = 3;
4851         }
4852         freq = slm_freq_table[i];
4853
4854         if (!quiet)
4855                 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
4856
4857         return freq;
4858 }
4859
4860 double discover_bclk(unsigned int family, unsigned int model)
4861 {
4862         if (has_snb_msrs(family, model) || is_knl(family, model))
4863                 return 100.00;
4864         else if (is_slm(family, model))
4865                 return slm_bclk();
4866         else
4867                 return 133.33;
4868 }
4869
4870 /*
4871  * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4872  * the Thermal Control Circuit (TCC) activates.
4873  * This is usually equal to tjMax.
4874  *
4875  * Older processors do not have this MSR, so there we guess,
4876  * but also allow cmdline over-ride with -T.
4877  *
4878  * Several MSR temperature values are in units of degrees-C
4879  * below this value, including the Digital Thermal Sensor (DTS),
4880  * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4881  */
4882 int read_tcc_activation_temp()
4883 {
4884         unsigned long long msr;
4885         unsigned int tcc, target_c, offset_c;
4886
4887         /* Temperature Target MSR is Nehalem and newer only */
4888         if (!do_nhm_platform_info)
4889                 return 0;
4890
4891         if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
4892                 return 0;
4893
4894         target_c = (msr >> 16) & 0xFF;
4895
4896         offset_c = (msr >> 24) & 0xF;
4897
4898         tcc = target_c - offset_c;
4899
4900         if (!quiet)
4901                 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C) (%d default - %d offset)\n",
4902                         base_cpu, msr, tcc, target_c, offset_c);
4903
4904         return tcc;
4905 }
4906
4907 int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4908 {
4909         /* tcc_activation_temp is used only for dts or ptm */
4910         if (!(do_dts || do_ptm))
4911                 return 0;
4912
4913         /* this is a per-package concept */
4914         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4915                 return 0;
4916
4917         if (tcc_activation_temp_override != 0) {
4918                 tcc_activation_temp = tcc_activation_temp_override;
4919                 fprintf(outf, "Using cmdline TCC Target (%d C)\n", tcc_activation_temp);
4920                 return 0;
4921         }
4922
4923         tcc_activation_temp = read_tcc_activation_temp();
4924         if (tcc_activation_temp)
4925                 return 0;
4926
4927         tcc_activation_temp = TJMAX_DEFAULT;
4928         fprintf(outf, "Guessing tjMax %d C, Please use -T to specify\n", tcc_activation_temp);
4929
4930         return 0;
4931 }
4932
4933 void decode_feature_control_msr(void)
4934 {
4935         unsigned long long msr;
4936
4937         if (!get_msr(base_cpu, MSR_IA32_FEAT_CTL, &msr))
4938                 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4939                         base_cpu, msr,
4940                         msr & FEAT_CTL_LOCKED ? "" : "UN-",
4941                         msr & (1 << 18) ? "SGX" : "");
4942 }
4943
4944 void decode_misc_enable_msr(void)
4945 {
4946         unsigned long long msr;
4947
4948         if (!genuine_intel)
4949                 return;
4950
4951         if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
4952                 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
4953                         base_cpu, msr,
4954                         msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4955                         msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
4956                         msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
4957                         msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4958                         msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
4959 }
4960
4961 void decode_misc_feature_control(void)
4962 {
4963         unsigned long long msr;
4964
4965         if (!has_misc_feature_control)
4966                 return;
4967
4968         if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4969                 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4970                         base_cpu, msr,
4971                         msr & (0 << 0) ? "No-" : "",
4972                         msr & (1 << 0) ? "No-" : "",
4973                         msr & (2 << 0) ? "No-" : "",
4974                         msr & (3 << 0) ? "No-" : "");
4975 }
4976 /*
4977  * Decode MSR_MISC_PWR_MGMT
4978  *
4979  * Decode the bits according to the Nehalem documentation
4980  * bit[0] seems to continue to have same meaning going forward
4981  * bit[1] less so...
4982  */
4983 void decode_misc_pwr_mgmt_msr(void)
4984 {
4985         unsigned long long msr;
4986
4987         if (!do_nhm_platform_info)
4988                 return;
4989
4990         if (no_MSR_MISC_PWR_MGMT)
4991                 return;
4992
4993         if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
4994                 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
4995                         base_cpu, msr,
4996                         msr & (1 << 0) ? "DIS" : "EN",
4997                         msr & (1 << 1) ? "EN" : "DIS",
4998                         msr & (1 << 8) ? "EN" : "DIS");
4999 }
5000 /*
5001  * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
5002  *
5003  * This MSRs are present on Silvermont processors,
5004  * Intel Atom processor E3000 series (Baytrail), and friends.
5005  */
5006 void decode_c6_demotion_policy_msr(void)
5007 {
5008         unsigned long long msr;
5009
5010         if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
5011                 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
5012                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
5013
5014         if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
5015                 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
5016                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
5017 }
5018
5019 /*
5020  * When models are the same, for the purpose of turbostat, reuse
5021  */
5022 unsigned int intel_model_duplicates(unsigned int model)
5023 {
5024
5025         switch(model) {
5026         case INTEL_FAM6_NEHALEM_EP:     /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
5027         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
5028         case 0x1F:      /* Core i7 and i5 Processor - Nehalem */
5029         case INTEL_FAM6_WESTMERE:       /* Westmere Client - Clarkdale, Arrandale */
5030         case INTEL_FAM6_WESTMERE_EP:    /* Westmere EP - Gulftown */
5031                 return INTEL_FAM6_NEHALEM;
5032
5033         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
5034         case INTEL_FAM6_WESTMERE_EX:    /* Westmere-EX Xeon - Eagleton */
5035                 return INTEL_FAM6_NEHALEM_EX;
5036
5037         case INTEL_FAM6_XEON_PHI_KNM:
5038                 return INTEL_FAM6_XEON_PHI_KNL;
5039
5040         case INTEL_FAM6_BROADWELL_X:
5041         case INTEL_FAM6_BROADWELL_D:    /* BDX-DE */
5042                 return INTEL_FAM6_BROADWELL_X;
5043
5044         case INTEL_FAM6_SKYLAKE_L:
5045         case INTEL_FAM6_SKYLAKE:
5046         case INTEL_FAM6_KABYLAKE_L:
5047         case INTEL_FAM6_KABYLAKE:
5048         case INTEL_FAM6_COMETLAKE_L:
5049         case INTEL_FAM6_COMETLAKE:
5050                 return INTEL_FAM6_SKYLAKE_L;
5051
5052         case INTEL_FAM6_ICELAKE_L:
5053         case INTEL_FAM6_ICELAKE_NNPI:
5054         case INTEL_FAM6_TIGERLAKE_L:
5055         case INTEL_FAM6_TIGERLAKE:
5056         case INTEL_FAM6_ROCKETLAKE:
5057         case INTEL_FAM6_LAKEFIELD:
5058         case INTEL_FAM6_ALDERLAKE:
5059                 return INTEL_FAM6_CANNONLAKE_L;
5060
5061         case INTEL_FAM6_ATOM_TREMONT_L:
5062                 return INTEL_FAM6_ATOM_TREMONT;
5063
5064         case INTEL_FAM6_ICELAKE_X:
5065         case INTEL_FAM6_SAPPHIRERAPIDS_X:
5066                 return INTEL_FAM6_SKYLAKE_X;
5067         }
5068         return model;
5069 }
5070
5071 void print_dev_latency(void)
5072 {
5073         char *path = "/dev/cpu_dma_latency";
5074         int fd;
5075         int value;
5076         int retval;
5077
5078         fd = open(path, O_RDONLY);
5079         if (fd < 0) {
5080                 warn("fopen %s\n", path);
5081                 return;
5082         }
5083
5084         retval = read(fd, (void *)&value, sizeof(int));
5085         if (retval != sizeof(int)) {
5086                 warn("read %s\n", path);
5087                 close(fd);
5088                 return;
5089         }
5090         fprintf(outf, "/dev/cpu_dma_latency: %d usec (%s)\n",
5091                 value, value == 2000000000 ? "default" : "constrained");
5092
5093         close(fd);
5094 }
5095
5096
5097 /*
5098  * Linux-perf manages the the HW instructions-retired counter
5099  * by enabling when requested, and hiding rollover
5100  */
5101 void linux_perf_init(void)
5102 {
5103         if (!BIC_IS_ENABLED(BIC_IPC))
5104                 return;
5105
5106         if (access("/proc/sys/kernel/perf_event_paranoid", F_OK))
5107                 return;
5108
5109         fd_instr_count_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5110         if (fd_instr_count_percpu == NULL)
5111                 err(-1, "calloc fd_instr_count_percpu");
5112
5113         BIC_PRESENT(BIC_IPC);
5114 }
5115
5116 void process_cpuid()
5117 {
5118         unsigned int eax, ebx, ecx, edx;
5119         unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
5120         unsigned int has_turbo;
5121         unsigned long long ucode_patch = 0;
5122
5123         eax = ebx = ecx = edx = 0;
5124
5125         __cpuid(0, max_level, ebx, ecx, edx);
5126
5127         if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
5128                 genuine_intel = 1;
5129         else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
5130                 authentic_amd = 1;
5131         else if (ebx == 0x6f677948 && ecx == 0x656e6975 && edx == 0x6e65476e)
5132                 hygon_genuine = 1;
5133
5134         if (!quiet)
5135                 fprintf(outf, "CPUID(0): %.4s%.4s%.4s 0x%x CPUID levels\n",
5136                         (char *)&ebx, (char *)&edx, (char *)&ecx, max_level);
5137
5138         __cpuid(1, fms, ebx, ecx, edx);
5139         family = (fms >> 8) & 0xf;
5140         model = (fms >> 4) & 0xf;
5141         stepping = fms & 0xf;
5142         if (family == 0xf)
5143                 family += (fms >> 20) & 0xff;
5144         if (family >= 6)
5145                 model += ((fms >> 16) & 0xf) << 4;
5146         ecx_flags = ecx;
5147         edx_flags = edx;
5148
5149         if (get_msr(sched_getcpu(), MSR_IA32_UCODE_REV, &ucode_patch))
5150                 warnx("get_msr(UCODE)\n");
5151
5152         /*
5153          * check max extended function levels of CPUID.
5154          * This is needed to check for invariant TSC.
5155          * This check is valid for both Intel and AMD.
5156          */
5157         ebx = ecx = edx = 0;
5158         __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
5159
5160         if (!quiet) {
5161                 fprintf(outf, "CPUID(1): family:model:stepping 0x%x:%x:%x (%d:%d:%d) microcode 0x%x\n",
5162                         family, model, stepping, family, model, stepping, (unsigned int)((ucode_patch >> 32) & 0xFFFFFFFF));
5163                 fprintf(outf, "CPUID(0x80000000): max_extended_levels: 0x%x\n", max_extended_level);
5164                 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
5165                         ecx_flags & (1 << 0) ? "SSE3" : "-",
5166                         ecx_flags & (1 << 3) ? "MONITOR" : "-",
5167                         ecx_flags & (1 << 6) ? "SMX" : "-",
5168                         ecx_flags & (1 << 7) ? "EIST" : "-",
5169                         ecx_flags & (1 << 8) ? "TM2" : "-",
5170                         edx_flags & (1 << 4) ? "TSC" : "-",
5171                         edx_flags & (1 << 5) ? "MSR" : "-",
5172                         edx_flags & (1 << 22) ? "ACPI-TM" : "-",
5173                         edx_flags & (1 << 28) ? "HT" : "-",
5174                         edx_flags & (1 << 29) ? "TM" : "-");
5175         }
5176         if (genuine_intel)
5177                 model = intel_model_duplicates(model);
5178
5179         if (!(edx_flags & (1 << 5)))
5180                 errx(1, "CPUID: no MSR");
5181
5182         if (max_extended_level >= 0x80000007) {
5183
5184                 /*
5185                  * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
5186                  * this check is valid for both Intel and AMD
5187                  */
5188                 __cpuid(0x80000007, eax, ebx, ecx, edx);
5189                 has_invariant_tsc = edx & (1 << 8);
5190         }
5191
5192         /*
5193          * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
5194          * this check is valid for both Intel and AMD
5195          */
5196
5197         __cpuid(0x6, eax, ebx, ecx, edx);
5198         has_aperf = ecx & (1 << 0);
5199         if (has_aperf) {
5200                 BIC_PRESENT(BIC_Avg_MHz);
5201                 BIC_PRESENT(BIC_Busy);
5202                 BIC_PRESENT(BIC_Bzy_MHz);
5203         }
5204         do_dts = eax & (1 << 0);
5205         if (do_dts)
5206                 BIC_PRESENT(BIC_CoreTmp);
5207         has_turbo = eax & (1 << 1);
5208         do_ptm = eax & (1 << 6);
5209         if (do_ptm)
5210                 BIC_PRESENT(BIC_PkgTmp);
5211         has_hwp = eax & (1 << 7);
5212         has_hwp_notify = eax & (1 << 8);
5213         has_hwp_activity_window = eax & (1 << 9);
5214         has_hwp_epp = eax & (1 << 10);
5215         has_hwp_pkg = eax & (1 << 11);
5216         has_epb = ecx & (1 << 3);
5217
5218         if (!quiet)
5219                 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
5220                         "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
5221                         has_aperf ? "" : "No-",
5222                         has_turbo ? "" : "No-",
5223                         do_dts ? "" : "No-",
5224                         do_ptm ? "" : "No-",
5225                         has_hwp ? "" : "No-",
5226                         has_hwp_notify ? "" : "No-",
5227                         has_hwp_activity_window ? "" : "No-",
5228                         has_hwp_epp ? "" : "No-",
5229                         has_hwp_pkg ? "" : "No-",
5230                         has_epb ? "" : "No-");
5231
5232         if (!quiet)
5233                 decode_misc_enable_msr();
5234
5235
5236         if (max_level >= 0x7 && !quiet) {
5237                 int has_sgx;
5238
5239                 ecx = 0;
5240
5241                 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
5242
5243                 has_sgx = ebx & (1 << 2);
5244                 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
5245
5246                 if (has_sgx)
5247                         decode_feature_control_msr();
5248         }
5249
5250         if (max_level >= 0x15) {
5251                 unsigned int eax_crystal;
5252                 unsigned int ebx_tsc;
5253
5254                 /*
5255                  * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
5256                  */
5257                 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
5258                 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
5259
5260                 if (ebx_tsc != 0) {
5261
5262                         if (!quiet && (ebx != 0))
5263                                 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
5264                                         eax_crystal, ebx_tsc, crystal_hz);
5265
5266                         if (crystal_hz == 0)
5267                                 switch(model) {
5268                                 case INTEL_FAM6_SKYLAKE_L:      /* SKL */
5269                                         crystal_hz = 24000000;  /* 24.0 MHz */
5270                                         break;
5271                                 case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
5272                                         crystal_hz = 25000000;  /* 25.0 MHz */
5273                                         break;
5274                                 case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
5275                                 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
5276                                         crystal_hz = 19200000;  /* 19.2 MHz */
5277                                         break;
5278                                 default:
5279                                         crystal_hz = 0;
5280                         }
5281
5282                         if (crystal_hz) {
5283                                 tsc_hz =  (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
5284                                 if (!quiet)
5285                                         fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
5286                                                 tsc_hz / 1000000, crystal_hz, ebx_tsc,  eax_crystal);
5287                         }
5288                 }
5289         }
5290         if (max_level >= 0x16) {
5291                 unsigned int base_mhz, max_mhz, bus_mhz, edx;
5292
5293                 /*
5294                  * CPUID 16H Base MHz, Max MHz, Bus MHz
5295                  */
5296                 base_mhz = max_mhz = bus_mhz = edx = 0;
5297
5298                 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
5299                 if (!quiet)
5300                         fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
5301                                 base_mhz, max_mhz, bus_mhz);
5302         }
5303
5304         if (has_aperf)
5305                 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
5306
5307         BIC_PRESENT(BIC_IRQ);
5308         BIC_PRESENT(BIC_TSC_MHz);
5309
5310         if (probe_nhm_msrs(family, model)) {
5311                 do_nhm_platform_info = 1;
5312                 BIC_PRESENT(BIC_CPU_c1);
5313                 BIC_PRESENT(BIC_CPU_c3);
5314                 BIC_PRESENT(BIC_CPU_c6);
5315                 BIC_PRESENT(BIC_SMI);
5316         }
5317         do_snb_cstates = has_snb_msrs(family, model);
5318
5319         if (do_snb_cstates)
5320                 BIC_PRESENT(BIC_CPU_c7);
5321
5322         do_irtl_snb = has_snb_msrs(family, model);
5323         if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
5324                 BIC_PRESENT(BIC_Pkgpc2);
5325         if (pkg_cstate_limit >= PCL__3)
5326                 BIC_PRESENT(BIC_Pkgpc3);
5327         if (pkg_cstate_limit >= PCL__6)
5328                 BIC_PRESENT(BIC_Pkgpc6);
5329         if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
5330                 BIC_PRESENT(BIC_Pkgpc7);
5331         if (has_slv_msrs(family, model)) {
5332                 BIC_NOT_PRESENT(BIC_Pkgpc2);
5333                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5334                 BIC_PRESENT(BIC_Pkgpc6);
5335                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5336                 BIC_PRESENT(BIC_Mod_c6);
5337                 use_c1_residency_msr = 1;
5338         }
5339         if (is_jvl(family, model)) {
5340                 BIC_NOT_PRESENT(BIC_CPU_c3);
5341                 BIC_NOT_PRESENT(BIC_CPU_c7);
5342                 BIC_NOT_PRESENT(BIC_Pkgpc2);
5343                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5344                 BIC_NOT_PRESENT(BIC_Pkgpc6);
5345                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5346         }
5347         if (is_dnv(family, model)) {
5348                 BIC_PRESENT(BIC_CPU_c1);
5349                 BIC_NOT_PRESENT(BIC_CPU_c3);
5350                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5351                 BIC_NOT_PRESENT(BIC_CPU_c7);
5352                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5353                 use_c1_residency_msr = 1;
5354         }
5355         if (is_skx(family, model)) {
5356                 BIC_NOT_PRESENT(BIC_CPU_c3);
5357                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5358                 BIC_NOT_PRESENT(BIC_CPU_c7);
5359                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5360         }
5361         if (is_bdx(family, model)) {
5362                 BIC_NOT_PRESENT(BIC_CPU_c7);
5363                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5364         }
5365         if (has_c8910_msrs(family, model)) {
5366                 if (pkg_cstate_limit >= PCL__8)
5367                         BIC_PRESENT(BIC_Pkgpc8);
5368                 if (pkg_cstate_limit >= PCL__9)
5369                         BIC_PRESENT(BIC_Pkgpc9);
5370                 if (pkg_cstate_limit >= PCL_10)
5371                         BIC_PRESENT(BIC_Pkgpc10);
5372         }
5373         do_irtl_hsw = has_c8910_msrs(family, model);
5374         if (has_skl_msrs(family, model)) {
5375                 BIC_PRESENT(BIC_Totl_c0);
5376                 BIC_PRESENT(BIC_Any_c0);
5377                 BIC_PRESENT(BIC_GFX_c0);
5378                 BIC_PRESENT(BIC_CPUGFX);
5379         }
5380         do_slm_cstates = is_slm(family, model);
5381         do_knl_cstates  = is_knl(family, model);
5382
5383         if (do_slm_cstates || do_knl_cstates || is_cnl(family, model) ||
5384             is_ehl(family, model))
5385                 BIC_NOT_PRESENT(BIC_CPU_c3);
5386
5387         if (!quiet)
5388                 decode_misc_pwr_mgmt_msr();
5389
5390         if (!quiet && has_slv_msrs(family, model))
5391                 decode_c6_demotion_policy_msr();
5392
5393         rapl_probe(family, model);
5394         perf_limit_reasons_probe(family, model);
5395         automatic_cstate_conversion_probe(family, model);
5396
5397         if (!quiet)
5398                 dump_cstate_pstate_config_info(family, model);
5399
5400         if (!quiet)
5401                 print_dev_latency();
5402         if (!quiet)
5403                 dump_sysfs_cstate_config();
5404         if (!quiet)
5405                 dump_sysfs_pstate_config();
5406
5407         if (has_skl_msrs(family, model))
5408                 calculate_tsc_tweak();
5409
5410         if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
5411                 BIC_PRESENT(BIC_GFX_rc6);
5412
5413         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
5414                 BIC_PRESENT(BIC_GFXMHz);
5415
5416         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", R_OK))
5417                 BIC_PRESENT(BIC_GFXACTMHz);
5418
5419         if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
5420                 BIC_PRESENT(BIC_CPU_LPI);
5421         else
5422                 BIC_NOT_PRESENT(BIC_CPU_LPI);
5423
5424         if (!access(sys_lpi_file_sysfs, R_OK)) {
5425                 sys_lpi_file = sys_lpi_file_sysfs;
5426                 BIC_PRESENT(BIC_SYS_LPI);
5427         } else if (!access(sys_lpi_file_debugfs, R_OK)) {
5428                 sys_lpi_file = sys_lpi_file_debugfs;
5429                 BIC_PRESENT(BIC_SYS_LPI);
5430         } else {
5431                 sys_lpi_file_sysfs = NULL;
5432                 BIC_NOT_PRESENT(BIC_SYS_LPI);
5433         }
5434
5435         if (!quiet)
5436                 decode_misc_feature_control();
5437
5438         return;
5439 }
5440
5441 /*
5442  * in /dev/cpu/ return success for names that are numbers
5443  * ie. filter out ".", "..", "microcode".
5444  */
5445 int dir_filter(const struct dirent *dirp)
5446 {
5447         if (isdigit(dirp->d_name[0]))
5448                 return 1;
5449         else
5450                 return 0;
5451 }
5452
5453 int open_dev_cpu_msr(int dummy1)
5454 {
5455         return 0;
5456 }
5457
5458 void topology_probe()
5459 {
5460         int i;
5461         int max_core_id = 0;
5462         int max_package_id = 0;
5463         int max_die_id = 0;
5464         int max_siblings = 0;
5465
5466         /* Initialize num_cpus, max_cpu_num */
5467         set_max_cpu_num();
5468         topo.num_cpus = 0;
5469         for_all_proc_cpus(count_cpus);
5470         if (!summary_only && topo.num_cpus > 1)
5471                 BIC_PRESENT(BIC_CPU);
5472
5473         if (debug > 1)
5474                 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
5475
5476         cpus = calloc(1, (topo.max_cpu_num  + 1) * sizeof(struct cpu_topology));
5477         if (cpus == NULL)
5478                 err(1, "calloc cpus");
5479
5480         /*
5481          * Allocate and initialize cpu_present_set
5482          */
5483         cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
5484         if (cpu_present_set == NULL)
5485                 err(3, "CPU_ALLOC");
5486         cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5487         CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
5488         for_all_proc_cpus(mark_cpu_present);
5489
5490         /*
5491          * Validate that all cpus in cpu_subset are also in cpu_present_set
5492          */
5493         for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
5494                 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
5495                         if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
5496                                 err(1, "cpu%d not present", i);
5497         }
5498
5499         /*
5500          * Allocate and initialize cpu_affinity_set
5501          */
5502         cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
5503         if (cpu_affinity_set == NULL)
5504                 err(3, "CPU_ALLOC");
5505         cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5506         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
5507
5508         for_all_proc_cpus(init_thread_id);
5509
5510         /*
5511          * For online cpus
5512          * find max_core_id, max_package_id
5513          */
5514         for (i = 0; i <= topo.max_cpu_num; ++i) {
5515                 int siblings;
5516
5517                 if (cpu_is_not_present(i)) {
5518                         if (debug > 1)
5519                                 fprintf(outf, "cpu%d NOT PRESENT\n", i);
5520                         continue;
5521                 }
5522
5523                 cpus[i].logical_cpu_id = i;
5524
5525                 /* get package information */
5526                 cpus[i].physical_package_id = get_physical_package_id(i);
5527                 if (cpus[i].physical_package_id > max_package_id)
5528                         max_package_id = cpus[i].physical_package_id;
5529
5530                 /* get die information */
5531                 cpus[i].die_id = get_die_id(i);
5532                 if (cpus[i].die_id > max_die_id)
5533                         max_die_id = cpus[i].die_id;
5534
5535                 /* get numa node information */
5536                 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
5537                 if (cpus[i].physical_node_id > topo.max_node_num)
5538                         topo.max_node_num = cpus[i].physical_node_id;
5539
5540                 /* get core information */
5541                 cpus[i].physical_core_id = get_core_id(i);
5542                 if (cpus[i].physical_core_id > max_core_id)
5543                         max_core_id = cpus[i].physical_core_id;
5544
5545                 /* get thread information */
5546                 siblings = get_thread_siblings(&cpus[i]);
5547                 if (siblings > max_siblings)
5548                         max_siblings = siblings;
5549                 if (cpus[i].thread_id == 0)
5550                         topo.num_cores++;
5551         }
5552
5553         topo.cores_per_node = max_core_id + 1;
5554         if (debug > 1)
5555                 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
5556                         max_core_id, topo.cores_per_node);
5557         if (!summary_only && topo.cores_per_node > 1)
5558                 BIC_PRESENT(BIC_Core);
5559
5560         topo.num_die = max_die_id + 1;
5561         if (debug > 1)
5562                 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5563                                 max_die_id, topo.num_die);
5564         if (!summary_only && topo.num_die > 1)
5565                 BIC_PRESENT(BIC_Die);
5566
5567         topo.num_packages = max_package_id + 1;
5568         if (debug > 1)
5569                 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
5570                         max_package_id, topo.num_packages);
5571         if (!summary_only && topo.num_packages > 1)
5572                 BIC_PRESENT(BIC_Package);
5573
5574         set_node_data();
5575         if (debug > 1)
5576                 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
5577         if (!summary_only && topo.nodes_per_pkg > 1)
5578                 BIC_PRESENT(BIC_Node);
5579
5580         topo.threads_per_core = max_siblings;
5581         if (debug > 1)
5582                 fprintf(outf, "max_siblings %d\n", max_siblings);
5583
5584         if (debug < 1)
5585                 return;
5586
5587         for (i = 0; i <= topo.max_cpu_num; ++i) {
5588                 if (cpu_is_not_present(i))
5589                         continue;
5590                 fprintf(outf,
5591                         "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5592                         i, cpus[i].physical_package_id, cpus[i].die_id,
5593                         cpus[i].physical_node_id,
5594                         cpus[i].logical_node_id,
5595                         cpus[i].physical_core_id,
5596                         cpus[i].thread_id);
5597         }
5598
5599 }
5600
5601 void
5602 allocate_counters(struct thread_data **t, struct core_data **c,
5603                   struct pkg_data **p)
5604 {
5605         int i;
5606         int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5607                         topo.num_packages;
5608         int num_threads = topo.threads_per_core * num_cores;
5609
5610         *t = calloc(num_threads, sizeof(struct thread_data));
5611         if (*t == NULL)
5612                 goto error;
5613
5614         for (i = 0; i < num_threads; i++)
5615                 (*t)[i].cpu_id = -1;
5616
5617         *c = calloc(num_cores, sizeof(struct core_data));
5618         if (*c == NULL)
5619                 goto error;
5620
5621         for (i = 0; i < num_cores; i++)
5622                 (*c)[i].core_id = -1;
5623
5624         *p = calloc(topo.num_packages, sizeof(struct pkg_data));
5625         if (*p == NULL)
5626                 goto error;
5627
5628         for (i = 0; i < topo.num_packages; i++)
5629                 (*p)[i].package_id = i;
5630
5631         return;
5632 error:
5633         err(1, "calloc counters");
5634 }
5635 /*
5636  * init_counter()
5637  *
5638  * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
5639  */
5640 void init_counter(struct thread_data *thread_base, struct core_data *core_base,
5641         struct pkg_data *pkg_base, int cpu_id)
5642 {
5643         int pkg_id = cpus[cpu_id].physical_package_id;
5644         int node_id = cpus[cpu_id].logical_node_id;
5645         int core_id = cpus[cpu_id].physical_core_id;
5646         int thread_id = cpus[cpu_id].thread_id;
5647         struct thread_data *t;
5648         struct core_data *c;
5649         struct pkg_data *p;
5650
5651
5652         /* Workaround for systems where physical_node_id==-1
5653          * and logical_node_id==(-1 - topo.num_cpus)
5654          */
5655         if (node_id < 0)
5656                 node_id = 0;
5657
5658         t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5659         c = GET_CORE(core_base, core_id, node_id, pkg_id);
5660         p = GET_PKG(pkg_base, pkg_id);
5661
5662         t->cpu_id = cpu_id;
5663         if (thread_id == 0) {
5664                 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5665                 if (cpu_is_first_core_in_package(cpu_id))
5666                         t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5667         }
5668
5669         c->core_id = core_id;
5670         p->package_id = pkg_id;
5671 }
5672
5673
5674 int initialize_counters(int cpu_id)
5675 {
5676         init_counter(EVEN_COUNTERS, cpu_id);
5677         init_counter(ODD_COUNTERS, cpu_id);
5678         return 0;
5679 }
5680
5681 void allocate_output_buffer()
5682 {
5683         output_buffer = calloc(1, (1 + topo.num_cpus) * 2048);
5684         outp = output_buffer;
5685         if (outp == NULL)
5686                 err(-1, "calloc output buffer");
5687 }
5688 void allocate_fd_percpu(void)
5689 {
5690         fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5691         if (fd_percpu == NULL)
5692                 err(-1, "calloc fd_percpu");
5693 }
5694 void allocate_irq_buffers(void)
5695 {
5696         irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5697         if (irq_column_2_cpu == NULL)
5698                 err(-1, "calloc %d", topo.num_cpus);
5699
5700         irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5701         if (irqs_per_cpu == NULL)
5702                 err(-1, "calloc %d", topo.max_cpu_num + 1);
5703 }
5704 void setup_all_buffers(void)
5705 {
5706         topology_probe();
5707         allocate_irq_buffers();
5708         allocate_fd_percpu();
5709         allocate_counters(&thread_even, &core_even, &package_even);
5710         allocate_counters(&thread_odd, &core_odd, &package_odd);
5711         allocate_output_buffer();
5712         for_all_proc_cpus(initialize_counters);
5713 }
5714
5715 void set_base_cpu(void)
5716 {
5717         base_cpu = sched_getcpu();
5718         if (base_cpu < 0)
5719                 err(-ENODEV, "No valid cpus found");
5720
5721         if (debug > 1)
5722                 fprintf(outf, "base_cpu = %d\n", base_cpu);
5723 }
5724
5725 void turbostat_init()
5726 {
5727         setup_all_buffers();
5728         set_base_cpu();
5729         check_dev_msr();
5730         check_permissions();
5731         process_cpuid();
5732         linux_perf_init();
5733
5734
5735         if (!quiet)
5736                 for_all_cpus(print_hwp, ODD_COUNTERS);
5737
5738         if (!quiet)
5739                 for_all_cpus(print_epb, ODD_COUNTERS);
5740
5741         if (!quiet)
5742                 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5743
5744         if (!quiet)
5745                 for_all_cpus(print_rapl, ODD_COUNTERS);
5746
5747         for_all_cpus(set_temperature_target, ODD_COUNTERS);
5748
5749         if (!quiet)
5750                 for_all_cpus(print_thermal, ODD_COUNTERS);
5751
5752         if (!quiet && do_irtl_snb)
5753                 print_irtl();
5754 }
5755
5756 int fork_it(char **argv)
5757 {
5758         pid_t child_pid;
5759         int status;
5760
5761         snapshot_proc_sysfs_files();
5762         status = for_all_cpus(get_counters, EVEN_COUNTERS);
5763         first_counter_read = 0;
5764         if (status)
5765                 exit(status);
5766         /* clear affinity side-effect of get_counters() */
5767         sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
5768         gettimeofday(&tv_even, (struct timezone *)NULL);
5769
5770         child_pid = fork();
5771         if (!child_pid) {
5772                 /* child */
5773                 execvp(argv[0], argv);
5774                 err(errno, "exec %s", argv[0]);
5775         } else {
5776
5777                 /* parent */
5778                 if (child_pid == -1)
5779                         err(1, "fork");
5780
5781                 signal(SIGINT, SIG_IGN);
5782                 signal(SIGQUIT, SIG_IGN);
5783                 if (waitpid(child_pid, &status, 0) == -1)
5784                         err(status, "waitpid");
5785
5786                 if (WIFEXITED(status))
5787                         status = WEXITSTATUS(status);
5788         }
5789         /*
5790          * n.b. fork_it() does not check for errors from for_all_cpus()
5791          * because re-starting is problematic when forking
5792          */
5793         snapshot_proc_sysfs_files();
5794         for_all_cpus(get_counters, ODD_COUNTERS);
5795         gettimeofday(&tv_odd, (struct timezone *)NULL);
5796         timersub(&tv_odd, &tv_even, &tv_delta);
5797         if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5798                 fprintf(outf, "%s: Counter reset detected\n", progname);
5799         else {
5800                 compute_average(EVEN_COUNTERS);
5801                 format_all_counters(EVEN_COUNTERS);
5802         }
5803
5804         fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5805
5806         flush_output_stderr();
5807
5808         return status;
5809 }
5810
5811 int get_and_dump_counters(void)
5812 {
5813         int status;
5814
5815         snapshot_proc_sysfs_files();
5816         status = for_all_cpus(get_counters, ODD_COUNTERS);
5817         if (status)
5818                 return status;
5819
5820         status = for_all_cpus(dump_counters, ODD_COUNTERS);
5821         if (status)
5822                 return status;
5823
5824         flush_output_stdout();
5825
5826         return status;
5827 }
5828
5829 void print_version() {
5830         fprintf(outf, "turbostat version 20.09.30"
5831                 " - Len Brown <lenb@kernel.org>\n");
5832 }
5833
5834 int add_counter(unsigned int msr_num, char *path, char *name,
5835         unsigned int width, enum counter_scope scope,
5836         enum counter_type type, enum counter_format format, int flags)
5837 {
5838         struct msr_counter *msrp;
5839
5840         msrp = calloc(1, sizeof(struct msr_counter));
5841         if (msrp == NULL) {
5842                 perror("calloc");
5843                 exit(1);
5844         }
5845
5846         msrp->msr_num = msr_num;
5847         strncpy(msrp->name, name, NAME_BYTES - 1);
5848         if (path)
5849                 strncpy(msrp->path, path, PATH_BYTES - 1);
5850         msrp->width = width;
5851         msrp->type = type;
5852         msrp->format = format;
5853         msrp->flags = flags;
5854
5855         switch (scope) {
5856
5857         case SCOPE_CPU:
5858                 msrp->next = sys.tp;
5859                 sys.tp = msrp;
5860                 sys.added_thread_counters++;
5861                 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
5862                         fprintf(stderr, "exceeded max %d added thread counters\n",
5863                                 MAX_ADDED_COUNTERS);
5864                         exit(-1);
5865                 }
5866                 break;
5867
5868         case SCOPE_CORE:
5869                 msrp->next = sys.cp;
5870                 sys.cp = msrp;
5871                 sys.added_core_counters++;
5872                 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5873                         fprintf(stderr, "exceeded max %d added core counters\n",
5874                                 MAX_ADDED_COUNTERS);
5875                         exit(-1);
5876                 }
5877                 break;
5878
5879         case SCOPE_PACKAGE:
5880                 msrp->next = sys.pp;
5881                 sys.pp = msrp;
5882                 sys.added_package_counters++;
5883                 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5884                         fprintf(stderr, "exceeded max %d added package counters\n",
5885                                 MAX_ADDED_COUNTERS);
5886                         exit(-1);
5887                 }
5888                 break;
5889         }
5890
5891         return 0;
5892 }
5893
5894 void parse_add_command(char *add_command)
5895 {
5896         int msr_num = 0;
5897         char *path = NULL;
5898         char name_buffer[NAME_BYTES] = "";
5899         int width = 64;
5900         int fail = 0;
5901         enum counter_scope scope = SCOPE_CPU;
5902         enum counter_type type = COUNTER_CYCLES;
5903         enum counter_format format = FORMAT_DELTA;
5904
5905         while (add_command) {
5906
5907                 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5908                         goto next;
5909
5910                 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5911                         goto next;
5912
5913                 if (*add_command == '/') {
5914                         path = add_command;
5915                         goto next;
5916                 }
5917
5918                 if (sscanf(add_command, "u%d", &width) == 1) {
5919                         if ((width == 32) || (width == 64))
5920                                 goto next;
5921                         width = 64;
5922                 }
5923                 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5924                         scope = SCOPE_CPU;
5925                         goto next;
5926                 }
5927                 if (!strncmp(add_command, "core", strlen("core"))) {
5928                         scope = SCOPE_CORE;
5929                         goto next;
5930                 }
5931                 if (!strncmp(add_command, "package", strlen("package"))) {
5932                         scope = SCOPE_PACKAGE;
5933                         goto next;
5934                 }
5935                 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5936                         type = COUNTER_CYCLES;
5937                         goto next;
5938                 }
5939                 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5940                         type = COUNTER_SECONDS;
5941                         goto next;
5942                 }
5943                 if (!strncmp(add_command, "usec", strlen("usec"))) {
5944                         type = COUNTER_USEC;
5945                         goto next;
5946                 }
5947                 if (!strncmp(add_command, "raw", strlen("raw"))) {
5948                         format = FORMAT_RAW;
5949                         goto next;
5950                 }
5951                 if (!strncmp(add_command, "delta", strlen("delta"))) {
5952                         format = FORMAT_DELTA;
5953                         goto next;
5954                 }
5955                 if (!strncmp(add_command, "percent", strlen("percent"))) {
5956                         format = FORMAT_PERCENT;
5957                         goto next;
5958                 }
5959
5960                 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) {        /* 18 < NAME_BYTES */
5961                         char *eos;
5962
5963                         eos = strchr(name_buffer, ',');
5964                         if (eos)
5965                                 *eos = '\0';
5966                         goto next;
5967                 }
5968
5969 next:
5970                 add_command = strchr(add_command, ',');
5971                 if (add_command) {
5972                         *add_command = '\0';
5973                         add_command++;
5974                 }
5975
5976         }
5977         if ((msr_num == 0) && (path == NULL)) {
5978                 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
5979                 fail++;
5980         }
5981
5982         /* generate default column header */
5983         if (*name_buffer == '\0') {
5984                 if (width == 32)
5985                         sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5986                 else
5987                         sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5988         }
5989
5990         if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
5991                 fail++;
5992
5993         if (fail) {
5994                 help();
5995                 exit(1);
5996         }
5997 }
5998
5999 int is_deferred_skip(char *name)
6000 {
6001         int i;
6002
6003         for (i = 0; i < deferred_skip_index; ++i)
6004                 if (!strcmp(name, deferred_skip_names[i]))
6005                         return 1;
6006         return 0;
6007 }
6008
6009 void probe_sysfs(void)
6010 {
6011         char path[64];
6012         char name_buf[16];
6013         FILE *input;
6014         int state;
6015         char *sp;
6016
6017         if (!DO_BIC(BIC_sysfs))
6018                 return;
6019
6020         for (state = 10; state >= 0; --state) {
6021
6022                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
6023                         base_cpu, state);
6024                 input = fopen(path, "r");
6025                 if (input == NULL)
6026                         continue;
6027                 if (!fgets(name_buf, sizeof(name_buf), input))
6028                         err(1, "%s: failed to read file", path);
6029
6030                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
6031                 sp = strchr(name_buf, '-');
6032                 if (!sp)
6033                         sp = strchrnul(name_buf, '\n');
6034                 *sp = '%';
6035                 *(sp + 1) = '\0';
6036
6037                 remove_underbar(name_buf);
6038
6039                 fclose(input);
6040
6041                 sprintf(path, "cpuidle/state%d/time", state);
6042
6043                 if (is_deferred_skip(name_buf))
6044                         continue;
6045
6046                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
6047                                 FORMAT_PERCENT, SYSFS_PERCPU);
6048         }
6049
6050         for (state = 10; state >= 0; --state) {
6051
6052                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
6053                         base_cpu, state);
6054                 input = fopen(path, "r");
6055                 if (input == NULL)
6056                         continue;
6057                 if (!fgets(name_buf, sizeof(name_buf), input))
6058                         err(1, "%s: failed to read file", path);
6059                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
6060                 sp = strchr(name_buf, '-');
6061                 if (!sp)
6062                         sp = strchrnul(name_buf, '\n');
6063                 *sp = '\0';
6064                 fclose(input);
6065
6066                 remove_underbar(name_buf);
6067
6068                 sprintf(path, "cpuidle/state%d/usage", state);
6069
6070                 if (is_deferred_skip(name_buf))
6071                         continue;
6072
6073                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
6074                                 FORMAT_DELTA, SYSFS_PERCPU);
6075         }
6076
6077 }
6078
6079
6080 /*
6081  * parse cpuset with following syntax
6082  * 1,2,4..6,8-10 and set bits in cpu_subset
6083  */
6084 void parse_cpu_command(char *optarg)
6085 {
6086         unsigned int start, end;
6087         char *next;
6088
6089         if (!strcmp(optarg, "core")) {
6090                 if (cpu_subset)
6091                         goto error;
6092                 show_core_only++;
6093                 return;
6094         }
6095         if (!strcmp(optarg, "package")) {
6096                 if (cpu_subset)
6097                         goto error;
6098                 show_pkg_only++;
6099                 return;
6100         }
6101         if (show_core_only || show_pkg_only)
6102                 goto error;
6103
6104         cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
6105         if (cpu_subset == NULL)
6106                 err(3, "CPU_ALLOC");
6107         cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
6108
6109         CPU_ZERO_S(cpu_subset_size, cpu_subset);
6110
6111         next = optarg;
6112
6113         while (next && *next) {
6114
6115                 if (*next == '-')       /* no negative cpu numbers */
6116                         goto error;
6117
6118                 start = strtoul(next, &next, 10);
6119
6120                 if (start >= CPU_SUBSET_MAXCPUS)
6121                         goto error;
6122                 CPU_SET_S(start, cpu_subset_size, cpu_subset);
6123
6124                 if (*next == '\0')
6125                         break;
6126
6127                 if (*next == ',') {
6128                         next += 1;
6129                         continue;
6130                 }
6131
6132                 if (*next == '-') {
6133                         next += 1;      /* start range */
6134                 } else if (*next == '.') {
6135                         next += 1;
6136                         if (*next == '.')
6137                                 next += 1;      /* start range */
6138                         else
6139                                 goto error;
6140                 }
6141
6142                 end = strtoul(next, &next, 10);
6143                 if (end <= start)
6144                         goto error;
6145
6146                 while (++start <= end) {
6147                         if (start >= CPU_SUBSET_MAXCPUS)
6148                                 goto error;
6149                         CPU_SET_S(start, cpu_subset_size, cpu_subset);
6150                 }
6151
6152                 if (*next == ',')
6153                         next += 1;
6154                 else if (*next != '\0')
6155                         goto error;
6156         }
6157
6158         return;
6159
6160 error:
6161         fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
6162         help();
6163         exit(-1);
6164 }
6165
6166
6167 void cmdline(int argc, char **argv)
6168 {
6169         int opt;
6170         int option_index = 0;
6171         static struct option long_options[] = {
6172                 {"add",         required_argument,      0, 'a'},
6173                 {"cpu",         required_argument,      0, 'c'},
6174                 {"Dump",        no_argument,            0, 'D'},
6175                 {"debug",       no_argument,            0, 'd'},        /* internal, not documented */
6176                 {"enable",      required_argument,      0, 'e'},
6177                 {"interval",    required_argument,      0, 'i'},
6178                 {"IPC", no_argument,                    0, 'I'},
6179                 {"num_iterations",      required_argument,      0, 'n'},
6180                 {"help",        no_argument,            0, 'h'},
6181                 {"hide",        required_argument,      0, 'H'},        // meh, -h taken by --help
6182                 {"Joules",      no_argument,            0, 'J'},
6183                 {"list",        no_argument,            0, 'l'},
6184                 {"out",         required_argument,      0, 'o'},
6185                 {"quiet",       no_argument,            0, 'q'},
6186                 {"show",        required_argument,      0, 's'},
6187                 {"Summary",     no_argument,            0, 'S'},
6188                 {"TCC",         required_argument,      0, 'T'},
6189                 {"version",     no_argument,            0, 'v' },
6190                 {0,             0,                      0,  0 }
6191         };
6192
6193         progname = argv[0];
6194
6195         while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
6196                                 long_options, &option_index)) != -1) {
6197                 switch (opt) {
6198                 case 'a':
6199                         parse_add_command(optarg);
6200                         break;
6201                 case 'c':
6202                         parse_cpu_command(optarg);
6203                         break;
6204                 case 'D':
6205                         dump_only++;
6206                         break;
6207                 case 'e':
6208                         /* --enable specified counter */
6209                         bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
6210                         break;
6211                 case 'd':
6212                         debug++;
6213                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
6214                         break;
6215                 case 'H':
6216                         /*
6217                          * --hide: do not show those specified
6218                          *  multiple invocations simply clear more bits in enabled mask
6219                          */
6220                         bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
6221                         break;
6222                 case 'h':
6223                 default:
6224                         help();
6225                         exit(1);
6226                 case 'i':
6227                         {
6228                                 double interval = strtod(optarg, NULL);
6229
6230                                 if (interval < 0.001) {
6231                                         fprintf(outf, "interval %f seconds is too small\n",
6232                                                 interval);
6233                                         exit(2);
6234                                 }
6235
6236                                 interval_tv.tv_sec = interval_ts.tv_sec = interval;
6237                                 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
6238                                 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
6239                         }
6240                         break;
6241                 case 'J':
6242                         rapl_joules++;
6243                         break;
6244                 case 'l':
6245                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
6246                         list_header_only++;
6247                         quiet++;
6248                         break;
6249                 case 'o':
6250                         outf = fopen_or_die(optarg, "w");
6251                         break;
6252                 case 'q':
6253                         quiet = 1;
6254                         break;
6255                 case 'n':
6256                         num_iterations = strtod(optarg, NULL);
6257
6258                         if (num_iterations <= 0) {
6259                                 fprintf(outf, "iterations %d should be positive number\n",
6260                                         num_iterations);
6261                                 exit(2);
6262                         }
6263                         break;
6264                 case 's':
6265                         /*
6266                          * --show: show only those specified
6267                          *  The 1st invocation will clear and replace the enabled mask
6268                          *  subsequent invocations can add to it.
6269                          */
6270                         if (shown == 0)
6271                                 bic_enabled = bic_lookup(optarg, SHOW_LIST);
6272                         else
6273                                 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
6274                         shown = 1;
6275                         break;
6276                 case 'S':
6277                         summary_only++;
6278                         break;
6279                 case 'T':
6280                         tcc_activation_temp_override = atoi(optarg);
6281                         break;
6282                 case 'v':
6283                         print_version();
6284                         exit(0);
6285                         break;
6286                 }
6287         }
6288 }
6289
6290 int main(int argc, char **argv)
6291 {
6292         outf = stderr;
6293         cmdline(argc, argv);
6294
6295         if (!quiet)
6296                 print_version();
6297
6298         probe_sysfs();
6299
6300         turbostat_init();
6301
6302         /* dump counters and exit */
6303         if (dump_only)
6304                 return get_and_dump_counters();
6305
6306         /* list header and exit */
6307         if (list_header_only) {
6308                 print_header(",");
6309                 flush_output_stdout();
6310                 return 0;
6311         }
6312
6313         msr_sum_record();
6314         /*
6315          * if any params left, it must be a command to fork
6316          */
6317         if (argc - optind)
6318                 return fork_it(argv + optind);
6319         else
6320                 turbostat_loop();
6321
6322         return 0;
6323 }