1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/kernel.h>
11 #include "map_symbol.h"
12 #include "mem-events.h"
18 unsigned int perf_mem_events__loads_ldlat = 30;
20 #define E(t, n, s, l, a) { .tag = t, .name = n, .event_name = s, .ldlat = l, .aux_event = a }
22 struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = {
23 E("ldlat-loads", "%s/mem-loads,ldlat=%u/P", "mem-loads", true, 0),
24 E("ldlat-stores", "%s/mem-stores/P", "mem-stores", false, 0),
25 E(NULL, NULL, NULL, false, 0),
29 static char mem_loads_name[100];
30 static char mem_stores_name[100];
32 struct perf_mem_event *perf_pmu__mem_events_ptr(struct perf_pmu *pmu, int i)
34 if (i >= PERF_MEM_EVENTS__MAX || !pmu)
37 return &pmu->mem_events[i];
40 static struct perf_pmu *perf_pmus__scan_mem(struct perf_pmu *pmu)
42 while ((pmu = perf_pmus__scan(pmu)) != NULL) {
49 struct perf_pmu *perf_mem_events_find_pmu(void)
52 * The current perf mem doesn't support per-PMU configuration.
53 * The exact same configuration is applied to all the
54 * mem_events supported PMUs.
55 * Return the first mem_events supported PMU.
57 * Notes: The only case which may support multiple mem_events
58 * supported PMUs is Intel hybrid. The exact same mem_events
59 * is shared among the PMUs. Only configure the first PMU
60 * is good enough as well.
62 return perf_pmus__scan_mem(NULL);
66 * perf_pmu__mem_events_num_mem_pmus - Get the number of mem PMUs since the given pmu
67 * @pmu: Start pmu. If it's NULL, search the entire PMU list.
69 int perf_pmu__mem_events_num_mem_pmus(struct perf_pmu *pmu)
73 while ((pmu = perf_pmus__scan_mem(pmu)) != NULL)
79 static const char *perf_pmu__mem_events_name(int i, struct perf_pmu *pmu)
81 struct perf_mem_event *e;
83 if (i >= PERF_MEM_EVENTS__MAX || !pmu)
86 e = &pmu->mem_events[i];
90 if (i == PERF_MEM_EVENTS__LOAD || i == PERF_MEM_EVENTS__LOAD_STORE) {
93 /* ARM and Most of Intel */
94 scnprintf(mem_loads_name, sizeof(mem_loads_name),
96 perf_mem_events__loads_ldlat);
98 /* Intel with mem-loads-aux event */
99 scnprintf(mem_loads_name, sizeof(mem_loads_name),
100 e->name, pmu->name, pmu->name,
101 perf_mem_events__loads_ldlat);
106 scnprintf(mem_loads_name, sizeof(mem_loads_name),
112 return mem_loads_name;
115 if (i == PERF_MEM_EVENTS__STORE) {
116 scnprintf(mem_stores_name, sizeof(mem_stores_name),
118 return mem_stores_name;
124 bool is_mem_loads_aux_event(struct evsel *leader)
126 struct perf_pmu *pmu = leader->pmu;
127 struct perf_mem_event *e;
129 if (!pmu || !pmu->mem_events)
132 e = &pmu->mem_events[PERF_MEM_EVENTS__LOAD];
136 return leader->core.attr.config == e->aux_event;
139 int perf_pmu__mem_events_parse(struct perf_pmu *pmu, const char *str)
141 char *tok, *saveptr = NULL;
146 /* We need buffer that we know we can write to. */
147 buf = malloc(strlen(str) + 1);
153 tok = strtok_r((char *)buf, ",", &saveptr);
156 for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
157 struct perf_mem_event *e = perf_pmu__mem_events_ptr(pmu, j);
162 if (strstr(e->tag, tok))
163 e->record = found = true;
166 tok = strtok_r(NULL, ",", &saveptr);
174 pr_err("failed: event '%s' not found, use '-e list' to get list of available events\n", str);
178 static bool perf_pmu__mem_events_supported(const char *mnt, struct perf_pmu *pmu,
179 struct perf_mem_event *e)
187 scnprintf(path, PATH_MAX, "%s/devices/%s/events/%s", mnt, pmu->name, e->event_name);
189 return !stat(path, &st);
192 int perf_pmu__mem_events_init(struct perf_pmu *pmu)
194 const char *mnt = sysfs__mount();
201 for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
202 struct perf_mem_event *e = perf_pmu__mem_events_ptr(pmu, j);
205 * If the event entry isn't valid, skip initialization
206 * and "e->supported" will keep false.
211 e->supported |= perf_pmu__mem_events_supported(mnt, pmu, e);
216 return found ? 0 : -ENOENT;
219 void perf_pmu__mem_events_list(struct perf_pmu *pmu)
223 for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
224 struct perf_mem_event *e = perf_pmu__mem_events_ptr(pmu, j);
226 fprintf(stderr, "%-*s%-*s%s",
229 e->tag && verbose > 0 ? 25 : 0,
230 e->tag && verbose > 0 ? perf_pmu__mem_events_name(j, pmu) : "",
231 e->supported ? ": available\n" : "");
235 int perf_mem_events__record_args(const char **rec_argv, int *argv_nr)
237 const char *mnt = sysfs__mount();
238 struct perf_pmu *pmu = NULL;
239 struct perf_mem_event *e;
244 while ((pmu = perf_pmus__scan_mem(pmu)) != NULL) {
245 for (int j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
246 e = perf_pmu__mem_events_ptr(pmu, j);
252 pr_err("failed: event '%s' not supported\n",
253 perf_pmu__mem_events_name(j, pmu));
257 s = perf_pmu__mem_events_name(j, pmu);
258 if (!s || !perf_pmu__mem_events_supported(mnt, pmu, e))
265 rec_argv[i++] = "-e";
266 rec_argv[i++] = copy;
274 static const char * const tlb_access[] = {
284 int perf_mem__tlb_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
287 u64 m = PERF_MEM_TLB_NA;
290 sz -= 1; /* -1 for null termination */
294 m = mem_info->data_src.mem_dtlb;
296 hit = m & PERF_MEM_TLB_HIT;
297 miss = m & PERF_MEM_TLB_MISS;
299 /* already taken care of */
300 m &= ~(PERF_MEM_TLB_HIT|PERF_MEM_TLB_MISS);
302 for (i = 0; m && i < ARRAY_SIZE(tlb_access); i++, m >>= 1) {
309 l += scnprintf(out + l, sz - l, tlb_access[i]);
312 l += scnprintf(out, sz - l, "N/A");
314 l += scnprintf(out + l, sz - l, " hit");
316 l += scnprintf(out + l, sz - l, " miss");
321 static const char * const mem_lvl[] = {
330 "Remote RAM (1 hop)",
331 "Remote RAM (2 hops)",
332 "Remote Cache (1 hop)",
333 "Remote Cache (2 hops)",
338 static const char * const mem_lvlnum[] = {
339 [PERF_MEM_LVLNUM_UNC] = "Uncached",
340 [PERF_MEM_LVLNUM_CXL] = "CXL",
341 [PERF_MEM_LVLNUM_IO] = "I/O",
342 [PERF_MEM_LVLNUM_ANY_CACHE] = "Any cache",
343 [PERF_MEM_LVLNUM_LFB] = "LFB/MAB",
344 [PERF_MEM_LVLNUM_RAM] = "RAM",
345 [PERF_MEM_LVLNUM_PMEM] = "PMEM",
346 [PERF_MEM_LVLNUM_NA] = "N/A",
349 static const char * const mem_hops[] = {
352 * While printing, 'Remote' will be added to represent
353 * 'Remote core, same node' accesses as remote field need
354 * to be set with mem_hops field.
358 "socket, same board",
362 static int perf_mem__op_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
364 u64 op = PERF_MEM_LOCK_NA;
368 op = mem_info->data_src.mem_op;
370 if (op & PERF_MEM_OP_NA)
371 l = scnprintf(out, sz, "N/A");
372 else if (op & PERF_MEM_OP_LOAD)
373 l = scnprintf(out, sz, "LOAD");
374 else if (op & PERF_MEM_OP_STORE)
375 l = scnprintf(out, sz, "STORE");
376 else if (op & PERF_MEM_OP_PFETCH)
377 l = scnprintf(out, sz, "PFETCH");
378 else if (op & PERF_MEM_OP_EXEC)
379 l = scnprintf(out, sz, "EXEC");
381 l = scnprintf(out, sz, "No");
386 int perf_mem__lvl_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
388 union perf_mem_data_src data_src;
393 char hit_miss[5] = {0};
395 sz -= 1; /* -1 for null termination */
401 data_src = mem_info->data_src;
403 if (data_src.mem_lvl & PERF_MEM_LVL_HIT)
404 memcpy(hit_miss, "hit", 3);
405 else if (data_src.mem_lvl & PERF_MEM_LVL_MISS)
406 memcpy(hit_miss, "miss", 4);
408 lvl = data_src.mem_lvl_num;
409 if (lvl && lvl != PERF_MEM_LVLNUM_NA) {
410 if (data_src.mem_remote) {
411 strcat(out, "Remote ");
415 if (data_src.mem_hops)
416 l += scnprintf(out + l, sz - l, "%s ", mem_hops[data_src.mem_hops]);
419 l += scnprintf(out + l, sz - l, mem_lvlnum[lvl]);
421 l += scnprintf(out + l, sz - l, "L%d", lvl);
423 l += scnprintf(out + l, sz - l, " %s", hit_miss);
427 lvl = data_src.mem_lvl;
431 lvl &= ~(PERF_MEM_LVL_NA | PERF_MEM_LVL_HIT | PERF_MEM_LVL_MISS);
435 for (i = 0; lvl && i < ARRAY_SIZE(mem_lvl); i++, lvl >>= 1) {
442 l += scnprintf(out + l, sz - l, mem_lvl[i]);
446 l += scnprintf(out + l, sz - l, " %s", hit_miss);
455 static const char * const snoop_access[] = {
463 static const char * const snoopx_access[] = {
468 int perf_mem__snp_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
471 u64 m = PERF_MEM_SNOOP_NA;
473 sz -= 1; /* -1 for null termination */
477 m = mem_info->data_src.mem_snoop;
479 for (i = 0; m && i < ARRAY_SIZE(snoop_access); i++, m >>= 1) {
486 l += scnprintf(out + l, sz - l, snoop_access[i]);
491 m = mem_info->data_src.mem_snoopx;
493 for (i = 0; m && i < ARRAY_SIZE(snoopx_access); i++, m >>= 1) {
501 l += scnprintf(out + l, sz - l, snoopx_access[i]);
505 l += scnprintf(out, sz - l, "N/A");
510 int perf_mem__lck_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
512 u64 mask = PERF_MEM_LOCK_NA;
516 mask = mem_info->data_src.mem_lock;
518 if (mask & PERF_MEM_LOCK_NA)
519 l = scnprintf(out, sz, "N/A");
520 else if (mask & PERF_MEM_LOCK_LOCKED)
521 l = scnprintf(out, sz, "Yes");
523 l = scnprintf(out, sz, "No");
528 int perf_mem__blk_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
531 u64 mask = PERF_MEM_BLK_NA;
533 sz -= 1; /* -1 for null termination */
537 mask = mem_info->data_src.mem_blk;
539 if (!mask || (mask & PERF_MEM_BLK_NA)) {
540 l += scnprintf(out + l, sz - l, " N/A");
543 if (mask & PERF_MEM_BLK_DATA)
544 l += scnprintf(out + l, sz - l, " Data");
545 if (mask & PERF_MEM_BLK_ADDR)
546 l += scnprintf(out + l, sz - l, " Addr");
551 int perf_script__meminfo_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
555 i += scnprintf(out, sz, "|OP ");
556 i += perf_mem__op_scnprintf(out + i, sz - i, mem_info);
557 i += scnprintf(out + i, sz - i, "|LVL ");
558 i += perf_mem__lvl_scnprintf(out + i, sz, mem_info);
559 i += scnprintf(out + i, sz - i, "|SNP ");
560 i += perf_mem__snp_scnprintf(out + i, sz - i, mem_info);
561 i += scnprintf(out + i, sz - i, "|TLB ");
562 i += perf_mem__tlb_scnprintf(out + i, sz - i, mem_info);
563 i += scnprintf(out + i, sz - i, "|LCK ");
564 i += perf_mem__lck_scnprintf(out + i, sz - i, mem_info);
565 i += scnprintf(out + i, sz - i, "|BLK ");
566 i += perf_mem__blk_scnprintf(out + i, sz - i, mem_info);
571 int c2c_decode_stats(struct c2c_stats *stats, struct mem_info *mi)
573 union perf_mem_data_src *data_src = &mi->data_src;
574 u64 daddr = mi->daddr.addr;
575 u64 op = data_src->mem_op;
576 u64 lvl = data_src->mem_lvl;
577 u64 snoop = data_src->mem_snoop;
578 u64 snoopx = data_src->mem_snoopx;
579 u64 lock = data_src->mem_lock;
580 u64 blk = data_src->mem_blk;
582 * Skylake might report unknown remote level via this
583 * bit, consider it when evaluating remote HITMs.
585 * Incase of power, remote field can also be used to denote cache
586 * accesses from the another core of same node. Hence, setting
587 * mrem only when HOPS is zero along with set remote field.
589 bool mrem = (data_src->mem_remote && !data_src->mem_hops);
592 #define HITM_INC(__f) \
598 #define PEER_INC(__f) \
604 #define P(a, b) PERF_MEM_##a##_##b
608 if (lock & P(LOCK, LOCKED)) stats->locks++;
610 if (blk & P(BLK, DATA)) stats->blk_data++;
611 if (blk & P(BLK, ADDR)) stats->blk_addr++;
613 if (op & P(OP, LOAD)) {
622 if (lvl & P(LVL, HIT)) {
623 if (lvl & P(LVL, UNC)) stats->ld_uncache++;
624 if (lvl & P(LVL, IO)) stats->ld_io++;
625 if (lvl & P(LVL, LFB)) stats->ld_fbhit++;
626 if (lvl & P(LVL, L1 )) stats->ld_l1hit++;
627 if (lvl & P(LVL, L2)) {
630 if (snoopx & P(SNOOPX, PEER))
633 if (lvl & P(LVL, L3 )) {
634 if (snoop & P(SNOOP, HITM))
639 if (snoopx & P(SNOOPX, PEER))
643 if (lvl & P(LVL, LOC_RAM)) {
645 if (snoop & P(SNOOP, HIT))
651 if ((lvl & P(LVL, REM_RAM1)) ||
652 (lvl & P(LVL, REM_RAM2)) ||
655 if (snoop & P(SNOOP, HIT))
662 if ((lvl & P(LVL, REM_CCE1)) ||
663 (lvl & P(LVL, REM_CCE2)) ||
665 if (snoop & P(SNOOP, HIT)) {
667 } else if (snoop & P(SNOOP, HITM)) {
669 } else if (snoopx & P(SNOOPX, PEER)) {
675 if ((lvl & P(LVL, MISS)))
678 } else if (op & P(OP, STORE)) {
687 if (lvl & P(LVL, HIT)) {
688 if (lvl & P(LVL, UNC)) stats->st_uncache++;
689 if (lvl & P(LVL, L1 )) stats->st_l1hit++;
691 if (lvl & P(LVL, MISS))
692 if (lvl & P(LVL, L1)) stats->st_l1miss++;
693 if (lvl & P(LVL, NA))
696 /* unparsable data_src? */
701 if (!mi->daddr.ms.map || !mi->iaddr.ms.map) {
711 void c2c_add_stats(struct c2c_stats *stats, struct c2c_stats *add)
713 stats->nr_entries += add->nr_entries;
715 stats->locks += add->locks;
716 stats->store += add->store;
717 stats->st_uncache += add->st_uncache;
718 stats->st_noadrs += add->st_noadrs;
719 stats->st_l1hit += add->st_l1hit;
720 stats->st_l1miss += add->st_l1miss;
721 stats->st_na += add->st_na;
722 stats->load += add->load;
723 stats->ld_excl += add->ld_excl;
724 stats->ld_shared += add->ld_shared;
725 stats->ld_uncache += add->ld_uncache;
726 stats->ld_io += add->ld_io;
727 stats->ld_miss += add->ld_miss;
728 stats->ld_noadrs += add->ld_noadrs;
729 stats->ld_fbhit += add->ld_fbhit;
730 stats->ld_l1hit += add->ld_l1hit;
731 stats->ld_l2hit += add->ld_l2hit;
732 stats->ld_llchit += add->ld_llchit;
733 stats->lcl_hitm += add->lcl_hitm;
734 stats->rmt_hitm += add->rmt_hitm;
735 stats->tot_hitm += add->tot_hitm;
736 stats->lcl_peer += add->lcl_peer;
737 stats->rmt_peer += add->rmt_peer;
738 stats->tot_peer += add->tot_peer;
739 stats->rmt_hit += add->rmt_hit;
740 stats->lcl_dram += add->lcl_dram;
741 stats->rmt_dram += add->rmt_dram;
742 stats->blk_data += add->blk_data;
743 stats->blk_addr += add->blk_addr;
744 stats->nomap += add->nomap;
745 stats->noparse += add->noparse;