1 // SPDX-License-Identifier: GPL-2.0
3 * Arm Statistical Profiling Extensions (SPE) support
4 * Copyright (c) 2017-2018, Arm Ltd.
11 #include <linux/bitops.h>
12 #include <linux/kernel.h>
13 #include <linux/log2.h>
14 #include <linux/types.h>
15 #include <linux/zalloc.h>
28 #include "thread-stack.h"
31 #include "util/synthetic-events.h"
34 #include "arm-spe-decoder/arm-spe-decoder.h"
35 #include "arm-spe-decoder/arm-spe-pkt-decoder.h"
37 #define MAX_TIMESTAMP (~0ULL)
40 struct auxtrace auxtrace;
41 struct auxtrace_queues queues;
42 struct auxtrace_heap heap;
43 struct itrace_synth_opts synth_opts;
45 struct perf_session *session;
46 struct machine *machine;
49 struct perf_tsc_conversion tc;
59 u8 sample_remote_access;
61 u8 sample_instructions;
62 u64 instructions_sample_period;
77 unsigned long num_events;
78 u8 use_ctx_pkt_for_pid;
81 struct arm_spe_queue {
83 unsigned int queue_nr;
84 struct auxtrace_buffer *buffer;
85 struct auxtrace_buffer *old_buffer;
86 union perf_event *event_buf;
92 struct arm_spe_decoder *decoder;
95 struct thread *thread;
96 u64 period_instructions;
99 static void arm_spe_dump(struct arm_spe *spe __maybe_unused,
100 unsigned char *buf, size_t len)
102 struct arm_spe_pkt packet;
105 char desc[ARM_SPE_PKT_DESC_MAX];
106 const char *color = PERF_COLOR_BLUE;
108 color_fprintf(stdout, color,
109 ". ... ARM SPE data: size %#zx bytes\n",
113 ret = arm_spe_get_packet(buf, len, &packet);
119 color_fprintf(stdout, color, " %08x: ", pos);
120 for (i = 0; i < pkt_len; i++)
121 color_fprintf(stdout, color, " %02x", buf[i]);
123 color_fprintf(stdout, color, " ");
125 ret = arm_spe_pkt_desc(&packet, desc,
126 ARM_SPE_PKT_DESC_MAX);
128 color_fprintf(stdout, color, " %s\n", desc);
130 color_fprintf(stdout, color, " Bad packet!\n");
138 static void arm_spe_dump_event(struct arm_spe *spe, unsigned char *buf,
142 arm_spe_dump(spe, buf, len);
145 static int arm_spe_get_trace(struct arm_spe_buffer *b, void *data)
147 struct arm_spe_queue *speq = data;
148 struct auxtrace_buffer *buffer = speq->buffer;
149 struct auxtrace_buffer *old_buffer = speq->old_buffer;
150 struct auxtrace_queue *queue;
152 queue = &speq->spe->queues.queue_array[speq->queue_nr];
154 buffer = auxtrace_buffer__next(queue, buffer);
155 /* If no more data, drop the previous auxtrace_buffer and return */
158 auxtrace_buffer__drop_data(old_buffer);
163 speq->buffer = buffer;
165 /* If the aux_buffer doesn't have data associated, try to load it */
167 /* get the file desc associated with the perf data file */
168 int fd = perf_data__fd(speq->spe->session->data);
170 buffer->data = auxtrace_buffer__get_data(buffer, fd);
175 b->len = buffer->size;
176 b->buf = buffer->data;
180 auxtrace_buffer__drop_data(old_buffer);
181 speq->old_buffer = buffer;
183 auxtrace_buffer__drop_data(buffer);
184 return arm_spe_get_trace(b, data);
190 static struct arm_spe_queue *arm_spe__alloc_queue(struct arm_spe *spe,
191 unsigned int queue_nr)
193 struct arm_spe_params params = { .get_trace = 0, };
194 struct arm_spe_queue *speq;
196 speq = zalloc(sizeof(*speq));
200 speq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
201 if (!speq->event_buf)
205 speq->queue_nr = queue_nr;
209 speq->period_instructions = 0;
212 params.get_trace = arm_spe_get_trace;
215 /* create new decoder */
216 speq->decoder = arm_spe_decoder_new(¶ms);
223 zfree(&speq->event_buf);
229 static inline u8 arm_spe_cpumode(struct arm_spe *spe, u64 ip)
231 return ip >= spe->kernel_start ?
232 PERF_RECORD_MISC_KERNEL :
233 PERF_RECORD_MISC_USER;
236 static void arm_spe_set_pid_tid_cpu(struct arm_spe *spe,
237 struct auxtrace_queue *queue)
239 struct arm_spe_queue *speq = queue->priv;
242 tid = machine__get_current_tid(spe->machine, speq->cpu);
245 thread__zput(speq->thread);
247 speq->tid = queue->tid;
249 if ((!speq->thread) && (speq->tid != -1)) {
250 speq->thread = machine__find_thread(spe->machine, -1,
255 speq->pid = speq->thread->pid_;
256 if (queue->cpu == -1)
257 speq->cpu = speq->thread->cpu;
261 static int arm_spe_set_tid(struct arm_spe_queue *speq, pid_t tid)
263 struct arm_spe *spe = speq->spe;
264 int err = machine__set_current_tid(spe->machine, speq->cpu, -1, tid);
269 arm_spe_set_pid_tid_cpu(spe, &spe->queues.queue_array[speq->queue_nr]);
274 static void arm_spe_prep_sample(struct arm_spe *spe,
275 struct arm_spe_queue *speq,
276 union perf_event *event,
277 struct perf_sample *sample)
279 struct arm_spe_record *record = &speq->decoder->record;
281 if (!spe->timeless_decoding)
282 sample->time = tsc_to_perf_time(record->timestamp, &spe->tc);
284 sample->ip = record->from_ip;
285 sample->cpumode = arm_spe_cpumode(spe, sample->ip);
286 sample->pid = speq->pid;
287 sample->tid = speq->tid;
289 sample->cpu = speq->cpu;
291 event->sample.header.type = PERF_RECORD_SAMPLE;
292 event->sample.header.misc = sample->cpumode;
293 event->sample.header.size = sizeof(struct perf_event_header);
296 static int arm_spe__inject_event(union perf_event *event, struct perf_sample *sample, u64 type)
298 event->header.size = perf_event__sample_event_size(sample, type, 0);
299 return perf_event__synthesize_sample(event, type, 0, sample);
303 arm_spe_deliver_synth_event(struct arm_spe *spe,
304 struct arm_spe_queue *speq __maybe_unused,
305 union perf_event *event,
306 struct perf_sample *sample)
310 if (spe->synth_opts.inject) {
311 ret = arm_spe__inject_event(event, sample, spe->sample_type);
316 ret = perf_session__deliver_synth_event(spe->session, event, sample);
318 pr_err("ARM SPE: failed to deliver event, error %d\n", ret);
323 static int arm_spe__synth_mem_sample(struct arm_spe_queue *speq,
324 u64 spe_events_id, u64 data_src)
326 struct arm_spe *spe = speq->spe;
327 struct arm_spe_record *record = &speq->decoder->record;
328 union perf_event *event = speq->event_buf;
329 struct perf_sample sample = { .ip = 0, };
331 arm_spe_prep_sample(spe, speq, event, &sample);
333 sample.id = spe_events_id;
334 sample.stream_id = spe_events_id;
335 sample.addr = record->virt_addr;
336 sample.phys_addr = record->phys_addr;
337 sample.data_src = data_src;
338 sample.weight = record->latency;
340 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
343 static int arm_spe__synth_branch_sample(struct arm_spe_queue *speq,
346 struct arm_spe *spe = speq->spe;
347 struct arm_spe_record *record = &speq->decoder->record;
348 union perf_event *event = speq->event_buf;
349 struct perf_sample sample = { .ip = 0, };
351 arm_spe_prep_sample(spe, speq, event, &sample);
353 sample.id = spe_events_id;
354 sample.stream_id = spe_events_id;
355 sample.addr = record->to_ip;
356 sample.weight = record->latency;
358 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
361 static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,
362 u64 spe_events_id, u64 data_src)
364 struct arm_spe *spe = speq->spe;
365 struct arm_spe_record *record = &speq->decoder->record;
366 union perf_event *event = speq->event_buf;
367 struct perf_sample sample = { .ip = 0, };
370 * Handles perf instruction sampling period.
372 speq->period_instructions++;
373 if (speq->period_instructions < spe->instructions_sample_period)
375 speq->period_instructions = 0;
377 arm_spe_prep_sample(spe, speq, event, &sample);
379 sample.id = spe_events_id;
380 sample.stream_id = spe_events_id;
381 sample.addr = record->virt_addr;
382 sample.phys_addr = record->phys_addr;
383 sample.data_src = data_src;
384 sample.period = spe->instructions_sample_period;
385 sample.weight = record->latency;
387 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
390 #define SPE_MEM_TYPE (ARM_SPE_L1D_ACCESS | ARM_SPE_L1D_MISS | \
391 ARM_SPE_LLC_ACCESS | ARM_SPE_LLC_MISS | \
392 ARM_SPE_REMOTE_ACCESS)
394 static bool arm_spe__is_memory_event(enum arm_spe_sample_type type)
396 if (type & SPE_MEM_TYPE)
402 static u64 arm_spe__synth_data_source(const struct arm_spe_record *record)
404 union perf_mem_data_src data_src = { 0 };
406 if (record->op == ARM_SPE_LD)
407 data_src.mem_op = PERF_MEM_OP_LOAD;
409 data_src.mem_op = PERF_MEM_OP_STORE;
411 if (record->type & (ARM_SPE_LLC_ACCESS | ARM_SPE_LLC_MISS)) {
412 data_src.mem_lvl = PERF_MEM_LVL_L3;
414 if (record->type & ARM_SPE_LLC_MISS)
415 data_src.mem_lvl |= PERF_MEM_LVL_MISS;
417 data_src.mem_lvl |= PERF_MEM_LVL_HIT;
418 } else if (record->type & (ARM_SPE_L1D_ACCESS | ARM_SPE_L1D_MISS)) {
419 data_src.mem_lvl = PERF_MEM_LVL_L1;
421 if (record->type & ARM_SPE_L1D_MISS)
422 data_src.mem_lvl |= PERF_MEM_LVL_MISS;
424 data_src.mem_lvl |= PERF_MEM_LVL_HIT;
427 if (record->type & ARM_SPE_REMOTE_ACCESS)
428 data_src.mem_lvl |= PERF_MEM_LVL_REM_CCE1;
430 if (record->type & (ARM_SPE_TLB_ACCESS | ARM_SPE_TLB_MISS)) {
431 data_src.mem_dtlb = PERF_MEM_TLB_WK;
433 if (record->type & ARM_SPE_TLB_MISS)
434 data_src.mem_dtlb |= PERF_MEM_TLB_MISS;
436 data_src.mem_dtlb |= PERF_MEM_TLB_HIT;
442 static int arm_spe_sample(struct arm_spe_queue *speq)
444 const struct arm_spe_record *record = &speq->decoder->record;
445 struct arm_spe *spe = speq->spe;
449 data_src = arm_spe__synth_data_source(record);
451 if (spe->sample_flc) {
452 if (record->type & ARM_SPE_L1D_MISS) {
453 err = arm_spe__synth_mem_sample(speq, spe->l1d_miss_id,
459 if (record->type & ARM_SPE_L1D_ACCESS) {
460 err = arm_spe__synth_mem_sample(speq, spe->l1d_access_id,
467 if (spe->sample_llc) {
468 if (record->type & ARM_SPE_LLC_MISS) {
469 err = arm_spe__synth_mem_sample(speq, spe->llc_miss_id,
475 if (record->type & ARM_SPE_LLC_ACCESS) {
476 err = arm_spe__synth_mem_sample(speq, spe->llc_access_id,
483 if (spe->sample_tlb) {
484 if (record->type & ARM_SPE_TLB_MISS) {
485 err = arm_spe__synth_mem_sample(speq, spe->tlb_miss_id,
491 if (record->type & ARM_SPE_TLB_ACCESS) {
492 err = arm_spe__synth_mem_sample(speq, spe->tlb_access_id,
499 if (spe->sample_branch && (record->type & ARM_SPE_BRANCH_MISS)) {
500 err = arm_spe__synth_branch_sample(speq, spe->branch_miss_id);
505 if (spe->sample_remote_access &&
506 (record->type & ARM_SPE_REMOTE_ACCESS)) {
507 err = arm_spe__synth_mem_sample(speq, spe->remote_access_id,
513 if (spe->sample_memory && arm_spe__is_memory_event(record->type)) {
514 err = arm_spe__synth_mem_sample(speq, spe->memory_id, data_src);
519 if (spe->sample_instructions) {
520 err = arm_spe__synth_instruction_sample(speq, spe->instructions_id, data_src);
528 static int arm_spe_run_decoder(struct arm_spe_queue *speq, u64 *timestamp)
530 struct arm_spe *spe = speq->spe;
531 struct arm_spe_record *record;
534 if (!spe->kernel_start)
535 spe->kernel_start = machine__kernel_start(spe->machine);
539 * The usual logic is firstly to decode the packets, and then
540 * based the record to synthesize sample; but here the flow is
541 * reversed: it calls arm_spe_sample() for synthesizing samples
542 * prior to arm_spe_decode().
544 * Two reasons for this code logic:
545 * 1. Firstly, when setup queue in arm_spe__setup_queue(), it
546 * has decoded trace data and generated a record, but the record
547 * is left to generate sample until run to here, so it's correct
548 * to synthesize sample for the left record.
549 * 2. After decoding trace data, it needs to compare the record
550 * timestamp with the coming perf event, if the record timestamp
551 * is later than the perf event, it needs bail out and pushs the
552 * record into auxtrace heap, thus the record can be deferred to
553 * synthesize sample until run to here at the next time; so this
554 * can correlate samples between Arm SPE trace data and other
555 * perf events with correct time ordering.
559 * Update pid/tid info.
561 record = &speq->decoder->record;
562 if (!spe->timeless_decoding && record->context_id != (u64)-1) {
563 ret = arm_spe_set_tid(speq, record->context_id);
567 spe->use_ctx_pkt_for_pid = true;
570 ret = arm_spe_sample(speq);
574 ret = arm_spe_decode(speq->decoder);
576 pr_debug("No data or all data has been processed.\n");
581 * Error is detected when decode SPE trace data, continue to
582 * the next trace data and find out more records.
587 record = &speq->decoder->record;
589 /* Update timestamp for the last record */
590 if (record->timestamp > speq->timestamp)
591 speq->timestamp = record->timestamp;
594 * If the timestamp of the queue is later than timestamp of the
595 * coming perf event, bail out so can allow the perf event to
596 * be processed ahead.
598 if (!spe->timeless_decoding && speq->timestamp >= *timestamp) {
599 *timestamp = speq->timestamp;
607 static int arm_spe__setup_queue(struct arm_spe *spe,
608 struct auxtrace_queue *queue,
609 unsigned int queue_nr)
611 struct arm_spe_queue *speq = queue->priv;
612 struct arm_spe_record *record;
614 if (list_empty(&queue->head) || speq)
617 speq = arm_spe__alloc_queue(spe, queue_nr);
624 if (queue->cpu != -1)
625 speq->cpu = queue->cpu;
627 if (!speq->on_heap) {
630 if (spe->timeless_decoding)
634 ret = arm_spe_decode(speq->decoder);
642 record = &speq->decoder->record;
644 speq->timestamp = record->timestamp;
645 ret = auxtrace_heap__add(&spe->heap, queue_nr, speq->timestamp);
648 speq->on_heap = true;
654 static int arm_spe__setup_queues(struct arm_spe *spe)
659 for (i = 0; i < spe->queues.nr_queues; i++) {
660 ret = arm_spe__setup_queue(spe, &spe->queues.queue_array[i], i);
668 static int arm_spe__update_queues(struct arm_spe *spe)
670 if (spe->queues.new_data) {
671 spe->queues.new_data = false;
672 return arm_spe__setup_queues(spe);
678 static bool arm_spe__is_timeless_decoding(struct arm_spe *spe)
681 struct evlist *evlist = spe->session->evlist;
682 bool timeless_decoding = true;
685 * Circle through the list of event and complain if we find one
686 * with the time bit set.
688 evlist__for_each_entry(evlist, evsel) {
689 if ((evsel->core.attr.sample_type & PERF_SAMPLE_TIME))
690 timeless_decoding = false;
693 return timeless_decoding;
696 static int arm_spe_process_queues(struct arm_spe *spe, u64 timestamp)
698 unsigned int queue_nr;
703 struct auxtrace_queue *queue;
704 struct arm_spe_queue *speq;
706 if (!spe->heap.heap_cnt)
709 if (spe->heap.heap_array[0].ordinal >= timestamp)
712 queue_nr = spe->heap.heap_array[0].queue_nr;
713 queue = &spe->queues.queue_array[queue_nr];
716 auxtrace_heap__pop(&spe->heap);
718 if (spe->heap.heap_cnt) {
719 ts = spe->heap.heap_array[0].ordinal + 1;
727 * A previous context-switch event has set pid/tid in the machine's context, so
728 * here we need to update the pid/tid in the thread and SPE queue.
730 if (!spe->use_ctx_pkt_for_pid)
731 arm_spe_set_pid_tid_cpu(spe, queue);
733 ret = arm_spe_run_decoder(speq, &ts);
735 auxtrace_heap__add(&spe->heap, queue_nr, ts);
740 ret = auxtrace_heap__add(&spe->heap, queue_nr, ts);
744 speq->on_heap = false;
751 static int arm_spe_process_timeless_queues(struct arm_spe *spe, pid_t tid,
754 struct auxtrace_queues *queues = &spe->queues;
758 for (i = 0; i < queues->nr_queues; i++) {
759 struct auxtrace_queue *queue = &spe->queues.queue_array[i];
760 struct arm_spe_queue *speq = queue->priv;
762 if (speq && (tid == -1 || speq->tid == tid)) {
764 arm_spe_set_pid_tid_cpu(spe, queue);
765 arm_spe_run_decoder(speq, &ts);
771 static int arm_spe_context_switch(struct arm_spe *spe, union perf_event *event,
772 struct perf_sample *sample)
777 if (!(event->header.misc & PERF_RECORD_MISC_SWITCH_OUT))
780 pid = event->context_switch.next_prev_pid;
781 tid = event->context_switch.next_prev_tid;
785 pr_warning("context_switch event has no tid\n");
787 return machine__set_current_tid(spe->machine, cpu, pid, tid);
790 static int arm_spe_process_event(struct perf_session *session,
791 union perf_event *event,
792 struct perf_sample *sample,
793 struct perf_tool *tool)
797 struct arm_spe *spe = container_of(session->auxtrace,
798 struct arm_spe, auxtrace);
803 if (!tool->ordered_events) {
804 pr_err("SPE trace requires ordered events\n");
808 if (sample->time && (sample->time != (u64) -1))
809 timestamp = perf_time_to_tsc(sample->time, &spe->tc);
813 if (timestamp || spe->timeless_decoding) {
814 err = arm_spe__update_queues(spe);
819 if (spe->timeless_decoding) {
820 if (event->header.type == PERF_RECORD_EXIT) {
821 err = arm_spe_process_timeless_queues(spe,
825 } else if (timestamp) {
826 err = arm_spe_process_queues(spe, timestamp);
830 if (!spe->use_ctx_pkt_for_pid &&
831 (event->header.type == PERF_RECORD_SWITCH_CPU_WIDE ||
832 event->header.type == PERF_RECORD_SWITCH))
833 err = arm_spe_context_switch(spe, event, sample);
839 static int arm_spe_process_auxtrace_event(struct perf_session *session,
840 union perf_event *event,
841 struct perf_tool *tool __maybe_unused)
843 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
846 if (!spe->data_queued) {
847 struct auxtrace_buffer *buffer;
849 int fd = perf_data__fd(session->data);
852 if (perf_data__is_pipe(session->data)) {
855 data_offset = lseek(fd, 0, SEEK_CUR);
856 if (data_offset == -1)
860 err = auxtrace_queues__add_event(&spe->queues, session, event,
861 data_offset, &buffer);
865 /* Dump here now we have copied a piped trace out of the pipe */
867 if (auxtrace_buffer__get_data(buffer, fd)) {
868 arm_spe_dump_event(spe, buffer->data,
870 auxtrace_buffer__put_data(buffer);
878 static int arm_spe_flush(struct perf_session *session __maybe_unused,
879 struct perf_tool *tool __maybe_unused)
881 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
888 if (!tool->ordered_events)
891 ret = arm_spe__update_queues(spe);
895 if (spe->timeless_decoding)
896 return arm_spe_process_timeless_queues(spe, -1,
899 ret = arm_spe_process_queues(spe, MAX_TIMESTAMP);
903 if (!spe->use_ctx_pkt_for_pid)
904 ui__warning("Arm SPE CONTEXT packets not found in the traces.\n"
905 "Matching of TIDs to SPE events could be inaccurate.\n");
910 static void arm_spe_free_queue(void *priv)
912 struct arm_spe_queue *speq = priv;
916 thread__zput(speq->thread);
917 arm_spe_decoder_free(speq->decoder);
918 zfree(&speq->event_buf);
922 static void arm_spe_free_events(struct perf_session *session)
924 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
926 struct auxtrace_queues *queues = &spe->queues;
929 for (i = 0; i < queues->nr_queues; i++) {
930 arm_spe_free_queue(queues->queue_array[i].priv);
931 queues->queue_array[i].priv = NULL;
933 auxtrace_queues__free(queues);
936 static void arm_spe_free(struct perf_session *session)
938 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
941 auxtrace_heap__free(&spe->heap);
942 arm_spe_free_events(session);
943 session->auxtrace = NULL;
947 static bool arm_spe_evsel_is_auxtrace(struct perf_session *session,
950 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe, auxtrace);
952 return evsel->core.attr.type == spe->pmu_type;
955 static const char * const arm_spe_info_fmts[] = {
956 [ARM_SPE_PMU_TYPE] = " PMU Type %"PRId64"\n",
959 static void arm_spe_print_info(__u64 *arr)
964 fprintf(stdout, arm_spe_info_fmts[ARM_SPE_PMU_TYPE], arr[ARM_SPE_PMU_TYPE]);
967 struct arm_spe_synth {
968 struct perf_tool dummy_tool;
969 struct perf_session *session;
972 static int arm_spe_event_synth(struct perf_tool *tool,
973 union perf_event *event,
974 struct perf_sample *sample __maybe_unused,
975 struct machine *machine __maybe_unused)
977 struct arm_spe_synth *arm_spe_synth =
978 container_of(tool, struct arm_spe_synth, dummy_tool);
980 return perf_session__deliver_synth_event(arm_spe_synth->session,
984 static int arm_spe_synth_event(struct perf_session *session,
985 struct perf_event_attr *attr, u64 id)
987 struct arm_spe_synth arm_spe_synth;
989 memset(&arm_spe_synth, 0, sizeof(struct arm_spe_synth));
990 arm_spe_synth.session = session;
992 return perf_event__synthesize_attr(&arm_spe_synth.dummy_tool, attr, 1,
993 &id, arm_spe_event_synth);
996 static void arm_spe_set_event_name(struct evlist *evlist, u64 id,
1001 evlist__for_each_entry(evlist, evsel) {
1002 if (evsel->core.id && evsel->core.id[0] == id) {
1004 zfree(&evsel->name);
1005 evsel->name = strdup(name);
1012 arm_spe_synth_events(struct arm_spe *spe, struct perf_session *session)
1014 struct evlist *evlist = session->evlist;
1015 struct evsel *evsel;
1016 struct perf_event_attr attr;
1021 evlist__for_each_entry(evlist, evsel) {
1022 if (evsel->core.attr.type == spe->pmu_type) {
1029 pr_debug("No selected events with SPE trace data\n");
1033 memset(&attr, 0, sizeof(struct perf_event_attr));
1034 attr.size = sizeof(struct perf_event_attr);
1035 attr.type = PERF_TYPE_HARDWARE;
1036 attr.sample_type = evsel->core.attr.sample_type &
1037 (PERF_SAMPLE_MASK | PERF_SAMPLE_PHYS_ADDR);
1038 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
1039 PERF_SAMPLE_PERIOD | PERF_SAMPLE_DATA_SRC |
1040 PERF_SAMPLE_WEIGHT | PERF_SAMPLE_ADDR;
1041 if (spe->timeless_decoding)
1042 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
1044 attr.sample_type |= PERF_SAMPLE_TIME;
1046 spe->sample_type = attr.sample_type;
1048 attr.exclude_user = evsel->core.attr.exclude_user;
1049 attr.exclude_kernel = evsel->core.attr.exclude_kernel;
1050 attr.exclude_hv = evsel->core.attr.exclude_hv;
1051 attr.exclude_host = evsel->core.attr.exclude_host;
1052 attr.exclude_guest = evsel->core.attr.exclude_guest;
1053 attr.sample_id_all = evsel->core.attr.sample_id_all;
1054 attr.read_format = evsel->core.attr.read_format;
1056 /* create new id val to be a fixed offset from evsel id */
1057 id = evsel->core.id[0] + 1000000000;
1062 if (spe->synth_opts.flc) {
1063 spe->sample_flc = true;
1065 /* Level 1 data cache miss */
1066 err = arm_spe_synth_event(session, &attr, id);
1069 spe->l1d_miss_id = id;
1070 arm_spe_set_event_name(evlist, id, "l1d-miss");
1073 /* Level 1 data cache access */
1074 err = arm_spe_synth_event(session, &attr, id);
1077 spe->l1d_access_id = id;
1078 arm_spe_set_event_name(evlist, id, "l1d-access");
1082 if (spe->synth_opts.llc) {
1083 spe->sample_llc = true;
1085 /* Last level cache miss */
1086 err = arm_spe_synth_event(session, &attr, id);
1089 spe->llc_miss_id = id;
1090 arm_spe_set_event_name(evlist, id, "llc-miss");
1093 /* Last level cache access */
1094 err = arm_spe_synth_event(session, &attr, id);
1097 spe->llc_access_id = id;
1098 arm_spe_set_event_name(evlist, id, "llc-access");
1102 if (spe->synth_opts.tlb) {
1103 spe->sample_tlb = true;
1106 err = arm_spe_synth_event(session, &attr, id);
1109 spe->tlb_miss_id = id;
1110 arm_spe_set_event_name(evlist, id, "tlb-miss");
1114 err = arm_spe_synth_event(session, &attr, id);
1117 spe->tlb_access_id = id;
1118 arm_spe_set_event_name(evlist, id, "tlb-access");
1122 if (spe->synth_opts.branches) {
1123 spe->sample_branch = true;
1126 err = arm_spe_synth_event(session, &attr, id);
1129 spe->branch_miss_id = id;
1130 arm_spe_set_event_name(evlist, id, "branch-miss");
1134 if (spe->synth_opts.remote_access) {
1135 spe->sample_remote_access = true;
1138 err = arm_spe_synth_event(session, &attr, id);
1141 spe->remote_access_id = id;
1142 arm_spe_set_event_name(evlist, id, "remote-access");
1146 if (spe->synth_opts.mem) {
1147 spe->sample_memory = true;
1149 err = arm_spe_synth_event(session, &attr, id);
1152 spe->memory_id = id;
1153 arm_spe_set_event_name(evlist, id, "memory");
1157 if (spe->synth_opts.instructions) {
1158 if (spe->synth_opts.period_type != PERF_ITRACE_PERIOD_INSTRUCTIONS) {
1159 pr_warning("Only instruction-based sampling period is currently supported by Arm SPE.\n");
1160 goto synth_instructions_out;
1162 if (spe->synth_opts.period > 1)
1163 pr_warning("Arm SPE has a hardware-based sample period.\n"
1164 "Additional instruction events will be discarded by --itrace\n");
1166 spe->sample_instructions = true;
1167 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
1168 attr.sample_period = spe->synth_opts.period;
1169 spe->instructions_sample_period = attr.sample_period;
1170 err = arm_spe_synth_event(session, &attr, id);
1173 spe->instructions_id = id;
1174 arm_spe_set_event_name(evlist, id, "instructions");
1176 synth_instructions_out:
1181 int arm_spe_process_auxtrace_info(union perf_event *event,
1182 struct perf_session *session)
1184 struct perf_record_auxtrace_info *auxtrace_info = &event->auxtrace_info;
1185 size_t min_sz = sizeof(u64) * ARM_SPE_AUXTRACE_PRIV_MAX;
1186 struct perf_record_time_conv *tc = &session->time_conv;
1187 struct arm_spe *spe;
1190 if (auxtrace_info->header.size < sizeof(struct perf_record_auxtrace_info) +
1194 spe = zalloc(sizeof(struct arm_spe));
1198 err = auxtrace_queues__init(&spe->queues);
1202 spe->session = session;
1203 spe->machine = &session->machines.host; /* No kvm support */
1204 spe->auxtrace_type = auxtrace_info->type;
1205 spe->pmu_type = auxtrace_info->priv[ARM_SPE_PMU_TYPE];
1207 spe->timeless_decoding = arm_spe__is_timeless_decoding(spe);
1210 * The synthesized event PERF_RECORD_TIME_CONV has been handled ahead
1211 * and the parameters for hardware clock are stored in the session
1212 * context. Passes these parameters to the struct perf_tsc_conversion
1213 * in "spe->tc", which is used for later conversion between clock
1214 * counter and timestamp.
1216 * For backward compatibility, copies the fields starting from
1217 * "time_cycles" only if they are contained in the event.
1219 spe->tc.time_shift = tc->time_shift;
1220 spe->tc.time_mult = tc->time_mult;
1221 spe->tc.time_zero = tc->time_zero;
1223 if (event_contains(*tc, time_cycles)) {
1224 spe->tc.time_cycles = tc->time_cycles;
1225 spe->tc.time_mask = tc->time_mask;
1226 spe->tc.cap_user_time_zero = tc->cap_user_time_zero;
1227 spe->tc.cap_user_time_short = tc->cap_user_time_short;
1230 spe->auxtrace.process_event = arm_spe_process_event;
1231 spe->auxtrace.process_auxtrace_event = arm_spe_process_auxtrace_event;
1232 spe->auxtrace.flush_events = arm_spe_flush;
1233 spe->auxtrace.free_events = arm_spe_free_events;
1234 spe->auxtrace.free = arm_spe_free;
1235 spe->auxtrace.evsel_is_auxtrace = arm_spe_evsel_is_auxtrace;
1236 session->auxtrace = &spe->auxtrace;
1238 arm_spe_print_info(&auxtrace_info->priv[0]);
1243 if (session->itrace_synth_opts && session->itrace_synth_opts->set)
1244 spe->synth_opts = *session->itrace_synth_opts;
1246 itrace_synth_opts__set_default(&spe->synth_opts, false);
1248 err = arm_spe_synth_events(spe, session);
1250 goto err_free_queues;
1252 err = auxtrace_queues__process_index(&spe->queues, session);
1254 goto err_free_queues;
1256 if (spe->queues.populated)
1257 spe->data_queued = true;
1262 auxtrace_queues__free(&spe->queues);
1263 session->auxtrace = NULL;