1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Arm Statistical Profiling Extensions (SPE) support
4 * Copyright (c) 2017-2018, Arm Ltd.
7 #ifndef INCLUDE__ARM_SPE_PKT_DECODER_H__
8 #define INCLUDE__ARM_SPE_PKT_DECODER_H__
13 #define ARM_SPE_PKT_DESC_MAX 256
15 #define ARM_SPE_NEED_MORE_BYTES -1
16 #define ARM_SPE_BAD_PACKET -2
18 #define ARM_SPE_PKT_MAX_SZ 16
20 enum arm_spe_pkt_type {
34 enum arm_spe_pkt_type type;
39 /* Short header (HEADER0) and extended header (HEADER1) */
40 #define SPE_HEADER0_PAD 0x0
41 #define SPE_HEADER0_END 0x1
42 #define SPE_HEADER0_TIMESTAMP 0x71
43 /* Mask for event & data source */
44 #define SPE_HEADER0_MASK1 (GENMASK_ULL(7, 6) | GENMASK_ULL(3, 0))
45 #define SPE_HEADER0_EVENTS 0x42
46 #define SPE_HEADER0_SOURCE 0x43
47 /* Mask for context & operation */
48 #define SPE_HEADER0_MASK2 GENMASK_ULL(7, 2)
49 #define SPE_HEADER0_CONTEXT 0x64
50 #define SPE_HEADER0_OP_TYPE 0x48
51 /* Mask for extended format */
52 #define SPE_HEADER0_EXTENDED 0x20
53 /* Mask for address & counter */
54 #define SPE_HEADER0_MASK3 GENMASK_ULL(7, 3)
55 #define SPE_HEADER0_ADDRESS 0xb0
56 #define SPE_HEADER0_COUNTER 0x98
57 #define SPE_HEADER1_ALIGNMENT 0x0
59 #define SPE_ADDR_PKT_HDR_INDEX_INS (0x0)
60 #define SPE_ADDR_PKT_HDR_INDEX_BRANCH (0x1)
61 #define SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT (0x2)
62 #define SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS (0x3)
64 #define SPE_ADDR_PKT_NS BIT(7)
65 #define SPE_ADDR_PKT_CH BIT(6)
66 #define SPE_ADDR_PKT_EL_OFFSET (5)
67 #define SPE_ADDR_PKT_EL_MASK (0x3 << SPE_ADDR_PKT_EL_OFFSET)
68 #define SPE_ADDR_PKT_EL0 (0)
69 #define SPE_ADDR_PKT_EL1 (1)
70 #define SPE_ADDR_PKT_EL2 (2)
71 #define SPE_ADDR_PKT_EL3 (3)
73 const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
75 int arm_spe_get_packet(const unsigned char *buf, size_t len,
76 struct arm_spe_pkt *packet);
78 int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, size_t len);