tools/perf/pmu-events/arch/x86/amdzen2/branch.json

   1 [
   2   {
   3     "EventName": "bp_l1_btb_correct",
   4     "EventCode": "0x8a",
   5     "BriefDescription": "L1 Branch Prediction Overrides Existing Prediction (speculative)."
   6   },
   7   {
   8     "EventName": "bp_l2_btb_correct",
   9     "EventCode": "0x8b",
  10     "BriefDescription": "L2 Branch Prediction Overrides Existing Prediction (speculative)."
  11   },
  12   {
  13     "EventName": "bp_dyn_ind_pred",
  14     "EventCode": "0x8e",
  15     "BriefDescription": "Dynamic Indirect Predictions.",
  16     "PublicDescription": "Indirect Branch Prediction for potential multi-target branch (speculative)."
  17   },
  18   {
  19     "EventName": "bp_de_redirect",
  20     "EventCode": "0x91",
  21     "BriefDescription": "Decoder Overrides Existing Branch Prediction (speculative)."
  22   },
  23   {
  24     "EventName": "bp_l1_tlb_fetch_hit",
  25     "EventCode": "0x94",
  26     "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB.",
  27     "UMask": "0xFF"
  28   },
  29   {
  30     "EventName": "bp_l1_tlb_fetch_hit.if1g",
  31     "EventCode": "0x94",
  32     "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. Instruction fetches to a 1GB page.",
  33     "UMask": "0x4"
  34   },
  35   {
  36     "EventName": "bp_l1_tlb_fetch_hit.if2m",
  37     "EventCode": "0x94",
  38     "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. Instruction fetches to a 2MB page.",
  39     "UMask": "0x2"
  40   },
  41   {
  42     "EventName": "bp_l1_tlb_fetch_hit.if4k",
  43     "EventCode": "0x94",
  44     "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. Instruction fetches to a 4KB page.",
  45     "UMask": "0x1"
  46   },
  47   {
  48     "EventName": "bp_tlb_rel",
  49     "EventCode": "0x99",
  50     "BriefDescription": "The number of ITLB reload requests."
  51   }
  52 ]