1 // SPDX-License-Identifier: GPL-2.0-only
3 * intel_pt.c: Intel Processor Trace support
4 * Copyright (c) 2013-2015, Intel Corporation.
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/bitops.h>
12 #include <linux/log2.h>
13 #include <linux/zalloc.h>
16 #include "../../util/session.h"
17 #include "../../util/event.h"
18 #include "../../util/evlist.h"
19 #include "../../util/evsel.h"
20 #include "../../util/evsel_config.h"
21 #include "../../util/cpumap.h"
22 #include "../../util/mmap.h"
23 #include <subcmd/parse-options.h>
24 #include "../../util/parse-events.h"
25 #include "../../util/pmu.h"
26 #include "../../util/debug.h"
27 #include "../../util/auxtrace.h"
28 #include "../../util/record.h"
29 #include "../../util/target.h"
30 #include "../../util/tsc.h"
31 #include <internal/lib.h> // page_size
32 #include "../../util/intel-pt.h"
34 #define KiB(x) ((x) * 1024)
35 #define MiB(x) ((x) * 1024 * 1024)
36 #define KiB_MASK(x) (KiB(x) - 1)
37 #define MiB_MASK(x) (MiB(x) - 1)
39 #define INTEL_PT_PSB_PERIOD_NEAR 256
41 struct intel_pt_snapshot_ref {
47 struct intel_pt_recording {
48 struct auxtrace_record itr;
49 struct perf_pmu *intel_pt_pmu;
50 int have_sched_switch;
51 struct evlist *evlist;
53 bool snapshot_init_done;
55 size_t snapshot_ref_buf_size;
57 struct intel_pt_snapshot_ref *snapshot_refs;
61 static int intel_pt_parse_terms_with_default(struct list_head *formats,
65 struct list_head *terms;
66 struct perf_event_attr attr = { .size = 0, };
69 terms = malloc(sizeof(struct list_head));
73 INIT_LIST_HEAD(terms);
75 err = parse_events_terms(terms, str);
79 attr.config = *config;
80 err = perf_pmu__config_terms(formats, &attr, terms, true, NULL);
84 *config = attr.config;
86 parse_events_terms__delete(terms);
90 static int intel_pt_parse_terms(struct list_head *formats, const char *str,
94 return intel_pt_parse_terms_with_default(formats, str, config);
97 static u64 intel_pt_masked_bits(u64 mask, u64 bits)
99 const u64 top_bit = 1ULL << 63;
103 for (i = 0; i < 64; i++) {
104 if (mask & top_bit) {
116 static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str,
117 struct evlist *evlist, u64 *res)
124 mask = perf_pmu__format_bits(&intel_pt_pmu->format, str);
128 evlist__for_each_entry(evlist, evsel) {
129 if (evsel->core.attr.type == intel_pt_pmu->type) {
130 *res = intel_pt_masked_bits(mask, evsel->core.attr.config);
138 static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu,
139 struct evlist *evlist)
142 int err, topa_multiple_entries;
145 if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries",
146 "%d", &topa_multiple_entries) != 1)
147 topa_multiple_entries = 0;
150 * Use caps/topa_multiple_entries to indicate early hardware that had
151 * extra frequent PSBs.
153 if (!topa_multiple_entries) {
158 err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val);
162 psb_period = 1 << (val + 11);
164 pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period);
168 static int intel_pt_pick_bit(int bits, int target)
172 for (pos = 0; bits; bits >>= 1, pos++) {
174 if (pos <= target || pick < 0)
184 static u64 intel_pt_default_config(struct perf_pmu *intel_pt_pmu)
187 int mtc, mtc_periods = 0, mtc_period;
188 int psb_cyc, psb_periods, psb_period;
193 pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc");
195 if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc", "%d",
200 if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc_periods", "%x",
204 mtc_period = intel_pt_pick_bit(mtc_periods, 3);
205 pos += scnprintf(buf + pos, sizeof(buf) - pos,
206 ",mtc,mtc_period=%d", mtc_period);
210 if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_cyc", "%d",
214 if (psb_cyc && mtc_periods) {
215 if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_periods", "%x",
219 psb_period = intel_pt_pick_bit(psb_periods, 3);
220 pos += scnprintf(buf + pos, sizeof(buf) - pos,
221 ",psb_period=%d", psb_period);
225 if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 &&
226 perf_pmu__scan_file(intel_pt_pmu, "format/branch", "%c", &c) == 1)
227 pos += scnprintf(buf + pos, sizeof(buf) - pos, ",pt,branch");
229 pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf);
231 intel_pt_parse_terms(&intel_pt_pmu->format, buf, &config);
236 static int intel_pt_parse_snapshot_options(struct auxtrace_record *itr,
237 struct record_opts *opts,
240 struct intel_pt_recording *ptr =
241 container_of(itr, struct intel_pt_recording, itr);
242 unsigned long long snapshot_size = 0;
246 snapshot_size = strtoull(str, &endptr, 0);
247 if (*endptr || snapshot_size > SIZE_MAX)
251 opts->auxtrace_snapshot_mode = true;
252 opts->auxtrace_snapshot_size = snapshot_size;
254 ptr->snapshot_size = snapshot_size;
259 struct perf_event_attr *
260 intel_pt_pmu_default_config(struct perf_pmu *intel_pt_pmu)
262 struct perf_event_attr *attr;
264 attr = zalloc(sizeof(struct perf_event_attr));
268 attr->config = intel_pt_default_config(intel_pt_pmu);
270 intel_pt_pmu->selectable = true;
275 static const char *intel_pt_find_filter(struct evlist *evlist,
276 struct perf_pmu *intel_pt_pmu)
280 evlist__for_each_entry(evlist, evsel) {
281 if (evsel->core.attr.type == intel_pt_pmu->type)
282 return evsel->filter;
288 static size_t intel_pt_filter_bytes(const char *filter)
290 size_t len = filter ? strlen(filter) : 0;
292 return len ? roundup(len + 1, 8) : 0;
296 intel_pt_info_priv_size(struct auxtrace_record *itr, struct evlist *evlist)
298 struct intel_pt_recording *ptr =
299 container_of(itr, struct intel_pt_recording, itr);
300 const char *filter = intel_pt_find_filter(evlist, ptr->intel_pt_pmu);
302 ptr->priv_size = (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) +
303 intel_pt_filter_bytes(filter);
305 return ptr->priv_size;
308 static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d)
310 unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
312 __get_cpuid(0x15, &eax, &ebx, &ecx, &edx);
317 static int intel_pt_info_fill(struct auxtrace_record *itr,
318 struct perf_session *session,
319 struct perf_record_auxtrace_info *auxtrace_info,
322 struct intel_pt_recording *ptr =
323 container_of(itr, struct intel_pt_recording, itr);
324 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
325 struct perf_event_mmap_page *pc;
326 struct perf_tsc_conversion tc = { .time_mult = 0, };
327 bool cap_user_time_zero = false, per_cpu_mmaps;
328 u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit;
329 u32 tsc_ctc_ratio_n, tsc_ctc_ratio_d;
330 unsigned long max_non_turbo_ratio;
331 size_t filter_str_len;
336 if (priv_size != ptr->priv_size)
339 intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &tsc_bit);
340 intel_pt_parse_terms(&intel_pt_pmu->format, "noretcomp",
342 intel_pt_parse_terms(&intel_pt_pmu->format, "mtc", &mtc_bit);
343 mtc_freq_bits = perf_pmu__format_bits(&intel_pt_pmu->format,
345 intel_pt_parse_terms(&intel_pt_pmu->format, "cyc", &cyc_bit);
347 intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d);
349 if (perf_pmu__scan_file(intel_pt_pmu, "max_nonturbo_ratio",
350 "%lu", &max_non_turbo_ratio) != 1)
351 max_non_turbo_ratio = 0;
353 filter = intel_pt_find_filter(session->evlist, ptr->intel_pt_pmu);
354 filter_str_len = filter ? strlen(filter) : 0;
356 if (!session->evlist->core.nr_mmaps)
359 pc = session->evlist->mmap[0].core.base;
361 err = perf_read_tsc_conversion(pc, &tc);
363 if (err != -EOPNOTSUPP)
366 cap_user_time_zero = tc.time_mult != 0;
368 if (!cap_user_time_zero)
369 ui__warning("Intel Processor Trace: TSC not available\n");
372 per_cpu_mmaps = !perf_cpu_map__empty(session->evlist->core.cpus);
374 auxtrace_info->type = PERF_AUXTRACE_INTEL_PT;
375 auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type;
376 auxtrace_info->priv[INTEL_PT_TIME_SHIFT] = tc.time_shift;
377 auxtrace_info->priv[INTEL_PT_TIME_MULT] = tc.time_mult;
378 auxtrace_info->priv[INTEL_PT_TIME_ZERO] = tc.time_zero;
379 auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO] = cap_user_time_zero;
380 auxtrace_info->priv[INTEL_PT_TSC_BIT] = tsc_bit;
381 auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT] = noretcomp_bit;
382 auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH] = ptr->have_sched_switch;
383 auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE] = ptr->snapshot_mode;
384 auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS] = per_cpu_mmaps;
385 auxtrace_info->priv[INTEL_PT_MTC_BIT] = mtc_bit;
386 auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS] = mtc_freq_bits;
387 auxtrace_info->priv[INTEL_PT_TSC_CTC_N] = tsc_ctc_ratio_n;
388 auxtrace_info->priv[INTEL_PT_TSC_CTC_D] = tsc_ctc_ratio_d;
389 auxtrace_info->priv[INTEL_PT_CYC_BIT] = cyc_bit;
390 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO] = max_non_turbo_ratio;
391 auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] = filter_str_len;
393 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
395 if (filter_str_len) {
396 size_t len = intel_pt_filter_bytes(filter);
398 strncpy((char *)info, filter, len);
405 static int intel_pt_track_switches(struct evlist *evlist)
407 const char *sched_switch = "sched:sched_switch";
411 if (!perf_evlist__can_select_event(evlist, sched_switch))
414 err = parse_events(evlist, sched_switch, NULL);
416 pr_debug2("%s: failed to parse %s, error %d\n",
417 __func__, sched_switch, err);
421 evsel = evlist__last(evlist);
423 perf_evsel__set_sample_bit(evsel, CPU);
424 perf_evsel__set_sample_bit(evsel, TIME);
426 evsel->core.system_wide = true;
427 evsel->no_aux_samples = true;
428 evsel->immediate = true;
433 static void intel_pt_valid_str(char *str, size_t len, u64 valid)
435 unsigned int val, last = 0, state = 1;
440 for (val = 0; val <= 64; val++, valid >>= 1) {
445 p += scnprintf(str + p, len - p, ",");
448 p += scnprintf(str + p, len - p, "%u", val);
463 p += scnprintf(str + p, len - p, ",%u", last);
467 p += scnprintf(str + p, len - p, "-%u", last);
479 static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu,
480 const char *caps, const char *name,
481 const char *supported, u64 config)
485 unsigned long long valid;
489 if (perf_pmu__scan_file(intel_pt_pmu, caps, "%llx", &valid) != 1)
493 perf_pmu__scan_file(intel_pt_pmu, supported, "%d", &ok) == 1 && !ok)
498 bits = perf_pmu__format_bits(&intel_pt_pmu->format, name);
502 for (shift = 0; bits && !(bits & 1); shift++)
510 if (valid & (1 << config))
513 intel_pt_valid_str(valid_str, sizeof(valid_str), valid);
514 pr_err("Invalid %s for %s. Valid values are: %s\n",
515 name, INTEL_PT_PMU_NAME, valid_str);
519 static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu,
529 * If supported, force pass-through config term (pt=1) even if user
530 * sets pt=0, which avoids senseless kernel errors.
532 if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 &&
533 !(evsel->core.attr.config & 1)) {
534 pr_warning("pt=0 doesn't make sense, forcing pt=1\n");
535 evsel->core.attr.config |= 1;
538 err = intel_pt_val_config_term(intel_pt_pmu, "caps/cycle_thresholds",
539 "cyc_thresh", "caps/psb_cyc",
540 evsel->core.attr.config);
544 err = intel_pt_val_config_term(intel_pt_pmu, "caps/mtc_periods",
545 "mtc_period", "caps/mtc",
546 evsel->core.attr.config);
550 return intel_pt_val_config_term(intel_pt_pmu, "caps/psb_periods",
551 "psb_period", "caps/psb_cyc",
552 evsel->core.attr.config);
555 static void intel_pt_config_sample_mode(struct perf_pmu *intel_pt_pmu,
558 struct perf_evsel_config_term *term;
559 u64 user_bits = 0, bits;
561 term = perf_evsel__get_config_term(evsel, CFG_CHG);
563 user_bits = term->val.cfg_chg;
565 bits = perf_pmu__format_bits(&intel_pt_pmu->format, "psb_period");
567 /* Did user change psb_period */
568 if (bits & user_bits)
571 /* Set psb_period to 0 */
572 evsel->core.attr.config &= ~bits;
575 static void intel_pt_min_max_sample_sz(struct evlist *evlist,
576 size_t *min_sz, size_t *max_sz)
580 evlist__for_each_entry(evlist, evsel) {
581 size_t sz = evsel->core.attr.aux_sample_size;
585 if (min_sz && (sz < *min_sz || !*min_sz))
587 if (max_sz && sz > *max_sz)
593 * Currently, there is not enough information to disambiguate different PEBS
594 * events, so only allow one.
596 static bool intel_pt_too_many_aux_output(struct evlist *evlist)
599 int aux_output_cnt = 0;
601 evlist__for_each_entry(evlist, evsel)
602 aux_output_cnt += !!evsel->core.attr.aux_output;
604 if (aux_output_cnt > 1) {
605 pr_err(INTEL_PT_PMU_NAME " supports at most one event with aux-output\n");
612 static int intel_pt_recording_options(struct auxtrace_record *itr,
613 struct evlist *evlist,
614 struct record_opts *opts)
616 struct intel_pt_recording *ptr =
617 container_of(itr, struct intel_pt_recording, itr);
618 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
619 bool have_timing_info, need_immediate = false;
620 struct evsel *evsel, *intel_pt_evsel = NULL;
621 const struct perf_cpu_map *cpus = evlist->core.cpus;
622 bool privileged = perf_event_paranoid_check(-1);
626 ptr->evlist = evlist;
627 ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
629 evlist__for_each_entry(evlist, evsel) {
630 if (evsel->core.attr.type == intel_pt_pmu->type) {
631 if (intel_pt_evsel) {
632 pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n");
635 evsel->core.attr.freq = 0;
636 evsel->core.attr.sample_period = 1;
637 intel_pt_evsel = evsel;
638 opts->full_auxtrace = true;
642 if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) {
643 pr_err("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n");
647 if (opts->auxtrace_snapshot_mode && opts->auxtrace_sample_mode) {
648 pr_err("Snapshot mode (" INTEL_PT_PMU_NAME " PMU) and sample trace cannot be used together\n");
652 if (opts->use_clockid) {
653 pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n");
657 if (intel_pt_too_many_aux_output(evlist))
660 if (!opts->full_auxtrace)
663 if (opts->auxtrace_sample_mode)
664 intel_pt_config_sample_mode(intel_pt_pmu, intel_pt_evsel);
666 err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel);
670 /* Set default sizes for snapshot mode */
671 if (opts->auxtrace_snapshot_mode) {
672 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
674 if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) {
676 opts->auxtrace_mmap_pages = MiB(4) / page_size;
678 opts->auxtrace_mmap_pages = KiB(128) / page_size;
679 if (opts->mmap_pages == UINT_MAX)
680 opts->mmap_pages = KiB(256) / page_size;
682 } else if (!opts->auxtrace_mmap_pages && !privileged &&
683 opts->mmap_pages == UINT_MAX) {
684 opts->mmap_pages = KiB(256) / page_size;
686 if (!opts->auxtrace_snapshot_size)
687 opts->auxtrace_snapshot_size =
688 opts->auxtrace_mmap_pages * (size_t)page_size;
689 if (!opts->auxtrace_mmap_pages) {
690 size_t sz = opts->auxtrace_snapshot_size;
692 sz = round_up(sz, page_size) / page_size;
693 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
695 if (opts->auxtrace_snapshot_size >
696 opts->auxtrace_mmap_pages * (size_t)page_size) {
697 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n",
698 opts->auxtrace_snapshot_size,
699 opts->auxtrace_mmap_pages * (size_t)page_size);
702 if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) {
703 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n");
706 pr_debug2("Intel PT snapshot size: %zu\n",
707 opts->auxtrace_snapshot_size);
709 opts->auxtrace_snapshot_size <= psb_period +
710 INTEL_PT_PSB_PERIOD_NEAR)
711 ui__warning("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n",
712 opts->auxtrace_snapshot_size, psb_period);
715 /* Set default sizes for sample mode */
716 if (opts->auxtrace_sample_mode) {
717 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
718 size_t min_sz = 0, max_sz = 0;
720 intel_pt_min_max_sample_sz(evlist, &min_sz, &max_sz);
721 if (!opts->auxtrace_mmap_pages && !privileged &&
722 opts->mmap_pages == UINT_MAX)
723 opts->mmap_pages = KiB(256) / page_size;
724 if (!opts->auxtrace_mmap_pages) {
725 size_t sz = round_up(max_sz, page_size) / page_size;
727 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
729 if (max_sz > opts->auxtrace_mmap_pages * (size_t)page_size) {
730 pr_err("Sample size %zu must not be greater than AUX area tracing mmap size %zu\n",
732 opts->auxtrace_mmap_pages * (size_t)page_size);
735 pr_debug2("Intel PT min. sample size: %zu max. sample size: %zu\n",
738 min_sz <= psb_period + INTEL_PT_PSB_PERIOD_NEAR)
739 ui__warning("Intel PT sample size (%zu) may be too small for PSB period (%zu)\n",
743 /* Set default sizes for full trace mode */
744 if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) {
746 opts->auxtrace_mmap_pages = MiB(4) / page_size;
748 opts->auxtrace_mmap_pages = KiB(128) / page_size;
749 if (opts->mmap_pages == UINT_MAX)
750 opts->mmap_pages = KiB(256) / page_size;
754 /* Validate auxtrace_mmap_pages */
755 if (opts->auxtrace_mmap_pages) {
756 size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size;
759 if (opts->auxtrace_snapshot_mode || opts->auxtrace_sample_mode)
764 if (sz < min_sz || !is_power_of_2(sz)) {
765 pr_err("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n",
771 intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &tsc_bit);
773 if (opts->full_auxtrace && (intel_pt_evsel->core.attr.config & tsc_bit))
774 have_timing_info = true;
776 have_timing_info = false;
779 * Per-cpu recording needs sched_switch events to distinguish different
782 if (have_timing_info && !perf_cpu_map__empty(cpus)) {
783 if (perf_can_record_switch_events()) {
784 bool cpu_wide = !target__none(&opts->target) &&
785 !target__has_task(&opts->target);
787 if (!cpu_wide && perf_can_record_cpu_wide()) {
788 struct evsel *switch_evsel;
790 err = parse_events(evlist, "dummy:u", NULL);
794 switch_evsel = evlist__last(evlist);
796 switch_evsel->core.attr.freq = 0;
797 switch_evsel->core.attr.sample_period = 1;
798 switch_evsel->core.attr.context_switch = 1;
800 switch_evsel->core.system_wide = true;
801 switch_evsel->no_aux_samples = true;
802 switch_evsel->immediate = true;
804 perf_evsel__set_sample_bit(switch_evsel, TID);
805 perf_evsel__set_sample_bit(switch_evsel, TIME);
806 perf_evsel__set_sample_bit(switch_evsel, CPU);
807 perf_evsel__reset_sample_bit(switch_evsel, BRANCH_STACK);
809 opts->record_switch_events = false;
810 ptr->have_sched_switch = 3;
812 opts->record_switch_events = true;
813 need_immediate = true;
815 ptr->have_sched_switch = 3;
817 ptr->have_sched_switch = 2;
820 err = intel_pt_track_switches(evlist);
822 pr_debug2("Unable to select sched:sched_switch\n");
826 ptr->have_sched_switch = 1;
830 if (intel_pt_evsel) {
832 * To obtain the auxtrace buffer file descriptor, the auxtrace
833 * event must come first.
835 perf_evlist__to_front(evlist, intel_pt_evsel);
837 * In the case of per-cpu mmaps, we need the CPU on the
840 if (!perf_cpu_map__empty(cpus))
841 perf_evsel__set_sample_bit(intel_pt_evsel, CPU);
844 /* Add dummy event to keep tracking */
845 if (opts->full_auxtrace) {
846 struct evsel *tracking_evsel;
848 err = parse_events(evlist, "dummy:u", NULL);
852 tracking_evsel = evlist__last(evlist);
854 perf_evlist__set_tracking_event(evlist, tracking_evsel);
856 tracking_evsel->core.attr.freq = 0;
857 tracking_evsel->core.attr.sample_period = 1;
859 tracking_evsel->no_aux_samples = true;
861 tracking_evsel->immediate = true;
863 /* In per-cpu case, always need the time of mmap events etc */
864 if (!perf_cpu_map__empty(cpus)) {
865 perf_evsel__set_sample_bit(tracking_evsel, TIME);
866 /* And the CPU for switch events */
867 perf_evsel__set_sample_bit(tracking_evsel, CPU);
869 perf_evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK);
873 * Warn the user when we do not have enough information to decode i.e.
874 * per-cpu with no sched_switch (except workload-only).
876 if (!ptr->have_sched_switch && !perf_cpu_map__empty(cpus) &&
877 !target__none(&opts->target))
878 ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n");
883 static int intel_pt_snapshot_start(struct auxtrace_record *itr)
885 struct intel_pt_recording *ptr =
886 container_of(itr, struct intel_pt_recording, itr);
889 evlist__for_each_entry(ptr->evlist, evsel) {
890 if (evsel->core.attr.type == ptr->intel_pt_pmu->type)
891 return evsel__disable(evsel);
896 static int intel_pt_snapshot_finish(struct auxtrace_record *itr)
898 struct intel_pt_recording *ptr =
899 container_of(itr, struct intel_pt_recording, itr);
902 evlist__for_each_entry(ptr->evlist, evsel) {
903 if (evsel->core.attr.type == ptr->intel_pt_pmu->type)
904 return evsel__enable(evsel);
909 static int intel_pt_alloc_snapshot_refs(struct intel_pt_recording *ptr, int idx)
911 const size_t sz = sizeof(struct intel_pt_snapshot_ref);
912 int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt * 2;
913 struct intel_pt_snapshot_ref *refs;
918 while (new_cnt <= idx)
921 refs = calloc(new_cnt, sz);
925 memcpy(refs, ptr->snapshot_refs, cnt * sz);
927 ptr->snapshot_refs = refs;
928 ptr->snapshot_ref_cnt = new_cnt;
933 static void intel_pt_free_snapshot_refs(struct intel_pt_recording *ptr)
937 for (i = 0; i < ptr->snapshot_ref_cnt; i++)
938 zfree(&ptr->snapshot_refs[i].ref_buf);
939 zfree(&ptr->snapshot_refs);
942 static void intel_pt_recording_free(struct auxtrace_record *itr)
944 struct intel_pt_recording *ptr =
945 container_of(itr, struct intel_pt_recording, itr);
947 intel_pt_free_snapshot_refs(ptr);
951 static int intel_pt_alloc_snapshot_ref(struct intel_pt_recording *ptr, int idx,
952 size_t snapshot_buf_size)
954 size_t ref_buf_size = ptr->snapshot_ref_buf_size;
957 ref_buf = zalloc(ref_buf_size);
961 ptr->snapshot_refs[idx].ref_buf = ref_buf;
962 ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size;
967 static size_t intel_pt_snapshot_ref_buf_size(struct intel_pt_recording *ptr,
968 size_t snapshot_buf_size)
970 const size_t max_size = 256 * 1024;
971 size_t buf_size = 0, psb_period;
973 if (ptr->snapshot_size <= 64 * 1024)
976 psb_period = intel_pt_psb_period(ptr->intel_pt_pmu, ptr->evlist);
978 buf_size = psb_period * 2;
980 if (!buf_size || buf_size > max_size)
983 if (buf_size >= snapshot_buf_size)
986 if (buf_size >= ptr->snapshot_size / 2)
992 static int intel_pt_snapshot_init(struct intel_pt_recording *ptr,
993 size_t snapshot_buf_size)
995 if (ptr->snapshot_init_done)
998 ptr->snapshot_init_done = true;
1000 ptr->snapshot_ref_buf_size = intel_pt_snapshot_ref_buf_size(ptr,
1007 * intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer.
1008 * @buf1: first buffer
1009 * @compare_size: number of bytes to compare
1010 * @buf2: second buffer (a circular buffer)
1011 * @offs2: offset in second buffer
1012 * @buf2_size: size of second buffer
1014 * The comparison allows for the possibility that the bytes to compare in the
1015 * circular buffer are not contiguous. It is assumed that @compare_size <=
1016 * @buf2_size. This function returns %false if the bytes are identical, %true
1019 static bool intel_pt_compare_buffers(void *buf1, size_t compare_size,
1020 void *buf2, size_t offs2, size_t buf2_size)
1022 size_t end2 = offs2 + compare_size, part_size;
1024 if (end2 <= buf2_size)
1025 return memcmp(buf1, buf2 + offs2, compare_size);
1027 part_size = end2 - buf2_size;
1028 if (memcmp(buf1, buf2 + offs2, part_size))
1031 compare_size -= part_size;
1033 return memcmp(buf1 + part_size, buf2, compare_size);
1036 static bool intel_pt_compare_ref(void *ref_buf, size_t ref_offset,
1037 size_t ref_size, size_t buf_size,
1038 void *data, size_t head)
1040 size_t ref_end = ref_offset + ref_size;
1042 if (ref_end > buf_size) {
1043 if (head > ref_offset || head < ref_end - buf_size)
1045 } else if (head > ref_offset && head < ref_end) {
1049 return intel_pt_compare_buffers(ref_buf, ref_size, data, ref_offset,
1053 static void intel_pt_copy_ref(void *ref_buf, size_t ref_size, size_t buf_size,
1054 void *data, size_t head)
1056 if (head >= ref_size) {
1057 memcpy(ref_buf, data + head - ref_size, ref_size);
1059 memcpy(ref_buf, data, head);
1061 memcpy(ref_buf + head, data + buf_size - ref_size, ref_size);
1065 static bool intel_pt_wrapped(struct intel_pt_recording *ptr, int idx,
1066 struct auxtrace_mmap *mm, unsigned char *data,
1069 struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx];
1072 wrapped = intel_pt_compare_ref(ref->ref_buf, ref->ref_offset,
1073 ptr->snapshot_ref_buf_size, mm->len,
1076 intel_pt_copy_ref(ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len,
1082 static bool intel_pt_first_wrap(u64 *data, size_t buf_size)
1091 for (i = a; i < b; i++) {
1099 static int intel_pt_find_snapshot(struct auxtrace_record *itr, int idx,
1100 struct auxtrace_mmap *mm, unsigned char *data,
1101 u64 *head, u64 *old)
1103 struct intel_pt_recording *ptr =
1104 container_of(itr, struct intel_pt_recording, itr);
1108 pr_debug3("%s: mmap index %d old head %zu new head %zu\n",
1109 __func__, idx, (size_t)*old, (size_t)*head);
1111 err = intel_pt_snapshot_init(ptr, mm->len);
1115 if (idx >= ptr->snapshot_ref_cnt) {
1116 err = intel_pt_alloc_snapshot_refs(ptr, idx);
1121 if (ptr->snapshot_ref_buf_size) {
1122 if (!ptr->snapshot_refs[idx].ref_buf) {
1123 err = intel_pt_alloc_snapshot_ref(ptr, idx, mm->len);
1127 wrapped = intel_pt_wrapped(ptr, idx, mm, data, *head);
1129 wrapped = ptr->snapshot_refs[idx].wrapped;
1130 if (!wrapped && intel_pt_first_wrap((u64 *)data, mm->len)) {
1131 ptr->snapshot_refs[idx].wrapped = true;
1137 * In full trace mode 'head' continually increases. However in snapshot
1138 * mode 'head' is an offset within the buffer. Here 'old' and 'head'
1139 * are adjusted to match the full trace case which expects that 'old' is
1140 * always less than 'head'.
1154 pr_debug3("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n",
1155 __func__, wrapped ? "" : "not ", (size_t)*old, (size_t)*head);
1160 pr_err("%s: failed, error %d\n", __func__, err);
1164 static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused)
1169 struct auxtrace_record *intel_pt_recording_init(int *err)
1171 struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME);
1172 struct intel_pt_recording *ptr;
1177 if (setenv("JITDUMP_USE_ARCH_TIMESTAMP", "1", 1)) {
1182 ptr = zalloc(sizeof(struct intel_pt_recording));
1188 ptr->intel_pt_pmu = intel_pt_pmu;
1189 ptr->itr.pmu = intel_pt_pmu;
1190 ptr->itr.recording_options = intel_pt_recording_options;
1191 ptr->itr.info_priv_size = intel_pt_info_priv_size;
1192 ptr->itr.info_fill = intel_pt_info_fill;
1193 ptr->itr.free = intel_pt_recording_free;
1194 ptr->itr.snapshot_start = intel_pt_snapshot_start;
1195 ptr->itr.snapshot_finish = intel_pt_snapshot_finish;
1196 ptr->itr.find_snapshot = intel_pt_find_snapshot;
1197 ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options;
1198 ptr->itr.reference = intel_pt_reference;
1199 ptr->itr.read_finish = auxtrace_record__read_finish;
1201 * Decoding starts at a PSB packet. Minimum PSB period is 2K so 4K
1202 * should give at least 1 PSB per sample.
1204 ptr->itr.default_aux_sample_size = 4096;