2 * Copyright (C) 2016 Intel Corporation
3 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
4 * Ramesh Babu K V <ramesh.babu@intel.com>
5 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
6 * Jerome Anand <jerome.anand@intel.com>
8 * Permission is hereby granted, free of charge, to any person obtaining
9 * a copy of this software and associated documentation files
10 * (the "Software"), to deal in the Software without restriction,
11 * including without limitation the rights to use, copy, modify, merge,
12 * publish, distribute, sublicense, and/or sell copies of the Software,
13 * and to permit persons to whom the Software is furnished to do so,
14 * subject to the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial
18 * portions of the Software.
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
23 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
24 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
25 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
26 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 #ifndef _INTEL_HDMI_AUDIO_H_
31 #define _INTEL_HDMI_AUDIO_H_
33 #include "intel_hdmi_lpe_audio.h"
36 #define MAX_PB_STREAMS 1
37 #define MAX_CAP_STREAMS 0
39 #define HDMI_INFO_FRAME_WORD1 0x000a0184
40 #define DP_INFO_FRAME_WORD1 0x00441b84
41 #define FIFO_THRESHOLD 0xFE
42 #define DMA_FIFO_THRESHOLD 0x7
43 #define BYTES_PER_WORD 0x4
45 /* Sampling rate as per IEC60958 Ver 3 */
46 #define CH_STATUS_MAP_32KHZ 0x3
47 #define CH_STATUS_MAP_44KHZ 0x0
48 #define CH_STATUS_MAP_48KHZ 0x2
49 #define CH_STATUS_MAP_88KHZ 0x8
50 #define CH_STATUS_MAP_96KHZ 0xA
51 #define CH_STATUS_MAP_176KHZ 0xC
52 #define CH_STATUS_MAP_192KHZ 0xE
54 #define MAX_SMPL_WIDTH_20 0x0
55 #define MAX_SMPL_WIDTH_24 0x1
56 #define SMPL_WIDTH_16BITS 0x1
57 #define SMPL_WIDTH_24BITS 0x5
58 #define CHANNEL_ALLOCATION 0x1F
59 #define VALID_DIP_WORDS 3
62 #define SWAP_LFE_CENTER 0x00fac4c8
63 #define AUD_CONFIG_CH_MASK 0x70
65 struct pcm_stream_info {
66 struct snd_pcm_substream *substream;
67 int substream_refcount;
72 * struct snd_intelhad - intelhad driver structure
74 * @card: ptr to hold card details
75 * @connected: the monitor connection status
76 * @stream_info: stream information
77 * @eld: holds ELD info
78 * @curr_buf: pointer to hold current active ring buf
79 * @valid_buf_cnt: ring buffer count for stream
80 * @had_spinlock: driver lock
81 * @aes_bits: IEC958 status bits
82 * @buff_done: id of current buffer done intr
83 * @dev: platoform device handle
84 * @chmap: holds channel map info
87 struct snd_card *card;
89 struct pcm_stream_info stream_info;
90 unsigned char eld[HDMI_MAX_ELD_BYTES];
92 unsigned int aes_bits;
93 spinlock_t had_spinlock;
95 struct snd_pcm_chmap *chmap;
99 /* ring buffer (BD) position index */
100 unsigned int bd_head;
101 /* PCM buffer position indices */
102 unsigned int pcmbuf_head; /* being processed */
103 unsigned int pcmbuf_filled; /* to be filled */
105 unsigned int num_bds; /* number of BDs */
106 unsigned int period_bytes; /* PCM period size in bytes */
110 void __iomem *mmio_start;
111 unsigned int had_config_offset;
112 struct work_struct hdmi_audio_wq;
113 struct mutex mutex; /* for protecting chmap and eld */
116 #endif /* _INTEL_HDMI_AUDIO_ */