1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
11 #ifndef __SOUND_SOC_SOF_PRIV_H
12 #define __SOUND_SOC_SOF_PRIV_H
14 #include <linux/device.h>
16 #include <sound/hdaudio.h>
17 #include <sound/soc.h>
18 #include <sound/control.h>
20 #include <sound/sof.h>
21 #include <sound/sof/stream.h> /* needs to be included before control.h */
22 #include <sound/sof/control.h>
23 #include <sound/sof/dai.h>
24 #include <sound/sof/info.h>
25 #include <sound/sof/pm.h>
26 #include <sound/sof/topology.h>
27 #include <sound/sof/trace.h>
29 #include <uapi/sound/sof/fw.h>
32 #define SOF_DBG_ENABLE_TRACE BIT(0)
33 #define SOF_DBG_REGS BIT(1)
34 #define SOF_DBG_MBOX BIT(2)
35 #define SOF_DBG_TEXT BIT(3)
36 #define SOF_DBG_PCI BIT(4)
37 #define SOF_DBG_RETAIN_CTX BIT(5) /* prevent DSP D3 on FW exception */
39 /* global debug state set by SOF_DBG_ flags */
40 extern int sof_core_debug;
42 /* max BARs mmaped devices can use */
43 #define SND_SOF_BARS 8
45 /* time in ms for runtime suspend delay */
46 #define SND_SOF_SUSPEND_DELAY_MS 2000
48 /* DMA buffer size for trace */
49 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
51 /* max number of FE PCMs before BEs */
52 #define SOF_BE_PCM_BASE 16
54 #define SOF_IPC_DSP_REPLY 0
55 #define SOF_IPC_HOST_REPLY 1
57 /* convenience constructor for DAI driver streams */
58 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
59 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
60 .rates = srates, .formats = sfmt}
62 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
63 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
65 #define ENABLE_DEBUGFS_CACHEBUF \
66 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \
67 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST))
69 #define DMA_CHAN_INVALID 0xFFFFFFFF
71 /* DSP D0ix sub-state */
72 enum sof_d0_substate {
73 SOF_DSP_D0I0 = 0, /* DSP default D0 substate */
74 SOF_DSP_D0I3, /* DSP D0i3(low power) substate*/
78 struct snd_sof_ipc_msg;
80 struct snd_sof_debugfs_map;
81 struct snd_soc_tplg_ops;
82 struct snd_soc_component;
86 * SOF DSP HW abstraction operations.
87 * Used to abstract DSP HW architecture and any IO busses between host CPU
90 struct snd_sof_dsp_ops {
92 /* probe and remove */
93 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
94 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
96 /* DSP core boot / reset */
97 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
98 int (*stall)(struct snd_sof_dev *sof_dev); /* optional */
99 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
100 int (*core_power_up)(struct snd_sof_dev *sof_dev,
101 unsigned int core_mask); /* optional */
102 int (*core_power_down)(struct snd_sof_dev *sof_dev,
103 unsigned int core_mask); /* optional */
106 * Register IO: only used by respective drivers themselves,
107 * TODO: consider removing these operations and calling respective
108 * implementations directly
110 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
111 u32 value); /* optional */
112 u32 (*read)(struct snd_sof_dev *sof_dev,
113 void __iomem *addr); /* optional */
114 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
115 u64 value); /* optional */
116 u64 (*read64)(struct snd_sof_dev *sof_dev,
117 void __iomem *addr); /* optional */
120 void (*block_read)(struct snd_sof_dev *sof_dev, u32 bar,
121 u32 offset, void *dest,
122 size_t size); /* mandatory */
123 void (*block_write)(struct snd_sof_dev *sof_dev, u32 bar,
124 u32 offset, void *src,
125 size_t size); /* mandatory */
128 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
129 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
132 int (*send_msg)(struct snd_sof_dev *sof_dev,
133 struct snd_sof_ipc_msg *msg); /* mandatory */
136 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
137 int (*load_module)(struct snd_sof_dev *sof_dev,
138 struct snd_sof_mod_hdr *hdr); /* optional */
140 * FW ready checks for ABI compatibility and creates
141 * memory windows at first boot
143 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */
145 /* connect pcm substream to a host stream */
146 int (*pcm_open)(struct snd_sof_dev *sdev,
147 struct snd_pcm_substream *substream); /* optional */
148 /* disconnect pcm substream to a host stream */
149 int (*pcm_close)(struct snd_sof_dev *sdev,
150 struct snd_pcm_substream *substream); /* optional */
152 /* host stream hw params */
153 int (*pcm_hw_params)(struct snd_sof_dev *sdev,
154 struct snd_pcm_substream *substream,
155 struct snd_pcm_hw_params *params,
156 struct sof_ipc_stream_params *ipc_params); /* optional */
158 /* host stream hw_free */
159 int (*pcm_hw_free)(struct snd_sof_dev *sdev,
160 struct snd_pcm_substream *substream); /* optional */
162 /* host stream trigger */
163 int (*pcm_trigger)(struct snd_sof_dev *sdev,
164 struct snd_pcm_substream *substream,
165 int cmd); /* optional */
167 /* host stream pointer */
168 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
169 struct snd_pcm_substream *substream); /* optional */
171 /* host read DSP stream data */
172 void (*ipc_msg_data)(struct snd_sof_dev *sdev,
173 struct snd_pcm_substream *substream,
174 void *p, size_t sz); /* mandatory */
176 /* host configure DSP HW parameters */
177 int (*ipc_pcm_params)(struct snd_sof_dev *sdev,
178 struct snd_pcm_substream *substream,
179 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */
181 /* pre/post firmware run */
182 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
183 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
186 int (*suspend)(struct snd_sof_dev *sof_dev); /* optional */
187 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
188 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
189 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
190 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
191 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
192 int (*set_power_state)(struct snd_sof_dev *sdev,
193 enum sof_d0_substate d0_substate); /* optional */
196 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
199 const struct snd_sof_debugfs_map *debug_map; /* optional */
200 int debug_map_count; /* optional */
201 void (*dbg_dump)(struct snd_sof_dev *sof_dev,
202 u32 flags); /* optional */
203 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
205 /* host DMA trace initialization */
206 int (*trace_init)(struct snd_sof_dev *sdev,
207 u32 *stream_tag); /* optional */
208 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
209 int (*trace_trigger)(struct snd_sof_dev *sdev,
210 int cmd); /* optional */
213 int (*get_bar_index)(struct snd_sof_dev *sdev,
214 u32 type); /* optional */
215 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
216 int (*get_window_offset)(struct snd_sof_dev *sdev,
217 u32 id);/* mandatory for common loader code */
220 struct snd_soc_dai_driver *drv;
223 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
227 /* DSP architecture specific callbacks for oops and stack dumps */
228 struct sof_arch_ops {
229 void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops);
230 void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops,
231 u32 *stack, u32 stack_words);
234 #define sof_arch_ops(sdev) ((sdev)->pdata->desc->arch_ops)
236 /* DSP device HW descriptor mapping between bus ID and ops */
237 struct sof_ops_table {
238 const struct sof_dev_desc *desc;
239 const struct snd_sof_dsp_ops *ops;
242 enum sof_dfsentry_type {
243 SOF_DFSENTRY_TYPE_IOMEM = 0,
244 SOF_DFSENTRY_TYPE_BUF,
247 enum sof_debugfs_access_type {
248 SOF_DEBUGFS_ACCESS_ALWAYS = 0,
249 SOF_DEBUGFS_ACCESS_D0_ONLY,
252 /* FS entry for debug files that can expose DSP memories, registers */
253 struct snd_sof_dfsentry {
255 enum sof_dfsentry_type type;
257 * access_type specifies if the
258 * memory -> DSP resource (memory, register etc) is always accessible
259 * or if it is accessible only when the DSP is in D0.
261 enum sof_debugfs_access_type access_type;
262 #if ENABLE_DEBUGFS_CACHEBUF
263 char *cache_buf; /* buffer to cache the contents of debugfs memory */
265 struct snd_sof_dev *sdev;
266 struct list_head list; /* list in sdev dfsentry list */
268 void __iomem *io_mem;
273 /* Debug mapping for any DSP memory or registers that can used for debug */
274 struct snd_sof_debugfs_map {
280 * access_type specifies if the memory is always accessible
281 * or if it is accessible only when the DSP is in D0.
283 enum sof_debugfs_access_type access_type;
286 /* mailbox descriptor, used for host <-> DSP IPC */
287 struct snd_sof_mailbox {
292 /* IPC message descriptor for host <-> DSP IO */
293 struct snd_sof_ipc_msg {
302 wait_queue_head_t waitq;
306 /* PCM stream, mapped to FW component */
307 struct snd_sof_pcm_stream {
309 struct snd_dma_buffer page_table;
310 struct sof_ipc_stream_posn posn;
311 struct snd_pcm_substream *substream;
312 struct work_struct period_elapsed_work;
313 bool d0i3_compatible; /* DSP can be in D0I3 when this pcm is opened */
315 * flag to indicate that the DSP pipelines should be kept
316 * active or not while suspending the stream
318 bool suspend_ignored;
321 /* ALSA SOF PCM device */
323 struct snd_sof_dev *sdev;
324 struct snd_soc_tplg_pcm pcm;
325 struct snd_sof_pcm_stream stream[2];
326 struct list_head list; /* list in sdev pcm list */
327 struct snd_pcm_hw_params params[2];
328 bool prepared[2]; /* PCM_PARAMS set successfully */
331 struct snd_sof_led_control {
332 unsigned int use_led;
333 unsigned int direction;
334 unsigned int led_value;
337 /* ALSA SOF Kcontrol device */
338 struct snd_sof_control {
339 struct snd_sof_dev *sdev;
341 int min_volume_step; /* min volume step for volume_table */
342 int max_volume_step; /* max volume step for volume_table */
344 u32 readback_offset; /* offset to mmaped data if used */
345 struct sof_ipc_ctrl_data *control_data;
346 u32 size; /* cdata size */
347 enum sof_ipc_ctrl_cmd cmd;
348 u32 *volume_table; /* volume table computed from tlv data*/
350 struct list_head list; /* list in sdev control list */
352 struct snd_sof_led_control led_ctl;
355 /* ASoC SOF DAPM widget */
356 struct snd_sof_widget {
357 struct snd_sof_dev *sdev;
363 struct snd_soc_dapm_widget *widget;
364 struct list_head list; /* list in sdev widget list */
366 void *private; /* core does not touch this */
369 /* ASoC SOF DAPM route */
370 struct snd_sof_route {
371 struct snd_sof_dev *sdev;
373 struct snd_soc_dapm_route *route;
374 struct list_head list; /* list in sdev route list */
379 /* ASoC DAI device */
381 struct snd_sof_dev *sdev;
383 const char *cpu_dai_name;
385 struct sof_ipc_comp_dai comp_dai;
386 struct sof_ipc_dai_config *dai_config;
387 struct list_head list; /* list in sdev dai list */
395 spinlock_t ipc_lock; /* lock for IPC users */
396 spinlock_t hw_lock; /* lock for HW IO access */
399 * ASoC components. plat_drv fields are set dynamically so
402 struct snd_soc_component_driver plat_drv;
404 /* power states related */
405 enum sof_d0_substate d0_substate;
406 /* flag to track if the intended power target of suspend is S0ix */
409 /* DSP firmware boot */
410 wait_queue_head_t boot_wait;
414 /* work queue in case the probe is implemented in two steps */
415 struct work_struct probe_work;
417 /* DSP HW differentiation */
418 struct snd_sof_pdata *pdata;
421 struct snd_sof_ipc *ipc;
422 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */
423 struct snd_sof_mailbox host_box; /* Host initiated IPC */
424 struct snd_sof_mailbox stream_box; /* Stream position update */
425 struct snd_sof_ipc_msg *msg;
427 u32 next_comp_id; /* monotonic - reset during S3 */
429 /* memory bases for mmaped DSPs - set by dsp_init() */
430 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */
433 size_t dsp_oops_offset;
436 struct dentry *debugfs_root;
437 struct list_head dfsentry_list;
439 /* firmware loader */
440 struct snd_dma_buffer dmab;
441 struct snd_dma_buffer dmab_bdl;
442 struct sof_ipc_fw_ready fw_ready;
443 struct sof_ipc_fw_version fw_version;
446 struct snd_soc_tplg_ops *tplg_ops;
447 struct list_head pcm_list;
448 struct list_head kcontrol_list;
449 struct list_head widget_list;
450 struct list_head dai_list;
451 struct list_head route_list;
452 struct snd_soc_component *component;
453 u32 enabled_cores_mask; /* keep track of enabled cores */
455 /* FW configuration */
456 struct sof_ipc_dma_buffer_data *info_buffer;
457 struct sof_ipc_window *info_window;
459 /* IPC timeouts in ms */
463 /* Wait queue for code loading */
464 wait_queue_head_t waitq;
468 struct snd_dma_buffer dmatb;
469 struct snd_dma_buffer dmatp;
471 wait_queue_head_t trace_sleep;
473 u32 dtrace_is_supported; /* set with Kconfig or module parameter */
474 u32 dtrace_is_enabled;
480 void *private; /* core does not touch this */
487 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
488 int snd_sof_device_remove(struct device *dev);
490 int snd_sof_runtime_suspend(struct device *dev);
491 int snd_sof_runtime_resume(struct device *dev);
492 int snd_sof_runtime_idle(struct device *dev);
493 int snd_sof_resume(struct device *dev);
494 int snd_sof_suspend(struct device *dev);
495 int snd_sof_prepare(struct device *dev);
496 void snd_sof_complete(struct device *dev);
497 int snd_sof_set_d0_substate(struct snd_sof_dev *sdev,
498 enum sof_d0_substate d0_substate);
500 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
502 int snd_sof_create_page_table(struct device *dev,
503 struct snd_dma_buffer *dmab,
504 unsigned char *page_table, size_t size);
509 int snd_sof_load_firmware(struct snd_sof_dev *sdev);
510 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
511 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
512 int snd_sof_run_firmware(struct snd_sof_dev *sdev);
513 int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev,
514 struct snd_sof_mod_hdr *module);
515 void snd_sof_fw_unload(struct snd_sof_dev *sdev);
516 int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset);
519 * IPC low level APIs.
521 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
522 void snd_sof_ipc_free(struct snd_sof_dev *sdev);
523 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
524 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev);
525 int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev,
526 struct sof_ipc_pcm_params *params);
527 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox,
528 size_t dspbox_size, u32 hostbox,
529 size_t hostbox_size);
530 int snd_sof_ipc_valid(struct snd_sof_dev *sdev);
531 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
532 void *msg_data, size_t msg_bytes, void *reply_data,
534 struct snd_sof_widget *snd_sof_find_swidget(struct snd_sof_dev *sdev,
536 struct snd_sof_widget *snd_sof_find_swidget_sname(struct snd_sof_dev *sdev,
537 const char *pcm_name,
539 struct snd_sof_dai *snd_sof_find_dai(struct snd_sof_dev *sdev,
543 struct snd_sof_pcm *snd_sof_find_spcm_dai(struct snd_sof_dev *sdev,
544 struct snd_soc_pcm_runtime *rtd)
546 struct snd_sof_pcm *spcm = NULL;
548 list_for_each_entry(spcm, &sdev->pcm_list, list) {
549 if (le32_to_cpu(spcm->pcm.dai_id) == rtd->dai_link->id)
556 bool snd_sof_dsp_d0i3_on_suspend(struct snd_sof_dev *sdev);
558 struct snd_sof_pcm *snd_sof_find_spcm_name(struct snd_sof_dev *sdev,
560 struct snd_sof_pcm *snd_sof_find_spcm_comp(struct snd_sof_dev *sdev,
561 unsigned int comp_id,
563 struct snd_sof_pcm *snd_sof_find_spcm_pcm_id(struct snd_sof_dev *sdev,
564 unsigned int pcm_id);
565 void snd_sof_pcm_period_elapsed(struct snd_pcm_substream *substream);
570 int snd_sof_ipc_stream_posn(struct snd_sof_dev *sdev,
571 struct snd_sof_pcm *spcm, int direction,
572 struct sof_ipc_stream_posn *posn);
577 int snd_sof_ipc_set_get_comp_data(struct snd_sof_ipc *ipc,
578 struct snd_sof_control *scontrol, u32 ipc_cmd,
579 enum sof_ipc_ctrl_type ctrl_type,
580 enum sof_ipc_ctrl_cmd ctrl_cmd,
585 * There is no snd_sof_free_topology since topology components will
586 * be freed by snd_soc_unregister_component,
588 int snd_sof_load_topology(struct snd_sof_dev *sdev, const char *file);
589 int snd_sof_complete_pipeline(struct snd_sof_dev *sdev,
590 struct snd_sof_widget *swidget);
592 int sof_load_pipeline_ipc(struct snd_sof_dev *sdev,
593 struct sof_ipc_pipe_new *pipeline,
594 struct sof_ipc_comp_reply *r);
599 int snd_sof_init_trace(struct snd_sof_dev *sdev);
600 void snd_sof_release_trace(struct snd_sof_dev *sdev);
601 void snd_sof_free_trace(struct snd_sof_dev *sdev);
602 int snd_sof_dbg_init(struct snd_sof_dev *sdev);
603 void snd_sof_free_debug(struct snd_sof_dev *sdev);
604 int snd_sof_debugfs_io_item(struct snd_sof_dev *sdev,
605 void __iomem *base, size_t size,
607 enum sof_debugfs_access_type access_type);
608 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
609 void *base, size_t size,
610 const char *name, mode_t mode);
611 int snd_sof_trace_update_pos(struct snd_sof_dev *sdev,
612 struct sof_ipc_dma_trace_posn *posn);
613 void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev);
614 void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code,
615 u32 tracep_code, void *oops,
616 struct sof_ipc_panic_info *panic_info,
617 void *stack, size_t stack_words);
618 int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev);
619 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev);
622 * Platform specific ops.
624 extern struct snd_compr_ops sof_compressed_ops;
630 int snd_sof_volume_get(struct snd_kcontrol *kcontrol,
631 struct snd_ctl_elem_value *ucontrol);
632 int snd_sof_volume_put(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_value *ucontrol);
634 int snd_sof_switch_get(struct snd_kcontrol *kcontrol,
635 struct snd_ctl_elem_value *ucontrol);
636 int snd_sof_switch_put(struct snd_kcontrol *kcontrol,
637 struct snd_ctl_elem_value *ucontrol);
638 int snd_sof_enum_get(struct snd_kcontrol *kcontrol,
639 struct snd_ctl_elem_value *ucontrol);
640 int snd_sof_enum_put(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_value *ucontrol);
642 int snd_sof_bytes_get(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_value *ucontrol);
644 int snd_sof_bytes_put(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_value *ucontrol);
646 int snd_sof_bytes_ext_put(struct snd_kcontrol *kcontrol,
647 const unsigned int __user *binary_data,
649 int snd_sof_bytes_ext_get(struct snd_kcontrol *kcontrol,
650 unsigned int __user *binary_data,
656 static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack,
659 if (sof_arch_ops(sdev)->dsp_stack)
660 sof_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words);
663 static inline void sof_oops(struct snd_sof_dev *sdev, void *oops)
665 if (sof_arch_ops(sdev)->dsp_oops)
666 sof_arch_ops(sdev)->dsp_oops(sdev, oops);
669 extern const struct sof_arch_ops sof_xtensa_arch_ops;
674 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
675 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
676 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
677 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
678 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
679 void *message, size_t bytes);
680 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
681 void *message, size_t bytes);
682 void sof_block_write(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *src,
684 void sof_block_read(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *dest,
687 int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id);
689 void intel_ipc_msg_data(struct snd_sof_dev *sdev,
690 struct snd_pcm_substream *substream,
692 int intel_ipc_pcm_params(struct snd_sof_dev *sdev,
693 struct snd_pcm_substream *substream,
694 const struct sof_ipc_pcm_params_reply *reply);
696 int intel_pcm_open(struct snd_sof_dev *sdev,
697 struct snd_pcm_substream *substream);
698 int intel_pcm_close(struct snd_sof_dev *sdev,
699 struct snd_pcm_substream *substream);