sound/soc/samsung/i2s.c

   1 /* sound/soc/samsung/i2s.c
   2  *
   3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
   4  *
   5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
   6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <dt-bindings/sound/samsung-i2s.h>
  14 #include <linux/delay.h>
  15 #include <linux/slab.h>
  16 #include <linux/clk.h>
  17 #include <linux/clk-provider.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/of_device.h>
  22 #include <linux/of_gpio.h>
  23 #include <linux/pm_runtime.h>
  24
  25 #include <sound/soc.h>
  26 #include <sound/pcm_params.h>
  27
  28 #include <linux/platform_data/asoc-s3c.h>
  29
  30 #include "dma.h"
  31 #include "idma.h"
  32 #include "i2s.h"
  33 #include "i2s-regs.h"
  34
  35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  36
  37 #define SAMSUNG_I2S_ID_PRIMARY          1
  38 #define SAMSUNG_I2S_ID_SECONDARY        2
  39
  40 struct samsung_i2s_variant_regs {
  41         unsigned int    bfs_off;
  42         unsigned int    rfs_off;
  43         unsigned int    sdf_off;
  44         unsigned int    txr_off;
  45         unsigned int    rclksrc_off;
  46         unsigned int    mss_off;
  47         unsigned int    cdclkcon_off;
  48         unsigned int    lrp_off;
  49         unsigned int    bfs_mask;
  50         unsigned int    rfs_mask;
  51         unsigned int    ftx0cnt_off;
  52 };
  53
  54 struct samsung_i2s_dai_data {
  55         u32 quirks;
  56         unsigned int pcm_rates;
  57         const struct samsung_i2s_variant_regs *i2s_variant_regs;
  58 };
  59
  60 struct i2s_dai {
  61         /* Platform device for this DAI */
  62         struct platform_device *pdev;
  63
  64         /* Frame Clock */
  65         unsigned frmclk;
  66         /*
  67          * Specifically requested RCLK,BCLK by MACHINE Driver.
  68          * 0 indicates CPU driver is free to choose any value.
  69          */
  70         unsigned rfs, bfs;
  71         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  72         struct i2s_dai *pri_dai;
  73         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  74         struct i2s_dai *sec_dai;
  75 #define DAI_OPENED      (1 << 0) /* Dai is opened */
  76 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
  77         unsigned mode;
  78
  79         /* Driver for this DAI */
  80         struct snd_soc_dai_driver *drv;
  81
  82         /* DMA parameters */
  83         struct snd_dmaengine_dai_dma_data dma_playback;
  84         struct snd_dmaengine_dai_dma_data dma_capture;
  85         struct snd_dmaengine_dai_dma_data idma_playback;
  86         dma_filter_fn filter;
  87
  88         struct samsung_i2s_priv *priv;
  89 };
  90
  91 struct samsung_i2s_priv {
  92         struct platform_device *pdev;
  93         struct platform_device *pdev_sec;
  94
  95         /* Memory mapped SFR region */
  96         void __iomem *addr;
  97
  98         /* Spinlock protecting access to the device's registers */
  99         spinlock_t lock;
 100
 101         /* Lock for cross i/f checks */
 102         spinlock_t pcm_lock;
 103
 104         /* CPU DAIs and their corresponding drivers */
 105         struct i2s_dai *dai;
 106         struct snd_soc_dai_driver *dai_drv;
 107         int num_dais;
 108
 109         /* The I2S controller's core clock */
 110         struct clk *clk;
 111
 112         /* Clock for generating I2S signals */
 113         struct clk *op_clk;
 114
 115         /* Rate of RCLK source clock */
 116         unsigned long rclk_srcrate;
 117
 118         /* Cache of selected I2S registers for system suspend */
 119         u32 suspend_i2smod;
 120         u32 suspend_i2scon;
 121         u32 suspend_i2spsr;
 122
 123         const struct samsung_i2s_variant_regs *variant_regs;
 124         u32 quirks;
 125
 126         /* The clock provider's data */
 127         struct clk *clk_table[3];
 128         struct clk_onecell_data clk_data;
 129 };
 130
 131 /* Returns true if this is the 'overlay' stereo DAI */
 132 static inline bool is_secondary(struct i2s_dai *i2s)
 133 {
 134         return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY;
 135 }
 136
 137 /* If operating in SoC-Slave mode */
 138 static inline bool is_slave(struct i2s_dai *i2s)
 139 {
 140         struct samsung_i2s_priv *priv = i2s->priv;
 141
 142         u32 mod = readl(priv->addr + I2SMOD);
 143         return (mod & (1 << priv->variant_regs->mss_off)) ? true : false;
 144 }
 145
 146 /* If this interface of the controller is transmitting data */
 147 static inline bool tx_active(struct i2s_dai *i2s)
 148 {
 149         u32 active;
 150
 151         if (!i2s)
 152                 return false;
 153
 154         active = readl(i2s->priv->addr + I2SCON);
 155
 156         if (is_secondary(i2s))
 157                 active &= CON_TXSDMA_ACTIVE;
 158         else
 159                 active &= CON_TXDMA_ACTIVE;
 160
 161         return active ? true : false;
 162 }
 163
 164 /* Return pointer to the other DAI */
 165 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
 166 {
 167         return i2s->pri_dai ? : i2s->sec_dai;
 168 }
 169
 170 /* If the other interface of the controller is transmitting data */
 171 static inline bool other_tx_active(struct i2s_dai *i2s)
 172 {
 173         struct i2s_dai *other = get_other_dai(i2s);
 174
 175         return tx_active(other);
 176 }
 177
 178 /* If any interface of the controller is transmitting data */
 179 static inline bool any_tx_active(struct i2s_dai *i2s)
 180 {
 181         return tx_active(i2s) || other_tx_active(i2s);
 182 }
 183
 184 /* If this interface of the controller is receiving data */
 185 static inline bool rx_active(struct i2s_dai *i2s)
 186 {
 187         u32 active;
 188
 189         if (!i2s)
 190                 return false;
 191
 192         active = readl(i2s->priv->addr + I2SCON) & CON_RXDMA_ACTIVE;
 193
 194         return active ? true : false;
 195 }
 196
 197 /* If the other interface of the controller is receiving data */
 198 static inline bool other_rx_active(struct i2s_dai *i2s)
 199 {
 200         struct i2s_dai *other = get_other_dai(i2s);
 201
 202         return rx_active(other);
 203 }
 204
 205 /* If any interface of the controller is receiving data */
 206 static inline bool any_rx_active(struct i2s_dai *i2s)
 207 {
 208         return rx_active(i2s) || other_rx_active(i2s);
 209 }
 210
 211 /* If the other DAI is transmitting or receiving data */
 212 static inline bool other_active(struct i2s_dai *i2s)
 213 {
 214         return other_rx_active(i2s) || other_tx_active(i2s);
 215 }
 216
 217 /* If this DAI is transmitting or receiving data */
 218 static inline bool this_active(struct i2s_dai *i2s)
 219 {
 220         return tx_active(i2s) || rx_active(i2s);
 221 }
 222
 223 /* If the controller is active anyway */
 224 static inline bool any_active(struct i2s_dai *i2s)
 225 {
 226         return this_active(i2s) || other_active(i2s);
 227 }
 228
 229 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
 230 {
 231         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 232
 233         return &priv->dai[dai->id - 1];
 234 }
 235
 236 static inline bool is_opened(struct i2s_dai *i2s)
 237 {
 238         if (i2s && (i2s->mode & DAI_OPENED))
 239                 return true;
 240         else
 241                 return false;
 242 }
 243
 244 static inline bool is_manager(struct i2s_dai *i2s)
 245 {
 246         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
 247                 return true;
 248         else
 249                 return false;
 250 }
 251
 252 /* Read RCLK of I2S (in multiples of LRCLK) */
 253 static inline unsigned get_rfs(struct i2s_dai *i2s)
 254 {
 255         struct samsung_i2s_priv *priv = i2s->priv;
 256         u32 rfs;
 257
 258         rfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->rfs_off;
 259         rfs &= priv->variant_regs->rfs_mask;
 260
 261         switch (rfs) {
 262         case 7: return 192;
 263         case 6: return 96;
 264         case 5: return 128;
 265         case 4: return 64;
 266         case 3: return 768;
 267         case 2: return 384;
 268         case 1: return 512;
 269         default: return 256;
 270         }
 271 }
 272
 273 /* Write RCLK of I2S (in multiples of LRCLK) */
 274 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
 275 {
 276         struct samsung_i2s_priv *priv = i2s->priv;
 277         u32 mod = readl(priv->addr + I2SMOD);
 278         int rfs_shift = priv->variant_regs->rfs_off;
 279
 280         mod &= ~(priv->variant_regs->rfs_mask << rfs_shift);
 281
 282         switch (rfs) {
 283         case 192:
 284                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
 285                 break;
 286         case 96:
 287                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
 288                 break;
 289         case 128:
 290                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
 291                 break;
 292         case 64:
 293                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
 294                 break;
 295         case 768:
 296                 mod |= (MOD_RCLK_768FS << rfs_shift);
 297                 break;
 298         case 512:
 299                 mod |= (MOD_RCLK_512FS << rfs_shift);
 300                 break;
 301         case 384:
 302                 mod |= (MOD_RCLK_384FS << rfs_shift);
 303                 break;
 304         default:
 305                 mod |= (MOD_RCLK_256FS << rfs_shift);
 306                 break;
 307         }
 308
 309         writel(mod, priv->addr + I2SMOD);
 310 }
 311
 312 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
 313 static inline unsigned get_bfs(struct i2s_dai *i2s)
 314 {
 315         struct samsung_i2s_priv *priv = i2s->priv;
 316         u32 bfs;
 317
 318         bfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->bfs_off;
 319         bfs &= priv->variant_regs->bfs_mask;
 320
 321         switch (bfs) {
 322         case 8: return 256;
 323         case 7: return 192;
 324         case 6: return 128;
 325         case 5: return 96;
 326         case 4: return 64;
 327         case 3: return 24;
 328         case 2: return 16;
 329         case 1: return 48;
 330         default: return 32;
 331         }
 332 }
 333
 334 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
 335 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
 336 {
 337         struct samsung_i2s_priv *priv = i2s->priv;
 338         u32 mod = readl(priv->addr + I2SMOD);
 339         int tdm = priv->quirks & QUIRK_SUPPORTS_TDM;
 340         int bfs_shift = priv->variant_regs->bfs_off;
 341
 342         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
 343         if (!tdm && bfs > 48) {
 344                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
 345                 return;
 346         }
 347
 348         mod &= ~(priv->variant_regs->bfs_mask << bfs_shift);
 349
 350         switch (bfs) {
 351         case 48:
 352                 mod |= (MOD_BCLK_48FS << bfs_shift);
 353                 break;
 354         case 32:
 355                 mod |= (MOD_BCLK_32FS << bfs_shift);
 356                 break;
 357         case 24:
 358                 mod |= (MOD_BCLK_24FS << bfs_shift);
 359                 break;
 360         case 16:
 361                 mod |= (MOD_BCLK_16FS << bfs_shift);
 362                 break;
 363         case 64:
 364                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
 365                 break;
 366         case 96:
 367                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
 368                 break;
 369         case 128:
 370                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
 371                 break;
 372         case 192:
 373                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
 374                 break;
 375         case 256:
 376                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
 377                 break;
 378         default:
 379                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
 380                 return;
 381         }
 382
 383         writel(mod, priv->addr + I2SMOD);
 384 }
 385
 386 /* Sample-Size */
 387 static inline int get_blc(struct i2s_dai *i2s)
 388 {
 389         int blc = readl(i2s->priv->addr + I2SMOD);
 390
 391         blc = (blc >> 13) & 0x3;
 392
 393         switch (blc) {
 394         case 2: return 24;
 395         case 1: return 8;
 396         default: return 16;
 397         }
 398 }
 399
 400 /* TX Channel Control */
 401 static void i2s_txctrl(struct i2s_dai *i2s, int on)
 402 {
 403         struct samsung_i2s_priv *priv = i2s->priv;
 404         void __iomem *addr = priv->addr;
 405         int txr_off = priv->variant_regs->txr_off;
 406         u32 con = readl(addr + I2SCON);
 407         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 408
 409         if (on) {
 410                 con |= CON_ACTIVE;
 411                 con &= ~CON_TXCH_PAUSE;
 412
 413                 if (is_secondary(i2s)) {
 414                         con |= CON_TXSDMA_ACTIVE;
 415                         con &= ~CON_TXSDMA_PAUSE;
 416                 } else {
 417                         con |= CON_TXDMA_ACTIVE;
 418                         con &= ~CON_TXDMA_PAUSE;
 419                 }
 420
 421                 if (any_rx_active(i2s))
 422                         mod |= 2 << txr_off;
 423                 else
 424                         mod |= 0 << txr_off;
 425         } else {
 426                 if (is_secondary(i2s)) {
 427                         con |=  CON_TXSDMA_PAUSE;
 428                         con &= ~CON_TXSDMA_ACTIVE;
 429                 } else {
 430                         con |=  CON_TXDMA_PAUSE;
 431                         con &= ~CON_TXDMA_ACTIVE;
 432                 }
 433
 434                 if (other_tx_active(i2s)) {
 435                         writel(con, addr + I2SCON);
 436                         return;
 437                 }
 438
 439                 con |=  CON_TXCH_PAUSE;
 440
 441                 if (any_rx_active(i2s))
 442                         mod |= 1 << txr_off;
 443                 else
 444                         con &= ~CON_ACTIVE;
 445         }
 446
 447         writel(mod, addr + I2SMOD);
 448         writel(con, addr + I2SCON);
 449 }
 450
 451 /* RX Channel Control */
 452 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
 453 {
 454         struct samsung_i2s_priv *priv = i2s->priv;
 455         void __iomem *addr = priv->addr;
 456         int txr_off = priv->variant_regs->txr_off;
 457         u32 con = readl(addr + I2SCON);
 458         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 459
 460         if (on) {
 461                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
 462                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
 463
 464                 if (any_tx_active(i2s))
 465                         mod |= 2 << txr_off;
 466                 else
 467                         mod |= 1 << txr_off;
 468         } else {
 469                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
 470                 con &= ~CON_RXDMA_ACTIVE;
 471
 472                 if (any_tx_active(i2s))
 473                         mod |= 0 << txr_off;
 474                 else
 475                         con &= ~CON_ACTIVE;
 476         }
 477
 478         writel(mod, addr + I2SMOD);
 479         writel(con, addr + I2SCON);
 480 }
 481
 482 /* Flush FIFO of an interface */
 483 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
 484 {
 485         void __iomem *fic;
 486         u32 val;
 487
 488         if (!i2s)
 489                 return;
 490
 491         if (is_secondary(i2s))
 492                 fic = i2s->priv->addr + I2SFICS;
 493         else
 494                 fic = i2s->priv->addr + I2SFIC;
 495
 496         /* Flush the FIFO */
 497         writel(readl(fic) | flush, fic);
 498
 499         /* Be patient */
 500         val = msecs_to_loops(1) / 1000; /* 1 usec */
 501         while (--val)
 502                 cpu_relax();
 503
 504         writel(readl(fic) & ~flush, fic);
 505 }
 506
 507 static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs,
 508                           int dir)
 509 {
 510         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 511         struct i2s_dai *i2s = to_info(dai);
 512         struct i2s_dai *other = get_other_dai(i2s);
 513         const struct samsung_i2s_variant_regs *i2s_regs = priv->variant_regs;
 514         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
 515         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
 516         u32 mod, mask, val = 0;
 517         unsigned long flags;
 518         int ret = 0;
 519
 520         pm_runtime_get_sync(dai->dev);
 521
 522         spin_lock_irqsave(&priv->lock, flags);
 523         mod = readl(priv->addr + I2SMOD);
 524         spin_unlock_irqrestore(&priv->lock, flags);
 525
 526         switch (clk_id) {
 527         case SAMSUNG_I2S_OPCLK:
 528                 mask = MOD_OPCLK_MASK;
 529                 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
 530                 break;
 531         case SAMSUNG_I2S_CDCLK:
 532                 mask = 1 << i2s_regs->cdclkcon_off;
 533                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
 534                 if (dir == SND_SOC_CLOCK_IN)
 535                         rfs = 0;
 536
 537                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
 538                                 (any_active(i2s) &&
 539                                 (((dir == SND_SOC_CLOCK_IN)
 540                                         && !(mod & cdcon_mask)) ||
 541                                 ((dir == SND_SOC_CLOCK_OUT)
 542                                         && (mod & cdcon_mask))))) {
 543                         dev_err(&i2s->pdev->dev,
 544                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 545                         ret = -EAGAIN;
 546                         goto err;
 547                 }
 548
 549                 if (dir == SND_SOC_CLOCK_IN)
 550                         val = 1 << i2s_regs->cdclkcon_off;
 551
 552                 i2s->rfs = rfs;
 553                 break;
 554
 555         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
 556         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
 557                 mask = 1 << i2s_regs->rclksrc_off;
 558
 559                 if ((priv->quirks & QUIRK_NO_MUXPSR)
 560                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
 561                         clk_id = 0;
 562                 else
 563                         clk_id = 1;
 564
 565                 if (!any_active(i2s)) {
 566                         if (priv->op_clk && !IS_ERR(priv->op_clk)) {
 567                                 if ((clk_id && !(mod & rsrc_mask)) ||
 568                                         (!clk_id && (mod & rsrc_mask))) {
 569                                         clk_disable_unprepare(priv->op_clk);
 570                                         clk_put(priv->op_clk);
 571                                 } else {
 572                                         priv->rclk_srcrate =
 573                                                 clk_get_rate(priv->op_clk);
 574                                         goto done;
 575                                 }
 576                         }
 577
 578                         if (clk_id)
 579                                 priv->op_clk = clk_get(&i2s->pdev->dev,
 580                                                 "i2s_opclk1");
 581                         else
 582                                 priv->op_clk = clk_get(&i2s->pdev->dev,
 583                                                 "i2s_opclk0");
 584
 585                         if (WARN_ON(IS_ERR(priv->op_clk))) {
 586                                 ret = PTR_ERR(priv->op_clk);
 587                                 priv->op_clk = NULL;
 588                                 goto err;
 589                         }
 590
 591                         ret = clk_prepare_enable(priv->op_clk);
 592                         if (ret) {
 593                                 clk_put(priv->op_clk);
 594                                 priv->op_clk = NULL;
 595                                 goto err;
 596                         }
 597                         priv->rclk_srcrate = clk_get_rate(priv->op_clk);
 598
 599                 } else if ((!clk_id && (mod & rsrc_mask))
 600                                 || (clk_id && !(mod & rsrc_mask))) {
 601                         dev_err(&i2s->pdev->dev,
 602                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 603                         ret = -EAGAIN;
 604                         goto err;
 605                 } else {
 606                         /* Call can't be on the active DAI */
 607                         goto done;
 608                 }
 609
 610                 if (clk_id == 1)
 611                         val = 1 << i2s_regs->rclksrc_off;
 612                 break;
 613         default:
 614                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
 615                 ret = -EINVAL;
 616                 goto err;
 617         }
 618
 619         spin_lock_irqsave(&priv->lock, flags);
 620         mod = readl(priv->addr + I2SMOD);
 621         mod = (mod & ~mask) | val;
 622         writel(mod, priv->addr + I2SMOD);
 623         spin_unlock_irqrestore(&priv->lock, flags);
 624 done:
 625         pm_runtime_put(dai->dev);
 626
 627         return 0;
 628 err:
 629         pm_runtime_put(dai->dev);
 630         return ret;
 631 }
 632
 633 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 634 {
 635         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 636         struct i2s_dai *i2s = to_info(dai);
 637         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
 638         u32 mod, tmp = 0;
 639         unsigned long flags;
 640
 641         lrp_shift = priv->variant_regs->lrp_off;
 642         sdf_shift = priv->variant_regs->sdf_off;
 643         mod_slave = 1 << priv->variant_regs->mss_off;
 644
 645         sdf_mask = MOD_SDF_MASK << sdf_shift;
 646         lrp_rlow = MOD_LR_RLOW << lrp_shift;
 647
 648         /* Format is priority */
 649         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 650         case SND_SOC_DAIFMT_RIGHT_J:
 651                 tmp |= lrp_rlow;
 652                 tmp |= (MOD_SDF_MSB << sdf_shift);
 653                 break;
 654         case SND_SOC_DAIFMT_LEFT_J:
 655                 tmp |= lrp_rlow;
 656                 tmp |= (MOD_SDF_LSB << sdf_shift);
 657                 break;
 658         case SND_SOC_DAIFMT_I2S:
 659                 tmp |= (MOD_SDF_IIS << sdf_shift);
 660                 break;
 661         default:
 662                 dev_err(&i2s->pdev->dev, "Format not supported\n");
 663                 return -EINVAL;
 664         }
 665
 666         /*
 667          * INV flag is relative to the FORMAT flag - if set it simply
 668          * flips the polarity specified by the Standard
 669          */
 670         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 671         case SND_SOC_DAIFMT_NB_NF:
 672                 break;
 673         case SND_SOC_DAIFMT_NB_IF:
 674                 if (tmp & lrp_rlow)
 675                         tmp &= ~lrp_rlow;
 676                 else
 677                         tmp |= lrp_rlow;
 678                 break;
 679         default:
 680                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
 681                 return -EINVAL;
 682         }
 683
 684         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 685         case SND_SOC_DAIFMT_CBM_CFM:
 686                 tmp |= mod_slave;
 687                 break;
 688         case SND_SOC_DAIFMT_CBS_CFS:
 689                 /*
 690                  * Set default source clock in Master mode, only when the
 691                  * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
 692                  * clock configuration assigned in DT is not overwritten.
 693                  */
 694                 if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL)
 695                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
 696                                                         0, SND_SOC_CLOCK_IN);
 697                 break;
 698         default:
 699                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
 700                 return -EINVAL;
 701         }
 702
 703         pm_runtime_get_sync(dai->dev);
 704         spin_lock_irqsave(&priv->lock, flags);
 705         mod = readl(priv->addr + I2SMOD);
 706         /*
 707          * Don't change the I2S mode if any controller is active on this
 708          * channel.
 709          */
 710         if (any_active(i2s) &&
 711                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
 712                 spin_unlock_irqrestore(&priv->lock, flags);
 713                 pm_runtime_put(dai->dev);
 714                 dev_err(&i2s->pdev->dev,
 715                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 716                 return -EAGAIN;
 717         }
 718
 719         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
 720         mod |= tmp;
 721         writel(mod, priv->addr + I2SMOD);
 722         spin_unlock_irqrestore(&priv->lock, flags);
 723         pm_runtime_put(dai->dev);
 724
 725         return 0;
 726 }
 727
 728 static int i2s_hw_params(struct snd_pcm_substream *substream,
 729         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 730 {
 731         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 732         struct i2s_dai *i2s = to_info(dai);
 733         u32 mod, mask = 0, val = 0;
 734         struct clk *rclksrc;
 735         unsigned long flags;
 736
 737         WARN_ON(!pm_runtime_active(dai->dev));
 738
 739         if (!is_secondary(i2s))
 740                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
 741
 742         switch (params_channels(params)) {
 743         case 6:
 744                 val |= MOD_DC2_EN;
 745                 /* fall through */
 746         case 4:
 747                 val |= MOD_DC1_EN;
 748                 break;
 749         case 2:
 750                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 751                         i2s->dma_playback.addr_width = 4;
 752                 else
 753                         i2s->dma_capture.addr_width = 4;
 754                 break;
 755         case 1:
 756                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 757                         i2s->dma_playback.addr_width = 2;
 758                 else
 759                         i2s->dma_capture.addr_width = 2;
 760
 761                 break;
 762         default:
 763                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
 764                                 params_channels(params));
 765                 return -EINVAL;
 766         }
 767
 768         if (is_secondary(i2s))
 769                 mask |= MOD_BLCS_MASK;
 770         else
 771                 mask |= MOD_BLCP_MASK;
 772
 773         if (is_manager(i2s))
 774                 mask |= MOD_BLC_MASK;
 775
 776         switch (params_width(params)) {
 777         case 8:
 778                 if (is_secondary(i2s))
 779                         val |= MOD_BLCS_8BIT;
 780                 else
 781                         val |= MOD_BLCP_8BIT;
 782                 if (is_manager(i2s))
 783                         val |= MOD_BLC_8BIT;
 784                 break;
 785         case 16:
 786                 if (is_secondary(i2s))
 787                         val |= MOD_BLCS_16BIT;
 788                 else
 789                         val |= MOD_BLCP_16BIT;
 790                 if (is_manager(i2s))
 791                         val |= MOD_BLC_16BIT;
 792                 break;
 793         case 24:
 794                 if (is_secondary(i2s))
 795                         val |= MOD_BLCS_24BIT;
 796                 else
 797                         val |= MOD_BLCP_24BIT;
 798                 if (is_manager(i2s))
 799                         val |= MOD_BLC_24BIT;
 800                 break;
 801         default:
 802                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
 803                                 params_format(params));
 804                 return -EINVAL;
 805         }
 806
 807         spin_lock_irqsave(&priv->lock, flags);
 808         mod = readl(priv->addr + I2SMOD);
 809         mod = (mod & ~mask) | val;
 810         writel(mod, priv->addr + I2SMOD);
 811         spin_unlock_irqrestore(&priv->lock, flags);
 812
 813         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
 814
 815         i2s->frmclk = params_rate(params);
 816
 817         rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC];
 818         if (rclksrc && !IS_ERR(rclksrc))
 819                 priv->rclk_srcrate = clk_get_rate(rclksrc);
 820
 821         return 0;
 822 }
 823
 824 /* We set constraints on the substream acc to the version of I2S */
 825 static int i2s_startup(struct snd_pcm_substream *substream,
 826           struct snd_soc_dai *dai)
 827 {
 828         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 829         struct i2s_dai *i2s = to_info(dai);
 830         struct i2s_dai *other = get_other_dai(i2s);
 831         unsigned long flags;
 832
 833         pm_runtime_get_sync(dai->dev);
 834
 835         spin_lock_irqsave(&priv->pcm_lock, flags);
 836
 837         i2s->mode |= DAI_OPENED;
 838
 839         if (is_manager(other))
 840                 i2s->mode &= ~DAI_MANAGER;
 841         else
 842                 i2s->mode |= DAI_MANAGER;
 843
 844         if (!any_active(i2s) && (priv->quirks & QUIRK_NEED_RSTCLR))
 845                 writel(CON_RSTCLR, i2s->priv->addr + I2SCON);
 846
 847         spin_unlock_irqrestore(&priv->pcm_lock, flags);
 848
 849         return 0;
 850 }
 851
 852 static void i2s_shutdown(struct snd_pcm_substream *substream,
 853         struct snd_soc_dai *dai)
 854 {
 855         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 856         struct i2s_dai *i2s = to_info(dai);
 857         struct i2s_dai *other = get_other_dai(i2s);
 858         unsigned long flags;
 859
 860         spin_lock_irqsave(&priv->pcm_lock, flags);
 861
 862         i2s->mode &= ~DAI_OPENED;
 863         i2s->mode &= ~DAI_MANAGER;
 864
 865         if (is_opened(other))
 866                 other->mode |= DAI_MANAGER;
 867
 868         /* Reset any constraint on RFS and BFS */
 869         i2s->rfs = 0;
 870         i2s->bfs = 0;
 871
 872         spin_unlock_irqrestore(&priv->pcm_lock, flags);
 873
 874         pm_runtime_put(dai->dev);
 875 }
 876
 877 static int config_setup(struct i2s_dai *i2s)
 878 {
 879         struct samsung_i2s_priv *priv = i2s->priv;
 880         struct i2s_dai *other = get_other_dai(i2s);
 881         unsigned rfs, bfs, blc;
 882         u32 psr;
 883
 884         blc = get_blc(i2s);
 885
 886         bfs = i2s->bfs;
 887
 888         if (!bfs && other)
 889                 bfs = other->bfs;
 890
 891         /* Select least possible multiple(2) if no constraint set */
 892         if (!bfs)
 893                 bfs = blc * 2;
 894
 895         rfs = i2s->rfs;
 896
 897         if (!rfs && other)
 898                 rfs = other->rfs;
 899
 900         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
 901                 dev_err(&i2s->pdev->dev,
 902                         "%d-RFS not supported for 24-blc\n", rfs);
 903                 return -EINVAL;
 904         }
 905
 906         if (!rfs) {
 907                 if (bfs == 16 || bfs == 32)
 908                         rfs = 256;
 909                 else
 910                         rfs = 384;
 911         }
 912
 913         /* If already setup and running */
 914         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
 915                 dev_err(&i2s->pdev->dev,
 916                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 917                 return -EAGAIN;
 918         }
 919
 920         set_bfs(i2s, bfs);
 921         set_rfs(i2s, rfs);
 922
 923         /* Don't bother with PSR in Slave mode */
 924         if (is_slave(i2s))
 925                 return 0;
 926
 927         if (!(priv->quirks & QUIRK_NO_MUXPSR)) {
 928                 psr = priv->rclk_srcrate / i2s->frmclk / rfs;
 929                 writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR);
 930                 dev_dbg(&i2s->pdev->dev,
 931                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
 932                                 priv->rclk_srcrate, psr, rfs, bfs);
 933         }
 934
 935         return 0;
 936 }
 937
 938 static int i2s_trigger(struct snd_pcm_substream *substream,
 939         int cmd, struct snd_soc_dai *dai)
 940 {
 941         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
 942         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
 943         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 944         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
 945         unsigned long flags;
 946
 947         switch (cmd) {
 948         case SNDRV_PCM_TRIGGER_START:
 949         case SNDRV_PCM_TRIGGER_RESUME:
 950         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 951                 pm_runtime_get_sync(dai->dev);
 952                 spin_lock_irqsave(&priv->lock, flags);
 953
 954                 if (config_setup(i2s)) {
 955                         spin_unlock_irqrestore(&priv->lock, flags);
 956                         return -EINVAL;
 957                 }
 958
 959                 if (capture)
 960                         i2s_rxctrl(i2s, 1);
 961                 else
 962                         i2s_txctrl(i2s, 1);
 963
 964                 spin_unlock_irqrestore(&priv->lock, flags);
 965                 break;
 966         case SNDRV_PCM_TRIGGER_STOP:
 967         case SNDRV_PCM_TRIGGER_SUSPEND:
 968         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 969                 spin_lock_irqsave(&priv->lock, flags);
 970
 971                 if (capture) {
 972                         i2s_rxctrl(i2s, 0);
 973                         i2s_fifo(i2s, FIC_RXFLUSH);
 974                 } else {
 975                         i2s_txctrl(i2s, 0);
 976                         i2s_fifo(i2s, FIC_TXFLUSH);
 977                 }
 978
 979                 spin_unlock_irqrestore(&priv->lock, flags);
 980                 pm_runtime_put(dai->dev);
 981                 break;
 982         }
 983
 984         return 0;
 985 }
 986
 987 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
 988         int div_id, int div)
 989 {
 990         struct i2s_dai *i2s = to_info(dai);
 991         struct i2s_dai *other = get_other_dai(i2s);
 992
 993         switch (div_id) {
 994         case SAMSUNG_I2S_DIV_BCLK:
 995                 pm_runtime_get_sync(dai->dev);
 996                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
 997                         || (other && other->bfs && (other->bfs != div))) {
 998                         pm_runtime_put(dai->dev);
 999                         dev_err(&i2s->pdev->dev,
1000                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
1001                         return -EAGAIN;
1002                 }
1003                 i2s->bfs = div;
1004                 pm_runtime_put(dai->dev);
1005                 break;
1006         default:
1007                 dev_err(&i2s->pdev->dev,
1008                         "Invalid clock divider(%d)\n", div_id);
1009                 return -EINVAL;
1010         }
1011
1012         return 0;
1013 }
1014
1015 static snd_pcm_sframes_t
1016 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
1017 {
1018         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1019         struct i2s_dai *i2s = to_info(dai);
1020         u32 reg = readl(priv->addr + I2SFIC);
1021         snd_pcm_sframes_t delay;
1022
1023         WARN_ON(!pm_runtime_active(dai->dev));
1024
1025         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1026                 delay = FIC_RXCOUNT(reg);
1027         else if (is_secondary(i2s))
1028                 delay = FICS_TXCOUNT(readl(priv->addr + I2SFICS));
1029         else
1030                 delay = (reg >> priv->variant_regs->ftx0cnt_off) & 0x7f;
1031
1032         return delay;
1033 }
1034
1035 #ifdef CONFIG_PM
1036 static int i2s_suspend(struct snd_soc_dai *dai)
1037 {
1038         return pm_runtime_force_suspend(dai->dev);
1039 }
1040
1041 static int i2s_resume(struct snd_soc_dai *dai)
1042 {
1043         return pm_runtime_force_resume(dai->dev);
1044 }
1045 #else
1046 #define i2s_suspend NULL
1047 #define i2s_resume  NULL
1048 #endif
1049
1050 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1051 {
1052         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1053         struct i2s_dai *i2s = to_info(dai);
1054         struct i2s_dai *other = get_other_dai(i2s);
1055         unsigned long flags;
1056
1057         pm_runtime_get_sync(dai->dev);
1058
1059         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1060                 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, NULL);
1061         } else {
1062                 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1063                                           &i2s->dma_capture);
1064
1065                 if (priv->quirks & QUIRK_NEED_RSTCLR)
1066                         writel(CON_RSTCLR, priv->addr + I2SCON);
1067
1068                 if (priv->quirks & QUIRK_SUPPORTS_IDMA)
1069                         idma_reg_addr_init(priv->addr,
1070                                            other->idma_playback.addr);
1071         }
1072
1073         /* Reset any constraint on RFS and BFS */
1074         i2s->rfs = 0;
1075         i2s->bfs = 0;
1076
1077         spin_lock_irqsave(&priv->lock, flags);
1078         i2s_txctrl(i2s, 0);
1079         i2s_rxctrl(i2s, 0);
1080         i2s_fifo(i2s, FIC_TXFLUSH);
1081         i2s_fifo(other, FIC_TXFLUSH);
1082         i2s_fifo(i2s, FIC_RXFLUSH);
1083         spin_unlock_irqrestore(&priv->lock, flags);
1084
1085         /* Gate CDCLK by default */
1086         if (!is_opened(other))
1087                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1088                                 0, SND_SOC_CLOCK_IN);
1089         pm_runtime_put(dai->dev);
1090
1091         return 0;
1092 }
1093
1094 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1095 {
1096         struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1097         struct i2s_dai *i2s = to_info(dai);
1098         unsigned long flags;
1099
1100         pm_runtime_get_sync(dai->dev);
1101
1102         if (!is_secondary(i2s)) {
1103                 if (priv->quirks & QUIRK_NEED_RSTCLR) {
1104                         spin_lock_irqsave(&priv->lock, flags);
1105                         writel(0, priv->addr + I2SCON);
1106                         spin_unlock_irqrestore(&priv->lock, flags);
1107                 }
1108         }
1109
1110         pm_runtime_put(dai->dev);
1111
1112         return 0;
1113 }
1114
1115 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1116         .trigger = i2s_trigger,
1117         .hw_params = i2s_hw_params,
1118         .set_fmt = i2s_set_fmt,
1119         .set_clkdiv = i2s_set_clkdiv,
1120         .set_sysclk = i2s_set_sysclk,
1121         .startup = i2s_startup,
1122         .shutdown = i2s_shutdown,
1123         .delay = i2s_delay,
1124 };
1125
1126 static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = {
1127         /* Backend DAI  */
1128         SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1129         SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1130
1131         /* Playback Mixer */
1132         SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
1133 };
1134
1135 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = {
1136         { "Playback Mixer", NULL, "Primary" },
1137         { "Playback Mixer", NULL, "Secondary" },
1138
1139         { "Mixer DAI TX", NULL, "Playback Mixer" },
1140         { "Playback Mixer", NULL, "Mixer DAI RX" },
1141 };
1142
1143 static const struct snd_soc_component_driver samsung_i2s_component = {
1144         .name = "samsung-i2s",
1145
1146         .dapm_widgets = samsung_i2s_widgets,
1147         .num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets),
1148
1149         .dapm_routes = samsung_i2s_dapm_routes,
1150         .num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes),
1151 };
1152
1153 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1154                                         SNDRV_PCM_FMTBIT_S16_LE | \
1155                                         SNDRV_PCM_FMTBIT_S24_LE)
1156
1157 static int i2s_alloc_dais(struct samsung_i2s_priv *priv,
1158                           const struct samsung_i2s_dai_data *i2s_dai_data,
1159                           int num_dais)
1160 {
1161         static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" };
1162         static const char *stream_names[] = { "Primary", "Secondary" };
1163         struct snd_soc_dai_driver *dai_drv;
1164         struct i2s_dai *dai;
1165         int i;
1166
1167         priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais,
1168                                      sizeof(*dai), GFP_KERNEL);
1169         if (!priv->dai)
1170                 return -ENOMEM;
1171
1172         priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais,
1173                                      sizeof(*dai_drv), GFP_KERNEL);
1174         if (!priv->dai_drv)
1175                 return -ENOMEM;
1176
1177         for (i = 0; i < num_dais; i++) {
1178                 dai_drv = &priv->dai_drv[i];
1179
1180                 dai_drv->probe = samsung_i2s_dai_probe;
1181                 dai_drv->remove = samsung_i2s_dai_remove;
1182                 dai_drv->suspend = i2s_suspend;
1183                 dai_drv->resume = i2s_resume;
1184
1185                 dai_drv->symmetric_rates = 1;
1186                 dai_drv->ops = &samsung_i2s_dai_ops;
1187
1188                 dai_drv->playback.channels_min = 1;
1189                 dai_drv->playback.channels_max = 2;
1190                 dai_drv->playback.rates = i2s_dai_data->pcm_rates;
1191                 dai_drv->playback.formats = SAMSUNG_I2S_FMTS;
1192                 dai_drv->playback.stream_name = stream_names[i];
1193
1194                 dai_drv->id = i + 1;
1195                 dai_drv->name = dai_names[i];
1196
1197                 priv->dai[i].drv = &priv->dai_drv[i];
1198                 priv->dai[i].pdev = priv->pdev;
1199         }
1200
1201         /* Initialize capture only for the primary DAI */
1202         dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1];
1203
1204         dai_drv->capture.channels_min = 1;
1205         dai_drv->capture.channels_max = 2;
1206         dai_drv->capture.rates = i2s_dai_data->pcm_rates;
1207         dai_drv->capture.formats = SAMSUNG_I2S_FMTS;
1208
1209         return 0;
1210 }
1211
1212 #ifdef CONFIG_PM
1213 static int i2s_runtime_suspend(struct device *dev)
1214 {
1215         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1216
1217         priv->suspend_i2smod = readl(priv->addr + I2SMOD);
1218         priv->suspend_i2scon = readl(priv->addr + I2SCON);
1219         priv->suspend_i2spsr = readl(priv->addr + I2SPSR);
1220
1221         if (priv->op_clk)
1222                 clk_disable_unprepare(priv->op_clk);
1223         clk_disable_unprepare(priv->clk);
1224
1225         return 0;
1226 }
1227
1228 static int i2s_runtime_resume(struct device *dev)
1229 {
1230         struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1231         int ret;
1232
1233         ret = clk_prepare_enable(priv->clk);
1234         if (ret)
1235                 return ret;
1236
1237         if (priv->op_clk) {
1238                 ret = clk_prepare_enable(priv->op_clk);
1239                 if (ret) {
1240                         clk_disable_unprepare(priv->clk);
1241                         return ret;
1242                 }
1243         }
1244
1245         writel(priv->suspend_i2scon, priv->addr + I2SCON);
1246         writel(priv->suspend_i2smod, priv->addr + I2SMOD);
1247         writel(priv->suspend_i2spsr, priv->addr + I2SPSR);
1248
1249         return 0;
1250 }
1251 #endif /* CONFIG_PM */
1252
1253 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv)
1254 {
1255         int i;
1256
1257         for (i = 0; i < priv->clk_data.clk_num; i++) {
1258                 if (!IS_ERR(priv->clk_table[i]))
1259                         clk_unregister(priv->clk_table[i]);
1260         }
1261 }
1262
1263 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv)
1264 {
1265         of_clk_del_provider(priv->pdev->dev.of_node);
1266         i2s_unregister_clocks(priv);
1267 }
1268
1269
1270 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv)
1271 {
1272
1273         const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
1274         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1275         const char *p_names[2] = { NULL };
1276         struct device *dev = &priv->pdev->dev;
1277         const struct samsung_i2s_variant_regs *reg_info = priv->variant_regs;
1278         const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
1279         struct clk *rclksrc;
1280         int ret, i;
1281
1282         /* Register the clock provider only if it's expected in the DTB */
1283         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1284                 return 0;
1285
1286         /* Get the RCLKSRC mux clock parent clock names */
1287         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1288                 rclksrc = clk_get(dev, clk_name[i]);
1289                 if (IS_ERR(rclksrc))
1290                         continue;
1291                 p_names[i] = __clk_get_name(rclksrc);
1292                 clk_put(rclksrc);
1293         }
1294
1295         for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
1296                 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
1297                                                 dev_name(dev), i2s_clk_desc[i]);
1298                 if (!i2s_clk_name[i])
1299                         return -ENOMEM;
1300         }
1301
1302         if (!(priv->quirks & QUIRK_NO_MUXPSR)) {
1303                 /* Activate the prescaler */
1304                 u32 val = readl(priv->addr + I2SPSR);
1305                 writel(val | PSR_PSREN, priv->addr + I2SPSR);
1306
1307                 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1308                                 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
1309                                 ARRAY_SIZE(p_names),
1310                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1311                                 priv->addr + I2SMOD, reg_info->rclksrc_off,
1312                                 1, 0, &priv->lock);
1313
1314                 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1315                                 i2s_clk_name[CLK_I2S_RCLK_PSR],
1316                                 i2s_clk_name[CLK_I2S_RCLK_SRC],
1317                                 CLK_SET_RATE_PARENT,
1318                                 priv->addr + I2SPSR, 8, 6, 0, &priv->lock);
1319
1320                 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
1321                 priv->clk_data.clk_num = 2;
1322         }
1323
1324         priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
1325                                 i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
1326                                 CLK_SET_RATE_PARENT,
1327                                 priv->addr + I2SMOD, reg_info->cdclkcon_off,
1328                                 CLK_GATE_SET_TO_DISABLE, &priv->lock);
1329
1330         priv->clk_data.clk_num += 1;
1331         priv->clk_data.clks = priv->clk_table;
1332
1333         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1334                                   &priv->clk_data);
1335         if (ret < 0) {
1336                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1337                 i2s_unregister_clocks(priv);
1338         }
1339
1340         return ret;
1341 }
1342
1343 /* Create platform device for the secondary PCM */
1344 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv)
1345 {
1346         struct platform_device *pdev;
1347         int ret;
1348
1349         pdev = platform_device_register_simple("samsung-i2s-sec", -1, NULL, 0);
1350         if (!pdev)
1351                 return -ENOMEM;
1352
1353         ret = device_attach(&pdev->dev);
1354         if (ret < 0) {
1355                 dev_info(&pdev->dev, "device_attach() failed\n");
1356                 return ret;
1357         }
1358
1359         priv->pdev_sec = pdev;
1360
1361         return 0;
1362 }
1363
1364 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv)
1365 {
1366         if (priv->pdev_sec) {
1367                 platform_device_del(priv->pdev_sec);
1368                 priv->pdev_sec = NULL;
1369         }
1370 }
1371 static int samsung_i2s_probe(struct platform_device *pdev)
1372 {
1373         struct i2s_dai *pri_dai, *sec_dai = NULL;
1374         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1375         struct resource *res;
1376         u32 regs_base, quirks = 0, idma_addr = 0;
1377         struct device_node *np = pdev->dev.of_node;
1378         const struct samsung_i2s_dai_data *i2s_dai_data;
1379         int num_dais, ret;
1380         struct samsung_i2s_priv *priv;
1381
1382         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1383                 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1384         else
1385                 i2s_dai_data = (struct samsung_i2s_dai_data *)
1386                                 platform_get_device_id(pdev)->driver_data;
1387
1388         /* Nothing to do if it is the secondary device probe */
1389         if (!i2s_dai_data)
1390                 return 0;
1391
1392         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1393         if (!priv)
1394                 return -ENOMEM;
1395
1396         quirks = np ? i2s_dai_data->quirks : i2s_pdata->type.quirks;
1397         num_dais = (quirks & QUIRK_SEC_DAI) ? 2 : 1;
1398         priv->pdev = pdev;
1399         priv->variant_regs = i2s_dai_data->i2s_variant_regs;
1400         priv->quirks = quirks;
1401
1402         ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais);
1403         if (ret < 0)
1404                 return ret;
1405
1406         pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
1407
1408         spin_lock_init(&priv->lock);
1409         spin_lock_init(&priv->pcm_lock);
1410
1411         if (!np) {
1412                 if (i2s_pdata == NULL) {
1413                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1414                         return -EINVAL;
1415                 }
1416
1417                 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1418                 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1419                 pri_dai->filter = i2s_pdata->dma_filter;
1420
1421                 idma_addr = i2s_pdata->type.idma_addr;
1422         } else {
1423                 if (of_property_read_u32(np, "samsung,idma-addr",
1424                                          &idma_addr)) {
1425                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1426                                 dev_info(&pdev->dev, "idma address is not"\
1427                                                 "specified");
1428                         }
1429                 }
1430         }
1431
1432         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1433         priv->addr = devm_ioremap_resource(&pdev->dev, res);
1434         if (IS_ERR(priv->addr))
1435                 return PTR_ERR(priv->addr);
1436
1437         regs_base = res->start;
1438
1439         priv->clk = devm_clk_get(&pdev->dev, "iis");
1440         if (IS_ERR(priv->clk)) {
1441                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1442                 return PTR_ERR(priv->clk);
1443         }
1444
1445         ret = clk_prepare_enable(priv->clk);
1446         if (ret != 0) {
1447                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1448                 return ret;
1449         }
1450         pri_dai->dma_playback.addr = regs_base + I2STXD;
1451         pri_dai->dma_capture.addr = regs_base + I2SRXD;
1452         pri_dai->dma_playback.chan_name = "tx";
1453         pri_dai->dma_capture.chan_name = "rx";
1454         pri_dai->dma_playback.addr_width = 4;
1455         pri_dai->dma_capture.addr_width = 4;
1456         pri_dai->priv = priv;
1457
1458         if (quirks & QUIRK_PRI_6CHAN)
1459                 pri_dai->drv->playback.channels_max = 6;
1460
1461         ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1462                                                  "tx", "rx", NULL);
1463         if (ret < 0)
1464                 goto err_disable_clk;
1465
1466         if (quirks & QUIRK_SEC_DAI) {
1467                 sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1];
1468
1469                 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1470                 sec_dai->dma_playback.chan_name = "tx-sec";
1471
1472                 if (!np) {
1473                         sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1474                         sec_dai->filter = i2s_pdata->dma_filter;
1475                 }
1476
1477                 sec_dai->dma_playback.addr_width = 4;
1478                 sec_dai->idma_playback.addr = idma_addr;
1479                 sec_dai->pri_dai = pri_dai;
1480                 sec_dai->priv = priv;
1481                 pri_dai->sec_dai = sec_dai;
1482
1483                 ret = i2s_create_secondary_device(priv);
1484                 if (ret < 0)
1485                         goto err_disable_clk;
1486
1487                 ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev,
1488                                                 sec_dai->filter, "tx-sec", NULL,
1489                                                 &pdev->dev);
1490                 if (ret < 0)
1491                         goto err_disable_clk;
1492
1493         }
1494
1495         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1496                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1497                 ret = -EINVAL;
1498                 goto err_disable_clk;
1499         }
1500
1501         dev_set_drvdata(&pdev->dev, priv);
1502
1503         ret = devm_snd_soc_register_component(&pdev->dev,
1504                                         &samsung_i2s_component,
1505                                         priv->dai_drv, num_dais);
1506         if (ret < 0)
1507                 goto err_disable_clk;
1508
1509         pm_runtime_set_active(&pdev->dev);
1510         pm_runtime_enable(&pdev->dev);
1511
1512         ret = i2s_register_clock_provider(priv);
1513         if (ret < 0)
1514                 goto err_disable_pm;
1515
1516         priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]);
1517
1518         return 0;
1519
1520 err_disable_pm:
1521         pm_runtime_disable(&pdev->dev);
1522 err_disable_clk:
1523         clk_disable_unprepare(priv->clk);
1524         i2s_delete_secondary_device(priv);
1525         return ret;
1526 }
1527
1528 static int samsung_i2s_remove(struct platform_device *pdev)
1529 {
1530         struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev);
1531
1532         /* The secondary device has no driver data assigned */
1533         if (!priv)
1534                 return 0;
1535
1536         pm_runtime_get_sync(&pdev->dev);
1537         pm_runtime_disable(&pdev->dev);
1538
1539         i2s_unregister_clock_provider(priv);
1540         clk_disable_unprepare(priv->clk);
1541         pm_runtime_put_noidle(&pdev->dev);
1542         i2s_delete_secondary_device(priv);
1543
1544         return 0;
1545 }
1546
1547 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1548         .bfs_off = 1,
1549         .rfs_off = 3,
1550         .sdf_off = 5,
1551         .txr_off = 8,
1552         .rclksrc_off = 10,
1553         .mss_off = 11,
1554         .cdclkcon_off = 12,
1555         .lrp_off = 7,
1556         .bfs_mask = 0x3,
1557         .rfs_mask = 0x3,
1558         .ftx0cnt_off = 8,
1559 };
1560
1561 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1562         .bfs_off = 0,
1563         .rfs_off = 4,
1564         .sdf_off = 6,
1565         .txr_off = 8,
1566         .rclksrc_off = 10,
1567         .mss_off = 11,
1568         .cdclkcon_off = 12,
1569         .lrp_off = 15,
1570         .bfs_mask = 0xf,
1571         .rfs_mask = 0x3,
1572         .ftx0cnt_off = 8,
1573 };
1574
1575 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1576         .bfs_off = 0,
1577         .rfs_off = 4,
1578         .sdf_off = 7,
1579         .txr_off = 9,
1580         .rclksrc_off = 11,
1581         .mss_off = 12,
1582         .cdclkcon_off = 22,
1583         .lrp_off = 15,
1584         .bfs_mask = 0xf,
1585         .rfs_mask = 0x7,
1586         .ftx0cnt_off = 0,
1587 };
1588
1589 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1590         .bfs_off = 0,
1591         .rfs_off = 3,
1592         .sdf_off = 6,
1593         .txr_off = 8,
1594         .rclksrc_off = 10,
1595         .mss_off = 11,
1596         .cdclkcon_off = 12,
1597         .lrp_off = 15,
1598         .bfs_mask = 0x7,
1599         .rfs_mask = 0x7,
1600         .ftx0cnt_off = 8,
1601 };
1602
1603 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1604         .quirks = QUIRK_NO_MUXPSR,
1605         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1606         .i2s_variant_regs = &i2sv3_regs,
1607 };
1608
1609 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1610         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1611                         QUIRK_SUPPORTS_IDMA,
1612         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1613         .i2s_variant_regs = &i2sv3_regs,
1614 };
1615
1616 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1617         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1618                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1619         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1620         .i2s_variant_regs = &i2sv6_regs,
1621 };
1622
1623 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1624         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1625                         QUIRK_SUPPORTS_TDM,
1626         .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1627         .i2s_variant_regs = &i2sv7_regs,
1628 };
1629
1630 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1631         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1632         .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1633         .i2s_variant_regs = &i2sv5_i2s1_regs,
1634 };
1635
1636 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1637         {
1638                 .name           = "samsung-i2s",
1639                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1640         }, {
1641                 .name           = "samsung-i2s-sec",
1642         },
1643         {},
1644 };
1645 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1646
1647 #ifdef CONFIG_OF
1648 static const struct of_device_id exynos_i2s_match[] = {
1649         {
1650                 .compatible = "samsung,s3c6410-i2s",
1651                 .data = &i2sv3_dai_type,
1652         }, {
1653                 .compatible = "samsung,s5pv210-i2s",
1654                 .data = &i2sv5_dai_type,
1655         }, {
1656                 .compatible = "samsung,exynos5420-i2s",
1657                 .data = &i2sv6_dai_type,
1658         }, {
1659                 .compatible = "samsung,exynos7-i2s",
1660                 .data = &i2sv7_dai_type,
1661         }, {
1662                 .compatible = "samsung,exynos7-i2s1",
1663                 .data = &i2sv5_dai_type_i2s1,
1664         },
1665         {},
1666 };
1667 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1668 #endif
1669
1670 static const struct dev_pm_ops samsung_i2s_pm = {
1671         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1672                                 i2s_runtime_resume, NULL)
1673         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1674                                      pm_runtime_force_resume)
1675 };
1676
1677 static struct platform_driver samsung_i2s_driver = {
1678         .probe  = samsung_i2s_probe,
1679         .remove = samsung_i2s_remove,
1680         .id_table = samsung_i2s_driver_ids,
1681         .driver = {
1682                 .name = "samsung-i2s",
1683                 .of_match_table = of_match_ptr(exynos_i2s_match),
1684                 .pm = &samsung_i2s_pm,
1685         },
1686 };
1687
1688 module_platform_driver(samsung_i2s_driver);
1689
1690 /* Module information */
1691 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1692 MODULE_DESCRIPTION("Samsung I2S Interface");
1693 MODULE_ALIAS("platform:samsung-i2s");
1694 MODULE_LICENSE("GPL");