2 * skl.c - Implementation of ASoC Intel SKL HD Audio driver
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * Derived mostly from Intel HDA driver with following copyrights:
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; version 2 of the License.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/platform_device.h>
28 #include <linux/firmware.h>
29 #include <linux/delay.h>
30 #include <sound/pcm.h>
31 #include <sound/soc-acpi.h>
32 #include <sound/soc-acpi-intel-match.h>
33 #include <sound/hda_register.h>
34 #include <sound/hdaudio.h>
35 #include <sound/hda_i915.h>
36 #include <sound/hda_codec.h>
38 #include "skl-sst-dsp.h"
39 #include "skl-sst-ipc.h"
40 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
41 #include "../../../soc/codecs/hdac_hda.h"
43 static int skl_pci_binding;
44 module_param_named(pci_binding, skl_pci_binding, int, 0444);
45 MODULE_PARM_DESC(pci_binding, "PCI binding (0=auto, 1=only legacy, 2=only asoc");
48 * initialize the PCI registers
50 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
51 unsigned char mask, unsigned char val)
55 pci_read_config_byte(pci, reg, &data);
58 pci_write_config_byte(pci, reg, data);
61 static void skl_init_pci(struct skl *skl)
63 struct hdac_bus *bus = skl_to_bus(skl);
66 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
67 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
68 * Ensuring these bits are 0 clears playback static on some HD Audio
70 * The PCI register TCSEL is defined in the Intel manuals.
72 dev_dbg(bus->dev, "Clearing TCSEL\n");
73 skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
76 static void update_pci_dword(struct pci_dev *pci,
77 unsigned int reg, u32 mask, u32 val)
81 pci_read_config_dword(pci, reg, &data);
84 pci_write_config_dword(pci, reg, data);
88 * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
90 * @dev: device pointer
91 * @enable: enable/disable flag
93 static void skl_enable_miscbdcge(struct device *dev, bool enable)
95 struct pci_dev *pci = to_pci_dev(dev);
98 val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
100 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
104 * skl_clock_power_gating: Enable/Disable clock and power gating
106 * @dev: Device pointer
107 * @enable: Enable/Disable flag
109 static void skl_clock_power_gating(struct device *dev, bool enable)
111 struct pci_dev *pci = to_pci_dev(dev);
112 struct hdac_bus *bus = pci_get_drvdata(pci);
115 /* Update PDCGE bit of CGCTL register */
116 val = enable ? AZX_CGCTL_ADSPDCGE : 0;
117 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_ADSPDCGE, val);
119 /* Update L1SEN bit of EM2 register */
120 val = enable ? AZX_REG_VS_EM2_L1SEN : 0;
121 snd_hdac_chip_updatel(bus, VS_EM2, AZX_REG_VS_EM2_L1SEN, val);
123 /* Update ADSPPGD bit of PGCTL register */
124 val = enable ? 0 : AZX_PGCTL_ADSPPGD;
125 update_pci_dword(pci, AZX_PCIREG_PGCTL, AZX_PGCTL_ADSPPGD, val);
129 * While performing reset, controller may not come back properly causing
130 * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
131 * (init chip) and then again set CGCTL.MISCBDCGE to 1
133 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
135 struct hdac_ext_link *hlink;
138 skl_enable_miscbdcge(bus->dev, false);
139 ret = snd_hdac_bus_init_chip(bus, full_reset);
141 /* Reset stream-to-link mapping */
142 list_for_each_entry(hlink, &bus->hlink_list, list)
143 bus->io_ops->reg_writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
145 skl_enable_miscbdcge(bus->dev, true);
150 void skl_update_d0i3c(struct device *dev, bool enable)
152 struct pci_dev *pci = to_pci_dev(dev);
153 struct hdac_bus *bus = pci_get_drvdata(pci);
157 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
158 /* Do not write to D0I3C until command in progress bit is cleared */
159 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
161 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
164 /* Highly unlikely. But if it happens, flag error explicitly */
166 dev_err(bus->dev, "Before D0I3C update: D0I3C CIP timeout\n");
171 reg = reg | AZX_REG_VS_D0I3C_I3;
173 reg = reg & (~AZX_REG_VS_D0I3C_I3);
175 snd_hdac_chip_writeb(bus, VS_D0I3C, reg);
178 /* Wait for cmd in progress to be cleared before exiting the function */
179 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
180 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
182 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
185 /* Highly unlikely. But if it happens, flag error explicitly */
187 dev_err(bus->dev, "After D0I3C update: D0I3C CIP timeout\n");
191 dev_dbg(bus->dev, "D0I3C register = 0x%x\n",
192 snd_hdac_chip_readb(bus, VS_D0I3C));
195 /* called from IRQ */
196 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
198 snd_pcm_period_elapsed(hstr->substream);
201 static irqreturn_t skl_interrupt(int irq, void *dev_id)
203 struct hdac_bus *bus = dev_id;
206 if (!pm_runtime_active(bus->dev))
209 spin_lock(&bus->reg_lock);
211 status = snd_hdac_chip_readl(bus, INTSTS);
212 if (status == 0 || status == 0xffffffff) {
213 spin_unlock(&bus->reg_lock);
218 status = snd_hdac_chip_readb(bus, RIRBSTS);
219 if (status & RIRB_INT_MASK) {
220 if (status & RIRB_INT_RESPONSE)
221 snd_hdac_bus_update_rirb(bus);
222 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
225 spin_unlock(&bus->reg_lock);
227 return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
230 static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
232 struct hdac_bus *bus = dev_id;
235 status = snd_hdac_chip_readl(bus, INTSTS);
237 snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
242 static int skl_acquire_irq(struct hdac_bus *bus, int do_disconnect)
244 struct skl *skl = bus_to_skl(bus);
247 ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
248 skl_threaded_handler,
250 KBUILD_MODNAME, bus);
253 "unable to grab IRQ %d, disabling device\n",
258 bus->irq = skl->pci->irq;
259 pci_intx(skl->pci, 1);
264 static int skl_suspend_late(struct device *dev)
266 struct pci_dev *pci = to_pci_dev(dev);
267 struct hdac_bus *bus = pci_get_drvdata(pci);
268 struct skl *skl = bus_to_skl(bus);
270 return skl_suspend_late_dsp(skl);
274 static int _skl_suspend(struct hdac_bus *bus)
276 struct skl *skl = bus_to_skl(bus);
277 struct pci_dev *pci = to_pci_dev(bus->dev);
280 snd_hdac_ext_bus_link_power_down_all(bus);
282 ret = skl_suspend_dsp(skl);
286 snd_hdac_bus_stop_chip(bus);
287 update_pci_dword(pci, AZX_PCIREG_PGCTL,
288 AZX_PGCTL_LSRMD_MASK, AZX_PGCTL_LSRMD_MASK);
289 skl_enable_miscbdcge(bus->dev, false);
290 snd_hdac_bus_enter_link_reset(bus);
291 skl_enable_miscbdcge(bus->dev, true);
292 skl_cleanup_resources(skl);
297 static int _skl_resume(struct hdac_bus *bus)
299 struct skl *skl = bus_to_skl(bus);
302 skl_init_chip(bus, true);
304 return skl_resume_dsp(skl);
308 #ifdef CONFIG_PM_SLEEP
312 static int skl_suspend(struct device *dev)
314 struct pci_dev *pci = to_pci_dev(dev);
315 struct hdac_bus *bus = pci_get_drvdata(pci);
316 struct skl *skl = bus_to_skl(bus);
320 * Do not suspend if streams which are marked ignore suspend are
321 * running, we need to save the state for these and continue
323 if (skl->supend_active) {
324 /* turn off the links and stop the CORB/RIRB DMA if it is On */
325 snd_hdac_ext_bus_link_power_down_all(bus);
327 if (bus->cmd_dma_state)
328 snd_hdac_bus_stop_cmd_io(bus);
330 enable_irq_wake(bus->irq);
333 ret = _skl_suspend(bus);
336 skl->skl_sst->fw_loaded = false;
339 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
340 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
345 static int skl_resume(struct device *dev)
347 struct pci_dev *pci = to_pci_dev(dev);
348 struct hdac_bus *bus = pci_get_drvdata(pci);
349 struct skl *skl = bus_to_skl(bus);
350 struct hdac_ext_link *hlink = NULL;
353 /* Turned OFF in HDMI codec driver after codec reconfiguration */
354 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
355 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
358 * resume only when we are not in suspend active, otherwise need to
361 if (skl->supend_active) {
362 pci_restore_state(pci);
363 snd_hdac_ext_bus_link_power_up_all(bus);
364 disable_irq_wake(bus->irq);
366 * turn On the links which are On before active suspend
367 * and start the CORB/RIRB DMA if On before
370 list_for_each_entry(hlink, &bus->hlink_list, list) {
371 if (hlink->ref_count)
372 snd_hdac_ext_bus_link_power_up(hlink);
376 if (bus->cmd_dma_state)
377 snd_hdac_bus_init_cmd_io(bus);
379 ret = _skl_resume(bus);
381 /* turn off the links which are off before suspend */
382 list_for_each_entry(hlink, &bus->hlink_list, list) {
383 if (!hlink->ref_count)
384 snd_hdac_ext_bus_link_power_down(hlink);
387 if (!bus->cmd_dma_state)
388 snd_hdac_bus_stop_cmd_io(bus);
393 #endif /* CONFIG_PM_SLEEP */
396 static int skl_runtime_suspend(struct device *dev)
398 struct pci_dev *pci = to_pci_dev(dev);
399 struct hdac_bus *bus = pci_get_drvdata(pci);
401 dev_dbg(bus->dev, "in %s\n", __func__);
403 return _skl_suspend(bus);
406 static int skl_runtime_resume(struct device *dev)
408 struct pci_dev *pci = to_pci_dev(dev);
409 struct hdac_bus *bus = pci_get_drvdata(pci);
411 dev_dbg(bus->dev, "in %s\n", __func__);
413 return _skl_resume(bus);
415 #endif /* CONFIG_PM */
417 static const struct dev_pm_ops skl_pm = {
418 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
419 SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
420 .suspend_late = skl_suspend_late,
426 static int skl_free(struct hdac_bus *bus)
428 struct skl *skl = bus_to_skl(bus);
430 skl->init_done = 0; /* to be sure */
432 snd_hdac_ext_stop_streams(bus);
435 free_irq(bus->irq, (void *)bus);
436 snd_hdac_bus_free_stream_pages(bus);
437 snd_hdac_stream_free_all(bus);
438 snd_hdac_link_free_all(bus);
441 iounmap(bus->remap_addr);
443 pci_release_regions(skl->pci);
444 pci_disable_device(skl->pci);
446 snd_hdac_ext_bus_exit(bus);
448 cancel_work_sync(&skl->probe_work);
449 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
450 snd_hdac_i915_exit(bus);
456 * For each ssp there are 3 clocks (mclk/sclk/sclkfs).
457 * e.g. for ssp0, clocks will be named as
458 * "ssp0_mclk", "ssp0_sclk", "ssp0_sclkfs"
459 * So for skl+, there are 6 ssps, so 18 clocks will be created.
461 static struct skl_ssp_clk skl_ssp_clks[] = {
462 {.name = "ssp0_mclk"}, {.name = "ssp1_mclk"}, {.name = "ssp2_mclk"},
463 {.name = "ssp3_mclk"}, {.name = "ssp4_mclk"}, {.name = "ssp5_mclk"},
464 {.name = "ssp0_sclk"}, {.name = "ssp1_sclk"}, {.name = "ssp2_sclk"},
465 {.name = "ssp3_sclk"}, {.name = "ssp4_sclk"}, {.name = "ssp5_sclk"},
466 {.name = "ssp0_sclkfs"}, {.name = "ssp1_sclkfs"},
467 {.name = "ssp2_sclkfs"},
468 {.name = "ssp3_sclkfs"}, {.name = "ssp4_sclkfs"},
469 {.name = "ssp5_sclkfs"},
472 static struct snd_soc_acpi_mach *skl_find_hda_machine(struct skl *skl,
473 struct snd_soc_acpi_mach *machines)
475 struct hdac_bus *bus = skl_to_bus(skl);
476 struct snd_soc_acpi_mach *mach;
478 /* check if we have any codecs detected on bus */
479 if (bus->codec_mask == 0)
482 /* point to common table */
483 mach = snd_soc_acpi_intel_hda_machines;
485 /* all entries in the machine table use the same firmware */
486 mach->fw_filename = machines->fw_filename;
491 static int skl_find_machine(struct skl *skl, void *driver_data)
493 struct hdac_bus *bus = skl_to_bus(skl);
494 struct snd_soc_acpi_mach *mach = driver_data;
495 struct skl_machine_pdata *pdata;
497 mach = snd_soc_acpi_find_machine(mach);
499 dev_dbg(bus->dev, "No matching I2S machine driver found\n");
500 mach = skl_find_hda_machine(skl, driver_data);
502 dev_err(bus->dev, "No matching machine driver found\n");
508 skl->fw_name = mach->fw_filename;
512 skl->use_tplg_pcm = pdata->use_tplg_pcm;
513 mach->mach_params.dmic_num = skl_get_dmic_geo(skl);
519 static int skl_machine_device_register(struct skl *skl)
521 struct snd_soc_acpi_mach *mach = skl->mach;
522 struct hdac_bus *bus = skl_to_bus(skl);
523 struct platform_device *pdev;
526 pdev = platform_device_alloc(mach->drv_name, -1);
528 dev_err(bus->dev, "platform device alloc failed\n");
532 mach->mach_params.platform = dev_name(bus->dev);
533 mach->mach_params.codec_mask = bus->codec_mask;
535 ret = platform_device_add_data(pdev, (const void *)mach, sizeof(*mach));
537 dev_err(bus->dev, "failed to add machine device platform data\n");
538 platform_device_put(pdev);
542 ret = platform_device_add(pdev);
544 dev_err(bus->dev, "failed to add machine device\n");
545 platform_device_put(pdev);
555 static void skl_machine_device_unregister(struct skl *skl)
558 platform_device_unregister(skl->i2s_dev);
561 static int skl_dmic_device_register(struct skl *skl)
563 struct hdac_bus *bus = skl_to_bus(skl);
564 struct platform_device *pdev;
567 /* SKL has one dmic port, so allocate dmic device for this */
568 pdev = platform_device_alloc("dmic-codec", -1);
570 dev_err(bus->dev, "failed to allocate dmic device\n");
574 ret = platform_device_add(pdev);
576 dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
577 platform_device_put(pdev);
580 skl->dmic_dev = pdev;
585 static void skl_dmic_device_unregister(struct skl *skl)
588 platform_device_unregister(skl->dmic_dev);
591 static struct skl_clk_parent_src skl_clk_src[] = {
592 { .clk_id = SKL_XTAL, .name = "xtal" },
593 { .clk_id = SKL_CARDINAL, .name = "cardinal", .rate = 24576000 },
594 { .clk_id = SKL_PLL, .name = "pll", .rate = 96000000 },
597 struct skl_clk_parent_src *skl_get_parent_clk(u8 clk_id)
601 for (i = 0; i < ARRAY_SIZE(skl_clk_src); i++) {
602 if (skl_clk_src[i].clk_id == clk_id)
603 return &skl_clk_src[i];
609 static void init_skl_xtal_rate(int pci_id)
614 skl_clk_src[0].rate = 24000000;
618 skl_clk_src[0].rate = 19200000;
623 static int skl_clock_device_register(struct skl *skl)
625 struct platform_device_info pdevinfo = {NULL};
626 struct skl_clk_pdata *clk_pdata;
628 clk_pdata = devm_kzalloc(&skl->pci->dev, sizeof(*clk_pdata),
633 init_skl_xtal_rate(skl->pci->device);
635 clk_pdata->parent_clks = skl_clk_src;
636 clk_pdata->ssp_clks = skl_ssp_clks;
637 clk_pdata->num_clks = ARRAY_SIZE(skl_ssp_clks);
639 /* Query NHLT to fill the rates and parent */
640 skl_get_clks(skl, clk_pdata->ssp_clks);
641 clk_pdata->pvt_data = skl;
643 /* Register Platform device */
644 pdevinfo.parent = &skl->pci->dev;
646 pdevinfo.name = "skl-ssp-clk";
647 pdevinfo.data = clk_pdata;
648 pdevinfo.size_data = sizeof(*clk_pdata);
649 skl->clk_dev = platform_device_register_full(&pdevinfo);
650 return PTR_ERR_OR_ZERO(skl->clk_dev);
653 static void skl_clock_device_unregister(struct skl *skl)
656 platform_device_unregister(skl->clk_dev);
659 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
661 #define IDISP_INTEL_VENDOR_ID 0x80860000
664 * load the legacy codec driver
666 static void load_codec_module(struct hda_codec *codec)
669 char modalias[MODULE_NAME_LEN];
670 const char *mod = NULL;
672 snd_hdac_codec_modalias(&codec->core, modalias, sizeof(modalias));
674 dev_dbg(&codec->core.dev, "loading %s codec module\n", mod);
679 #endif /* CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC */
682 * Probe the given codec address
684 static int probe_codec(struct hdac_bus *bus, int addr)
686 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
687 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
688 unsigned int res = -1;
689 struct skl *skl = bus_to_skl(bus);
690 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
691 struct hdac_hda_priv *hda_codec;
694 struct hdac_device *hdev;
696 mutex_lock(&bus->cmd_mutex);
697 snd_hdac_bus_send_cmd(bus, cmd);
698 snd_hdac_bus_get_response(bus, addr, &res);
699 mutex_unlock(&bus->cmd_mutex);
702 dev_dbg(bus->dev, "codec #%d probed OK: %x\n", addr, res);
704 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
705 hda_codec = devm_kzalloc(&skl->pci->dev, sizeof(*hda_codec),
710 hda_codec->codec.bus = skl_to_hbus(skl);
711 hdev = &hda_codec->codec.core;
713 err = snd_hdac_ext_bus_device_init(bus, addr, hdev);
717 /* use legacy bus only for HDA codecs, idisp uses ext bus */
718 if ((res & 0xFFFF0000) != IDISP_INTEL_VENDOR_ID) {
719 hdev->type = HDA_DEV_LEGACY;
720 load_codec_module(&hda_codec->codec);
724 hdev = devm_kzalloc(&skl->pci->dev, sizeof(*hdev), GFP_KERNEL);
728 return snd_hdac_ext_bus_device_init(bus, addr, hdev);
729 #endif /* CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC */
732 /* Codec initialization */
733 static void skl_codec_create(struct hdac_bus *bus)
737 max_slots = HDA_MAX_CODECS;
739 /* First try to probe all given codec slots */
740 for (c = 0; c < max_slots; c++) {
741 if ((bus->codec_mask & (1 << c))) {
742 if (probe_codec(bus, c) < 0) {
744 * Some BIOSen give you wrong codec addresses
748 "Codec #%d probe error; disabling it...\n", c);
749 bus->codec_mask &= ~(1 << c);
751 * More badly, accessing to a non-existing
752 * codec often screws up the controller bus,
753 * and disturbs the further communications.
754 * Thus if an error occurs during probing,
755 * better to reset the controller bus to get
756 * back to the sanity state.
758 snd_hdac_bus_stop_chip(bus);
759 skl_init_chip(bus, true);
765 static const struct hdac_bus_ops bus_core_ops = {
766 .command = snd_hdac_bus_send_cmd,
767 .get_response = snd_hdac_bus_get_response,
770 static int skl_i915_init(struct hdac_bus *bus)
775 * The HDMI codec is in GPU so we need to ensure that it is powered
776 * up and ready for probe
778 err = snd_hdac_i915_init(bus);
782 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
787 static void skl_probe_work(struct work_struct *work)
789 struct skl *skl = container_of(work, struct skl, probe_work);
790 struct hdac_bus *bus = skl_to_bus(skl);
791 struct hdac_ext_link *hlink = NULL;
794 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
795 err = skl_i915_init(bus);
800 err = skl_init_chip(bus, true);
802 dev_err(bus->dev, "Init chip failed with err: %d\n", err);
806 /* codec detection */
807 if (!bus->codec_mask)
808 dev_info(bus->dev, "no hda codecs found!\n");
810 /* create codec instances */
811 skl_codec_create(bus);
813 /* register platform dai and controls */
814 err = skl_platform_register(bus->dev);
816 dev_err(bus->dev, "platform register failed: %d\n", err);
820 err = skl_machine_device_register(skl);
822 dev_err(bus->dev, "machine register failed: %d\n", err);
827 * we are done probing so decrement link counts
829 list_for_each_entry(hlink, &bus->hlink_list, list)
830 snd_hdac_ext_bus_link_put(bus, hlink);
832 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
833 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
836 pm_runtime_put_noidle(bus->dev);
837 pm_runtime_allow(bus->dev);
843 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
844 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
850 static int skl_create(struct pci_dev *pci,
851 const struct hdac_io_ops *io_ops,
854 struct hdac_ext_bus_ops *ext_ops = NULL;
856 struct hdac_bus *bus;
857 struct hda_bus *hbus;
862 err = pci_enable_device(pci);
866 skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
868 pci_disable_device(pci);
872 hbus = skl_to_hbus(skl);
873 bus = skl_to_bus(skl);
875 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
876 ext_ops = snd_soc_hdac_hda_get_ops();
878 snd_hdac_ext_bus_init(bus, &pci->dev, &bus_core_ops, io_ops, ext_ops);
881 INIT_WORK(&skl->probe_work, skl_probe_work);
882 bus->bdl_pos_adj = 0;
884 mutex_init(&hbus->prepare_mutex);
886 hbus->mixer_assigned = -1;
887 hbus->modelname = "sklbus";
894 static int skl_first_init(struct hdac_bus *bus)
896 struct skl *skl = bus_to_skl(bus);
897 struct pci_dev *pci = skl->pci;
900 int cp_streams, pb_streams, start_idx;
902 err = pci_request_regions(pci, "Skylake HD audio");
906 bus->addr = pci_resource_start(pci, 0);
907 bus->remap_addr = pci_ioremap_bar(pci, 0);
908 if (bus->remap_addr == NULL) {
909 dev_err(bus->dev, "ioremap error\n");
913 snd_hdac_bus_reset_link(bus, true);
915 snd_hdac_bus_parse_capabilities(bus);
917 /* check if PPCAP exists */
919 dev_err(bus->dev, "bus ppcap not set, HDaudio or DSP not present?\n");
923 if (skl_acquire_irq(bus, 0) < 0)
927 synchronize_irq(bus->irq);
929 gcap = snd_hdac_chip_readw(bus, GCAP);
930 dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
932 /* read number of streams from GCAP register */
933 cp_streams = (gcap >> 8) & 0x0f;
934 pb_streams = (gcap >> 12) & 0x0f;
936 if (!pb_streams && !cp_streams) {
937 dev_err(bus->dev, "no streams found in GCAP definitions?\n");
941 bus->num_streams = cp_streams + pb_streams;
943 /* allow 64bit DMA address if supported by H/W */
944 if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
945 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
947 dma_set_mask(bus->dev, DMA_BIT_MASK(32));
948 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
951 /* initialize streams */
952 snd_hdac_ext_stream_init_all
953 (bus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
954 start_idx = cp_streams;
955 snd_hdac_ext_stream_init_all
956 (bus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
958 err = snd_hdac_bus_alloc_stream_pages(bus);
962 /* initialize chip */
965 return skl_init_chip(bus, true);
968 static int skl_probe(struct pci_dev *pci,
969 const struct pci_device_id *pci_id)
972 struct hdac_bus *bus = NULL;
975 switch (skl_pci_binding) {
976 case SND_SKL_PCI_BIND_AUTO:
978 * detect DSP by checking class/subclass/prog-id information
979 * class=04 subclass 03 prog-if 00: no DSP, use legacy driver
980 * class=04 subclass 01 prog-if 00: DSP is present
981 * (and may be required e.g. for DMIC or SSP support)
982 * class=04 subclass 03 prog-if 80: use DSP or legacy mode
984 if (pci->class == 0x040300) {
985 dev_info(&pci->dev, "The DSP is not enabled on this platform, aborting probe\n");
988 if (pci->class != 0x040100 && pci->class != 0x040380) {
989 dev_err(&pci->dev, "Unknown PCI class/subclass/prog-if information (0x%06x) found, aborting probe\n", pci->class);
992 dev_info(&pci->dev, "DSP detected with PCI class/subclass/prog-if info 0x%06x\n", pci->class);
994 case SND_SKL_PCI_BIND_LEGACY:
995 dev_info(&pci->dev, "Module parameter forced binding with HDaudio legacy, aborting probe\n");
997 case SND_SKL_PCI_BIND_ASOC:
998 dev_info(&pci->dev, "Module parameter forced binding with SKL driver, bypassed detection logic\n");
1001 dev_err(&pci->dev, "invalid value for skl_pci_binding module parameter, ignored\n");
1005 /* we use ext core ops, so provide NULL for ops here */
1006 err = skl_create(pci, NULL, &skl);
1010 bus = skl_to_bus(skl);
1012 err = skl_first_init(bus);
1014 dev_err(bus->dev, "skl_first_init failed with err: %d\n", err);
1018 skl->pci_id = pci->device;
1020 device_disable_async_suspend(bus->dev);
1022 skl->nhlt = skl_nhlt_init(bus->dev);
1024 if (skl->nhlt == NULL) {
1025 #if !IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
1026 dev_err(bus->dev, "no nhlt info found\n");
1030 dev_warn(bus->dev, "no nhlt info found, continuing to try to enable HDaudio codec\n");
1034 err = skl_nhlt_create_sysfs(skl);
1036 dev_err(bus->dev, "skl_nhlt_create_sysfs failed with err: %d\n", err);
1040 skl_nhlt_update_topology_bin(skl);
1042 /* create device for dsp clk */
1043 err = skl_clock_device_register(skl);
1045 dev_err(bus->dev, "skl_clock_device_register failed with err: %d\n", err);
1050 pci_set_drvdata(skl->pci, bus);
1053 err = skl_find_machine(skl, (void *)pci_id->driver_data);
1055 dev_err(bus->dev, "skl_find_machine failed with err: %d\n", err);
1059 err = skl_init_dsp(skl);
1061 dev_dbg(bus->dev, "error failed to register dsp\n");
1064 skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
1065 skl->skl_sst->clock_power_gating = skl_clock_power_gating;
1068 snd_hdac_ext_bus_get_ml_capabilities(bus);
1070 snd_hdac_bus_stop_chip(bus);
1072 /* create device for soc dmic */
1073 err = skl_dmic_device_register(skl);
1075 dev_err(bus->dev, "skl_dmic_device_register failed with err: %d\n", err);
1079 schedule_work(&skl->probe_work);
1086 skl_clock_device_unregister(skl);
1088 skl_nhlt_free(skl->nhlt);
1095 static void skl_shutdown(struct pci_dev *pci)
1097 struct hdac_bus *bus = pci_get_drvdata(pci);
1098 struct hdac_stream *s;
1099 struct hdac_ext_stream *stream;
1105 skl = bus_to_skl(bus);
1107 if (!skl->init_done)
1110 snd_hdac_ext_stop_streams(bus);
1111 list_for_each_entry(s, &bus->stream_list, list) {
1112 stream = stream_to_hdac_ext_stream(s);
1113 snd_hdac_ext_stream_decouple(bus, stream, false);
1116 snd_hdac_bus_stop_chip(bus);
1119 static void skl_remove(struct pci_dev *pci)
1121 struct hdac_bus *bus = pci_get_drvdata(pci);
1122 struct skl *skl = bus_to_skl(bus);
1124 release_firmware(skl->tplg);
1126 pm_runtime_get_noresume(&pci->dev);
1128 /* codec removal, invoke bus_device_remove */
1129 snd_hdac_ext_bus_device_remove(bus);
1131 skl->debugfs = NULL;
1132 skl_platform_unregister(&pci->dev);
1134 skl_machine_device_unregister(skl);
1135 skl_dmic_device_unregister(skl);
1136 skl_clock_device_unregister(skl);
1137 skl_nhlt_remove_sysfs(skl);
1138 skl_nhlt_free(skl->nhlt);
1140 dev_set_drvdata(&pci->dev, NULL);
1144 static const struct pci_device_id skl_ids[] = {
1145 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKL)
1146 /* Sunrise Point-LP */
1147 { PCI_DEVICE(0x8086, 0x9d70),
1148 .driver_data = (unsigned long)&snd_soc_acpi_intel_skl_machines},
1150 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_APL)
1152 { PCI_DEVICE(0x8086, 0x5a98),
1153 .driver_data = (unsigned long)&snd_soc_acpi_intel_bxt_machines},
1155 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_KBL)
1157 { PCI_DEVICE(0x8086, 0x9D71),
1158 .driver_data = (unsigned long)&snd_soc_acpi_intel_kbl_machines},
1160 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_GLK)
1162 { PCI_DEVICE(0x8086, 0x3198),
1163 .driver_data = (unsigned long)&snd_soc_acpi_intel_glk_machines},
1165 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_CNL)
1167 { PCI_DEVICE(0x8086, 0x9dc8),
1168 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1170 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_CFL)
1172 { PCI_DEVICE(0x8086, 0xa348),
1173 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1177 MODULE_DEVICE_TABLE(pci, skl_ids);
1179 /* pci_driver definition */
1180 static struct pci_driver skl_driver = {
1181 .name = KBUILD_MODNAME,
1182 .id_table = skl_ids,
1184 .remove = skl_remove,
1185 .shutdown = skl_shutdown,
1190 module_pci_driver(skl_driver);
1192 MODULE_LICENSE("GPL v2");
1193 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");