2 * skl-sst.c - HDA DSP library functions for SKL platform
4 * Copyright (C) 2014-15, Intel Corporation.
5 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
6 * Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
19 #include <linux/module.h>
20 #include <linux/delay.h>
21 #include <linux/device.h>
22 #include <linux/err.h>
23 #include <linux/uuid.h>
24 #include "../common/sst-dsp.h"
25 #include "../common/sst-dsp-priv.h"
26 #include "../common/sst-ipc.h"
27 #include "skl-sst-ipc.h"
29 #define SKL_BASEFW_TIMEOUT 300
30 #define SKL_INIT_TIMEOUT 1000
32 /* Intel HD Audio SRAM Window 0*/
33 #define SKL_ADSP_SRAM0_BASE 0x8000
35 /* Firmware status window */
36 #define SKL_ADSP_FW_STATUS SKL_ADSP_SRAM0_BASE
37 #define SKL_ADSP_ERROR_CODE (SKL_ADSP_FW_STATUS + 0x4)
39 #define SKL_NUM_MODULES 1
41 static bool skl_check_fw_status(struct sst_dsp *ctx, u32 status)
45 cur_sts = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS) & SKL_FW_STS_MASK;
47 return (cur_sts == status);
50 static int skl_transfer_firmware(struct sst_dsp *ctx,
51 const void *basefw, u32 base_fw_size)
55 ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, basefw, base_fw_size);
59 ret = sst_dsp_register_poll(ctx,
66 ctx->cl_dev.ops.cl_stop_dma(ctx);
71 #define SKL_ADSP_FW_BIN_HDR_OFFSET 0x284
73 static int skl_load_base_firmware(struct sst_dsp *ctx)
76 struct skl_sst *skl = ctx->thread_context;
77 struct firmware stripped_fw;
80 skl->boot_complete = false;
81 init_waitqueue_head(&skl->boot_wait);
83 if (ctx->fw == NULL) {
84 ret = request_firmware(&ctx->fw, ctx->fw_name, ctx->dev);
86 dev_err(ctx->dev, "Request firmware failed %d\n", ret);
91 ret = snd_skl_parse_uuids(ctx, SKL_ADSP_FW_BIN_HDR_OFFSET);
94 "UUID parsing err: %d\n", ret);
95 release_firmware(ctx->fw);
96 skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
100 /* check for extended manifest */
101 stripped_fw.data = ctx->fw->data;
102 stripped_fw.size = ctx->fw->size;
104 skl_dsp_strip_extended_manifest(&stripped_fw);
106 ret = skl_dsp_boot(ctx);
108 dev_err(ctx->dev, "Boot dsp core failed ret: %d", ret);
109 goto skl_load_base_firmware_failed;
112 ret = skl_cldma_prepare(ctx);
114 dev_err(ctx->dev, "CL dma prepare failed : %d", ret);
115 goto skl_load_base_firmware_failed;
118 /* enable Interrupt */
119 skl_ipc_int_enable(ctx);
120 skl_ipc_op_int_enable(ctx);
122 /* check ROM Status */
123 for (i = SKL_INIT_TIMEOUT; i > 0; --i) {
124 if (skl_check_fw_status(ctx, SKL_FW_INIT)) {
126 "ROM loaded, we can continue with FW loading\n");
132 reg = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS);
134 "Timeout waiting for ROM init done, reg:0x%x\n", reg);
136 goto transfer_firmware_failed;
139 ret = skl_transfer_firmware(ctx, stripped_fw.data, stripped_fw.size);
141 dev_err(ctx->dev, "Transfer firmware failed%d\n", ret);
142 goto transfer_firmware_failed;
144 ret = wait_event_timeout(skl->boot_wait, skl->boot_complete,
145 msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
147 dev_err(ctx->dev, "DSP boot failed, FW Ready timed-out\n");
149 goto transfer_firmware_failed;
152 dev_dbg(ctx->dev, "Download firmware successful%d\n", ret);
153 skl->fw_loaded = true;
156 transfer_firmware_failed:
157 ctx->cl_dev.ops.cl_cleanup_controller(ctx);
158 skl_load_base_firmware_failed:
159 skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
160 release_firmware(ctx->fw);
165 static int skl_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id)
168 struct skl_ipc_dxstate_info dx;
169 struct skl_sst *skl = ctx->thread_context;
170 unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
172 /* If core0 is being turned on, we need to load the FW */
173 if (core_id == SKL_DSP_CORE0_ID) {
174 ret = skl_load_base_firmware(ctx);
176 dev_err(ctx->dev, "unable to load firmware\n");
182 * If any core other than core 0 is being moved to D0, enable the
183 * core and send the set dx IPC for the core.
185 if (core_id != SKL_DSP_CORE0_ID) {
186 ret = skl_dsp_enable_core(ctx, core_mask);
190 dx.core_mask = core_mask;
191 dx.dx_mask = core_mask;
193 ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID,
194 SKL_BASE_FW_MODULE_ID, &dx);
196 dev_err(ctx->dev, "Failed to set dsp to D0:core id= %d\n",
198 skl_dsp_disable_core(ctx, core_mask);
202 skl->cores.state[core_id] = SKL_DSP_RUNNING;
207 static int skl_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id)
210 struct skl_ipc_dxstate_info dx;
211 struct skl_sst *skl = ctx->thread_context;
212 unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
214 dx.core_mask = core_mask;
215 dx.dx_mask = SKL_IPC_D3_MASK;
217 ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, SKL_BASE_FW_MODULE_ID, &dx);
219 dev_err(ctx->dev, "set Dx core %d fail: %d\n", core_id, ret);
221 if (core_id == SKL_DSP_CORE0_ID) {
222 /* disable Interrupt */
223 ctx->cl_dev.ops.cl_cleanup_controller(ctx);
224 skl_cldma_int_disable(ctx);
225 skl_ipc_op_int_disable(ctx);
226 skl_ipc_int_disable(ctx);
229 ret = skl_dsp_disable_core(ctx, core_mask);
233 skl->cores.state[core_id] = SKL_DSP_RESET;
237 static unsigned int skl_get_errorcode(struct sst_dsp *ctx)
239 return sst_dsp_shim_read(ctx, SKL_ADSP_ERROR_CODE);
243 * since get/set_module are called from DAPM context,
244 * we don't need lock for usage count
246 static int skl_get_module(struct sst_dsp *ctx, u16 mod_id)
248 struct skl_module_table *module;
250 list_for_each_entry(module, &ctx->module_list, list) {
251 if (module->mod_info->mod_id == mod_id)
252 return ++module->usage_cnt;
258 static int skl_put_module(struct sst_dsp *ctx, u16 mod_id)
260 struct skl_module_table *module;
262 list_for_each_entry(module, &ctx->module_list, list) {
263 if (module->mod_info->mod_id == mod_id)
264 return --module->usage_cnt;
270 static struct skl_module_table *skl_fill_module_table(struct sst_dsp *ctx,
271 char *mod_name, int mod_id)
273 const struct firmware *fw;
274 struct skl_module_table *skl_module;
278 ret = request_firmware(&fw, mod_name, ctx->dev);
280 dev_err(ctx->dev, "Request Module %s failed :%d\n",
285 skl_module = devm_kzalloc(ctx->dev, sizeof(*skl_module), GFP_KERNEL);
286 if (skl_module == NULL) {
287 release_firmware(fw);
291 size = sizeof(*skl_module->mod_info);
292 skl_module->mod_info = devm_kzalloc(ctx->dev, size, GFP_KERNEL);
293 if (skl_module->mod_info == NULL) {
294 release_firmware(fw);
298 skl_module->mod_info->mod_id = mod_id;
299 skl_module->mod_info->fw = fw;
300 list_add(&skl_module->list, &ctx->module_list);
305 /* get a module from it's unique ID */
306 static struct skl_module_table *skl_module_get_from_id(
307 struct sst_dsp *ctx, u16 mod_id)
309 struct skl_module_table *module;
311 if (list_empty(&ctx->module_list)) {
312 dev_err(ctx->dev, "Module list is empty\n");
316 list_for_each_entry(module, &ctx->module_list, list) {
317 if (module->mod_info->mod_id == mod_id)
324 static int skl_transfer_module(struct sst_dsp *ctx,
325 struct skl_load_module_info *module)
328 struct skl_sst *skl = ctx->thread_context;
330 ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, module->fw->data,
335 ret = skl_ipc_load_modules(&skl->ipc, SKL_NUM_MODULES,
336 (void *)&module->mod_id);
338 dev_err(ctx->dev, "Failed to Load module: %d\n", ret);
340 ctx->cl_dev.ops.cl_stop_dma(ctx);
345 static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, u8 *guid)
347 struct skl_module_table *module_entry = NULL;
349 char mod_name[64]; /* guid str = 32 chars + 4 hyphens */
352 uuid_mod = (uuid_le *)guid;
353 snprintf(mod_name, sizeof(mod_name), "%s%pUL%s",
354 "intel/dsp_fw_", uuid_mod, ".bin");
356 module_entry = skl_module_get_from_id(ctx, mod_id);
357 if (module_entry == NULL) {
358 module_entry = skl_fill_module_table(ctx, mod_name, mod_id);
359 if (module_entry == NULL) {
360 dev_err(ctx->dev, "Failed to Load module\n");
365 if (!module_entry->usage_cnt) {
366 ret = skl_transfer_module(ctx, module_entry->mod_info);
368 dev_err(ctx->dev, "Failed to Load module\n");
373 ret = skl_get_module(ctx, mod_id);
378 static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id)
381 struct skl_sst *skl = ctx->thread_context;
384 usage_cnt = skl_put_module(ctx, mod_id);
386 dev_err(ctx->dev, "Module bad usage cnt!:%d\n", usage_cnt);
389 ret = skl_ipc_unload_modules(&skl->ipc,
390 SKL_NUM_MODULES, &mod_id);
392 dev_err(ctx->dev, "Failed to UnLoad module\n");
393 skl_get_module(ctx, mod_id);
400 void skl_clear_module_cnt(struct sst_dsp *ctx)
402 struct skl_module_table *module;
404 if (list_empty(&ctx->module_list))
407 list_for_each_entry(module, &ctx->module_list, list) {
408 module->usage_cnt = 0;
411 EXPORT_SYMBOL_GPL(skl_clear_module_cnt);
413 static void skl_clear_module_table(struct sst_dsp *ctx)
415 struct skl_module_table *module, *tmp;
417 if (list_empty(&ctx->module_list))
420 list_for_each_entry_safe(module, tmp, &ctx->module_list, list) {
421 list_del(&module->list);
422 release_firmware(module->mod_info->fw);
426 static struct skl_dsp_fw_ops skl_fw_ops = {
427 .set_state_D0 = skl_set_dsp_D0,
428 .set_state_D3 = skl_set_dsp_D3,
429 .load_fw = skl_load_base_firmware,
430 .get_fw_errcode = skl_get_errorcode,
431 .load_mod = skl_load_module,
432 .unload_mod = skl_unload_module,
435 static struct sst_ops skl_ops = {
436 .irq_handler = skl_dsp_sst_interrupt,
437 .write = sst_shim32_write,
438 .read = sst_shim32_read,
439 .ram_read = sst_memcpy_fromio_32,
440 .ram_write = sst_memcpy_toio_32,
441 .free = skl_dsp_free,
444 static struct sst_dsp_device skl_dev = {
445 .thread = skl_dsp_irq_thread_handler,
449 int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq,
450 const char *fw_name, struct skl_dsp_loader_ops dsp_ops, struct skl_sst **dsp)
456 skl = devm_kzalloc(dev, sizeof(*skl), GFP_KERNEL);
461 skl_dev.thread_context = skl;
462 INIT_LIST_HEAD(&skl->uuid_list);
464 skl->dsp = skl_dsp_ctx_init(dev, &skl_dev, irq);
466 dev_err(skl->dev, "%s: no device\n", __func__);
472 sst->fw_name = fw_name;
473 sst->addr.lpe = mmio_base;
474 sst->addr.shim = mmio_base;
475 sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),
476 SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);
478 INIT_LIST_HEAD(&sst->module_list);
479 sst->dsp_ops = dsp_ops;
480 sst->fw_ops = skl_fw_ops;
482 ret = skl_ipc_init(dev, skl);
486 skl->cores.count = 2;
488 ret = sst->fw_ops.load_fw(sst);
490 dev_err(dev, "Load base fw failed : %d", ret);
494 skl_dsp_init_core_state(sst);
502 skl_sst_dsp_cleanup(dev, skl);
505 EXPORT_SYMBOL_GPL(skl_sst_dsp_init);
507 void skl_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx)
509 skl_clear_module_table(ctx->dsp);
510 skl_freeup_uuid_list(ctx);
511 skl_ipc_free(&ctx->ipc);
512 ctx->dsp->ops->free(ctx->dsp);
513 if (ctx->boot_complete) {
514 ctx->dsp->cl_dev.ops.cl_cleanup_controller(ctx->dsp);
515 skl_cldma_int_disable(ctx->dsp);
518 EXPORT_SYMBOL_GPL(skl_sst_dsp_cleanup);
520 MODULE_LICENSE("GPL v2");
521 MODULE_DESCRIPTION("Intel Skylake IPC driver");