1 // SPDX-License-Identifier: GPL-2.0-only
3 * uda134x.c -- UDA134X ALSA SoC Codec driver
5 * Modifications by Christian Pellegrin <chripell@evolware.org>
7 * Copyright 2007 Dension Audio Systems Ltd.
10 * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
13 #include <linux/module.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <sound/pcm.h>
17 #include <sound/pcm_params.h>
18 #include <sound/soc.h>
19 #include <sound/initval.h>
21 #include <sound/uda134x.h>
27 #define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
28 #define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
29 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
35 struct snd_pcm_substream *master_substream;
36 struct snd_pcm_substream *slave_substream;
38 struct regmap *regmap;
39 struct uda134x_platform_data *pd;
42 static const struct reg_default uda134x_reg_defaults[] = {
43 { UDA134X_EA000, 0x04 },
44 { UDA134X_EA001, 0x04 },
45 { UDA134X_EA010, 0x04 },
46 { UDA134X_EA011, 0x00 },
47 { UDA134X_EA100, 0x00 },
48 { UDA134X_EA101, 0x00 },
49 { UDA134X_EA110, 0x00 },
50 { UDA134X_EA111, 0x00 },
51 { UDA134X_STATUS0, 0x00 },
52 { UDA134X_STATUS1, 0x03 },
53 { UDA134X_DATA000, 0x00 },
54 { UDA134X_DATA001, 0x00 },
55 { UDA134X_DATA010, 0x00 },
56 { UDA134X_DATA011, 0x00 },
57 { UDA134X_DATA1, 0x00 },
61 * Write to the uda134x registers
64 static int uda134x_regmap_write(void *context, unsigned int reg,
67 struct uda134x_platform_data *pd = context;
75 addr = UDA134X_STATUS_ADDR;
76 data |= (reg - UDA134X_STATUS0) << 7;
82 addr = UDA134X_DATA0_ADDR;
83 data |= (reg - UDA134X_DATA000) << 6;
86 addr = UDA134X_DATA1_ADDR;
89 /* It's an extended address register */
90 addr = (reg | UDA134X_EXTADDR_PREFIX);
92 ret = l3_write(&pd->l3,
93 UDA134X_DATA0_ADDR, &addr, 1);
97 addr = UDA134X_DATA0_ADDR;
98 data = (value | UDA134X_EXTDATA_PREFIX);
102 ret = l3_write(&pd->l3,
110 static inline void uda134x_reset(struct snd_soc_component *component)
112 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
113 unsigned int mask = 1<<6;
115 regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, mask);
117 regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, 0);
120 static int uda134x_mute(struct snd_soc_dai *dai, int mute, int direction)
122 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(dai->component);
123 unsigned int mask = 1<<2;
126 pr_debug("%s mute: %d\n", __func__, mute);
133 return regmap_update_bits(uda134x->regmap, UDA134X_DATA010, mask, val);
136 static int uda134x_startup(struct snd_pcm_substream *substream,
137 struct snd_soc_dai *dai)
139 struct snd_soc_component *component = dai->component;
140 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
141 struct snd_pcm_runtime *master_runtime;
143 if (uda134x->master_substream) {
144 master_runtime = uda134x->master_substream->runtime;
146 pr_debug("%s constraining to %d bits at %d\n", __func__,
147 master_runtime->sample_bits,
148 master_runtime->rate);
150 snd_pcm_hw_constraint_single(substream->runtime,
151 SNDRV_PCM_HW_PARAM_RATE,
152 master_runtime->rate);
154 snd_pcm_hw_constraint_single(substream->runtime,
155 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
156 master_runtime->sample_bits);
158 uda134x->slave_substream = substream;
160 uda134x->master_substream = substream;
165 static void uda134x_shutdown(struct snd_pcm_substream *substream,
166 struct snd_soc_dai *dai)
168 struct snd_soc_component *component = dai->component;
169 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
171 if (uda134x->master_substream == substream)
172 uda134x->master_substream = uda134x->slave_substream;
174 uda134x->slave_substream = NULL;
177 static int uda134x_hw_params(struct snd_pcm_substream *substream,
178 struct snd_pcm_hw_params *params,
179 struct snd_soc_dai *dai)
181 struct snd_soc_component *component = dai->component;
182 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
183 unsigned int hw_params = 0;
185 if (substream == uda134x->slave_substream) {
186 pr_debug("%s ignoring hw_params for slave substream\n",
191 pr_debug("%s sysclk: %d, rate:%d\n", __func__,
192 uda134x->sysclk, params_rate(params));
194 /* set SYSCLK / fs ratio */
195 switch (uda134x->sysclk / params_rate(params)) {
205 printk(KERN_ERR "%s unsupported fs\n", __func__);
209 pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
210 uda134x->dai_fmt, params_format(params));
212 /* set DAI format and word length */
213 switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
214 case SND_SOC_DAIFMT_I2S:
216 case SND_SOC_DAIFMT_RIGHT_J:
217 switch (params_width(params)) {
225 hw_params |= ((1<<2) | (1<<1));
228 printk(KERN_ERR "%s unsupported format (right)\n",
233 case SND_SOC_DAIFMT_LEFT_J:
237 printk(KERN_ERR "%s unsupported format\n", __func__);
241 return regmap_update_bits(uda134x->regmap, UDA134X_STATUS0,
242 STATUS0_SYSCLK_MASK | STATUS0_DAIFMT_MASK, hw_params);
245 static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
246 int clk_id, unsigned int freq, int dir)
248 struct snd_soc_component *component = codec_dai->component;
249 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
251 pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
254 /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
255 because the codec is slave. Of course limitations of the clock
256 master (the IIS controller) apply.
257 We'll error out on set_hw_params if it's not OK */
258 if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
259 uda134x->sysclk = freq;
263 printk(KERN_ERR "%s unsupported sysclk\n", __func__);
267 static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
270 struct snd_soc_component *component = codec_dai->component;
271 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
273 pr_debug("%s fmt: %08X\n", __func__, fmt);
275 /* codec supports only full slave mode */
276 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
277 printk(KERN_ERR "%s unsupported slave mode\n", __func__);
281 /* no support for clock inversion */
282 if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
283 printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
287 /* We can't setup DAI format here as it depends on the word bit num */
288 /* so let's just store the value for later */
289 uda134x->dai_fmt = fmt;
294 static int uda134x_set_bias_level(struct snd_soc_component *component,
295 enum snd_soc_bias_level level)
297 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
298 struct uda134x_platform_data *pd = uda134x->pd;
299 pr_debug("%s bias level %d\n", __func__, level);
302 case SND_SOC_BIAS_ON:
304 case SND_SOC_BIAS_PREPARE:
308 regcache_sync(uda134x->regmap);
311 case SND_SOC_BIAS_STANDBY:
313 case SND_SOC_BIAS_OFF:
317 regcache_mark_dirty(uda134x->regmap);
324 static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
325 "Minimum2", "Maximum"};
326 static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
327 static const char *uda134x_mixmode[] = {"Differential", "Analog1",
330 static const struct soc_enum uda134x_mixer_enum[] = {
331 SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
332 SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
333 SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
336 static const struct snd_kcontrol_new uda1341_snd_controls[] = {
337 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
338 SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
339 SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
340 SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
342 SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
343 SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
345 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
346 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
348 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
349 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
350 SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
352 SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
353 SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
354 SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
356 SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
357 SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
358 SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
359 SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
360 SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
361 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
364 static const struct snd_kcontrol_new uda1340_snd_controls[] = {
365 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
367 SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
368 SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
370 SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
371 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
373 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
376 static const struct snd_kcontrol_new uda1345_snd_controls[] = {
377 SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
379 SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
381 SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
384 /* UDA1341 has the DAC/ADC power down in STATUS1 */
385 static const struct snd_soc_dapm_widget uda1341_dapm_widgets[] = {
386 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_STATUS1, 0, 0),
387 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_STATUS1, 1, 0),
390 /* UDA1340/4/5 has the DAC/ADC pwoer down in DATA0 11 */
391 static const struct snd_soc_dapm_widget uda1340_dapm_widgets[] = {
392 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_DATA011, 0, 0),
393 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_DATA011, 1, 0),
396 /* Common DAPM widgets */
397 static const struct snd_soc_dapm_widget uda134x_dapm_widgets[] = {
398 SND_SOC_DAPM_INPUT("VINL1"),
399 SND_SOC_DAPM_INPUT("VINR1"),
400 SND_SOC_DAPM_INPUT("VINL2"),
401 SND_SOC_DAPM_INPUT("VINR2"),
402 SND_SOC_DAPM_OUTPUT("VOUTL"),
403 SND_SOC_DAPM_OUTPUT("VOUTR"),
406 static const struct snd_soc_dapm_route uda134x_dapm_routes[] = {
407 { "ADC", NULL, "VINL1" },
408 { "ADC", NULL, "VINR1" },
409 { "ADC", NULL, "VINL2" },
410 { "ADC", NULL, "VINR2" },
411 { "VOUTL", NULL, "DAC" },
412 { "VOUTR", NULL, "DAC" },
415 static const struct snd_soc_dai_ops uda134x_dai_ops = {
416 .startup = uda134x_startup,
417 .shutdown = uda134x_shutdown,
418 .hw_params = uda134x_hw_params,
419 .mute_stream = uda134x_mute,
420 .set_sysclk = uda134x_set_dai_sysclk,
421 .set_fmt = uda134x_set_dai_fmt,
422 .no_capture_mute = 1,
425 static struct snd_soc_dai_driver uda134x_dai = {
426 .name = "uda134x-hifi",
427 /* playback capabilities */
429 .stream_name = "Playback",
432 .rates = UDA134X_RATES,
433 .formats = UDA134X_FORMATS,
435 /* capture capabilities */
437 .stream_name = "Capture",
440 .rates = UDA134X_RATES,
441 .formats = UDA134X_FORMATS,
444 .ops = &uda134x_dai_ops,
447 static int uda134x_soc_probe(struct snd_soc_component *component)
449 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
450 struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
451 struct uda134x_platform_data *pd = uda134x->pd;
452 const struct snd_soc_dapm_widget *widgets;
453 unsigned num_widgets;
456 printk(KERN_INFO "UDA134X SoC Audio Codec\n");
459 case UDA134X_UDA1340:
460 case UDA134X_UDA1341:
461 case UDA134X_UDA1344:
462 case UDA134X_UDA1345:
465 printk(KERN_ERR "UDA134X SoC codec: "
466 "unsupported model %d\n",
474 uda134x_reset(component);
476 if (pd->model == UDA134X_UDA1341) {
477 widgets = uda1341_dapm_widgets;
478 num_widgets = ARRAY_SIZE(uda1341_dapm_widgets);
480 widgets = uda1340_dapm_widgets;
481 num_widgets = ARRAY_SIZE(uda1340_dapm_widgets);
484 ret = snd_soc_dapm_new_controls(dapm, widgets, num_widgets);
486 printk(KERN_ERR "%s failed to register dapm controls: %d",
492 case UDA134X_UDA1340:
493 case UDA134X_UDA1344:
494 ret = snd_soc_add_component_controls(component, uda1340_snd_controls,
495 ARRAY_SIZE(uda1340_snd_controls));
497 case UDA134X_UDA1341:
498 ret = snd_soc_add_component_controls(component, uda1341_snd_controls,
499 ARRAY_SIZE(uda1341_snd_controls));
501 case UDA134X_UDA1345:
502 ret = snd_soc_add_component_controls(component, uda1345_snd_controls,
503 ARRAY_SIZE(uda1345_snd_controls));
506 printk(KERN_ERR "%s unknown codec type: %d",
507 __func__, pd->model);
512 printk(KERN_ERR "UDA134X: failed to register controls\n");
519 static const struct snd_soc_component_driver soc_component_dev_uda134x = {
520 .probe = uda134x_soc_probe,
521 .set_bias_level = uda134x_set_bias_level,
522 .dapm_widgets = uda134x_dapm_widgets,
523 .num_dapm_widgets = ARRAY_SIZE(uda134x_dapm_widgets),
524 .dapm_routes = uda134x_dapm_routes,
525 .num_dapm_routes = ARRAY_SIZE(uda134x_dapm_routes),
526 .suspend_bias_off = 1,
528 .use_pmdown_time = 1,
530 .non_legacy_dai_naming = 1,
533 static const struct regmap_config uda134x_regmap_config = {
536 .max_register = UDA134X_DATA1,
537 .reg_defaults = uda134x_reg_defaults,
538 .num_reg_defaults = ARRAY_SIZE(uda134x_reg_defaults),
539 .cache_type = REGCACHE_RBTREE,
541 .reg_write = uda134x_regmap_write,
544 static int uda134x_codec_probe(struct platform_device *pdev)
546 struct uda134x_platform_data *pd = pdev->dev.platform_data;
547 struct uda134x_priv *uda134x;
551 dev_err(&pdev->dev, "Missing L3 bitbang function\n");
555 uda134x = devm_kzalloc(&pdev->dev, sizeof(*uda134x), GFP_KERNEL);
560 platform_set_drvdata(pdev, uda134x);
562 if (pd->l3.use_gpios) {
563 ret = l3_set_gpio_ops(&pdev->dev, &uda134x->pd->l3);
568 uda134x->regmap = devm_regmap_init(&pdev->dev, NULL, pd,
569 &uda134x_regmap_config);
570 if (IS_ERR(uda134x->regmap))
571 return PTR_ERR(uda134x->regmap);
573 return devm_snd_soc_register_component(&pdev->dev,
574 &soc_component_dev_uda134x, &uda134x_dai, 1);
577 static struct platform_driver uda134x_codec_driver = {
579 .name = "uda134x-codec",
581 .probe = uda134x_codec_probe,
584 module_platform_driver(uda134x_codec_driver);
586 MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
587 MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
588 MODULE_LICENSE("GPL");