1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
5 * Copyright: 2011 Raumfeld GmbH
6 * Author: Sven Brandau <info@brandau.biz>
10 * Johannes Stezenbach <js@sig21.net>
11 * Wolfson Microelectronics PLC.
12 * Mark Brown <broonie@opensource.wolfsonmicro.com>
14 #ifndef _ASOC_STA_350_H
15 #define _ASOC_STA_350_H
17 /* STA350 register addresses */
19 #define STA350_REGISTER_COUNT 0x4D
20 #define STA350_COEF_COUNT 62
22 #define STA350_CONFA 0x00
23 #define STA350_CONFB 0x01
24 #define STA350_CONFC 0x02
25 #define STA350_CONFD 0x03
26 #define STA350_CONFE 0x04
27 #define STA350_CONFF 0x05
28 #define STA350_MMUTE 0x06
29 #define STA350_MVOL 0x07
30 #define STA350_C1VOL 0x08
31 #define STA350_C2VOL 0x09
32 #define STA350_C3VOL 0x0a
33 #define STA350_AUTO1 0x0b
34 #define STA350_AUTO2 0x0c
35 #define STA350_AUTO3 0x0d
36 #define STA350_C1CFG 0x0e
37 #define STA350_C2CFG 0x0f
38 #define STA350_C3CFG 0x10
39 #define STA350_TONE 0x11
40 #define STA350_L1AR 0x12
41 #define STA350_L1ATRT 0x13
42 #define STA350_L2AR 0x14
43 #define STA350_L2ATRT 0x15
44 #define STA350_CFADDR2 0x16
45 #define STA350_B1CF1 0x17
46 #define STA350_B1CF2 0x18
47 #define STA350_B1CF3 0x19
48 #define STA350_B2CF1 0x1a
49 #define STA350_B2CF2 0x1b
50 #define STA350_B2CF3 0x1c
51 #define STA350_A1CF1 0x1d
52 #define STA350_A1CF2 0x1e
53 #define STA350_A1CF3 0x1f
54 #define STA350_A2CF1 0x20
55 #define STA350_A2CF2 0x21
56 #define STA350_A2CF3 0x22
57 #define STA350_B0CF1 0x23
58 #define STA350_B0CF2 0x24
59 #define STA350_B0CF3 0x25
60 #define STA350_CFUD 0x26
61 #define STA350_MPCC1 0x27
62 #define STA350_MPCC2 0x28
63 #define STA350_DCC1 0x29
64 #define STA350_DCC2 0x2a
65 #define STA350_FDRC1 0x2b
66 #define STA350_FDRC2 0x2c
67 #define STA350_STATUS 0x2d
68 /* reserved: 0x2d - 0x30 */
69 #define STA350_EQCFG 0x31
70 #define STA350_EATH1 0x32
71 #define STA350_ERTH1 0x33
72 #define STA350_EATH2 0x34
73 #define STA350_ERTH2 0x35
74 #define STA350_CONFX 0x36
75 #define STA350_SVCA 0x37
76 #define STA350_SVCB 0x38
77 #define STA350_RMS0A 0x39
78 #define STA350_RMS0B 0x3a
79 #define STA350_RMS0C 0x3b
80 #define STA350_RMS1A 0x3c
81 #define STA350_RMS1B 0x3d
82 #define STA350_RMS1C 0x3e
83 #define STA350_EVOLRES 0x3f
84 /* reserved: 0x40 - 0x47 */
85 #define STA350_NSHAPE 0x48
86 #define STA350_CTXB4B1 0x49
87 #define STA350_CTXB7B5 0x4a
88 #define STA350_MISC1 0x4b
89 #define STA350_MISC2 0x4c
92 #define STA350_CONFA_MCS_MASK 0x03
93 #define STA350_CONFA_MCS_SHIFT 0
94 #define STA350_CONFA_IR_MASK 0x18
95 #define STA350_CONFA_IR_SHIFT 3
96 #define STA350_CONFA_TWRB BIT(5)
97 #define STA350_CONFA_TWAB BIT(6)
98 #define STA350_CONFA_FDRB BIT(7)
101 #define STA350_CONFB_SAI_MASK 0x0f
102 #define STA350_CONFB_SAI_SHIFT 0
103 #define STA350_CONFB_SAIFB BIT(4)
104 #define STA350_CONFB_DSCKE BIT(5)
105 #define STA350_CONFB_C1IM BIT(6)
106 #define STA350_CONFB_C2IM BIT(7)
109 #define STA350_CONFC_OM_MASK 0x03
110 #define STA350_CONFC_OM_SHIFT 0
111 #define STA350_CONFC_CSZ_MASK 0x3c
112 #define STA350_CONFC_CSZ_SHIFT 2
113 #define STA350_CONFC_OCRB BIT(7)
116 #define STA350_CONFD_HPB_SHIFT 0
117 #define STA350_CONFD_DEMP_SHIFT 1
118 #define STA350_CONFD_DSPB_SHIFT 2
119 #define STA350_CONFD_PSL_SHIFT 3
120 #define STA350_CONFD_BQL_SHIFT 4
121 #define STA350_CONFD_DRC_SHIFT 5
122 #define STA350_CONFD_ZDE_SHIFT 6
123 #define STA350_CONFD_SME_SHIFT 7
126 #define STA350_CONFE_MPCV BIT(0)
127 #define STA350_CONFE_MPCV_SHIFT 0
128 #define STA350_CONFE_MPC BIT(1)
129 #define STA350_CONFE_MPC_SHIFT 1
130 #define STA350_CONFE_NSBW BIT(2)
131 #define STA350_CONFE_NSBW_SHIFT 2
132 #define STA350_CONFE_AME BIT(3)
133 #define STA350_CONFE_AME_SHIFT 3
134 #define STA350_CONFE_PWMS BIT(4)
135 #define STA350_CONFE_PWMS_SHIFT 4
136 #define STA350_CONFE_DCCV BIT(5)
137 #define STA350_CONFE_DCCV_SHIFT 5
138 #define STA350_CONFE_ZCE BIT(6)
139 #define STA350_CONFE_ZCE_SHIFT 6
140 #define STA350_CONFE_SVE BIT(7)
141 #define STA350_CONFE_SVE_SHIFT 7
144 #define STA350_CONFF_OCFG_MASK 0x03
145 #define STA350_CONFF_OCFG_SHIFT 0
146 #define STA350_CONFF_IDE BIT(2)
147 #define STA350_CONFF_BCLE BIT(3)
148 #define STA350_CONFF_LDTE BIT(4)
149 #define STA350_CONFF_ECLE BIT(5)
150 #define STA350_CONFF_PWDN BIT(6)
151 #define STA350_CONFF_EAPD BIT(7)
154 #define STA350_MMUTE_MMUTE 0x01
155 #define STA350_MMUTE_MMUTE_SHIFT 0
156 #define STA350_MMUTE_C1M 0x02
157 #define STA350_MMUTE_C1M_SHIFT 1
158 #define STA350_MMUTE_C2M 0x04
159 #define STA350_MMUTE_C2M_SHIFT 2
160 #define STA350_MMUTE_C3M 0x08
161 #define STA350_MMUTE_C3M_SHIFT 3
162 #define STA350_MMUTE_LOC_MASK 0xC0
163 #define STA350_MMUTE_LOC_SHIFT 6
166 #define STA350_AUTO1_AMGC_MASK 0x30
167 #define STA350_AUTO1_AMGC_SHIFT 4
170 #define STA350_AUTO2_AMAME 0x01
171 #define STA350_AUTO2_AMAM_MASK 0x0e
172 #define STA350_AUTO2_AMAM_SHIFT 1
173 #define STA350_AUTO2_XO_MASK 0xf0
174 #define STA350_AUTO2_XO_SHIFT 4
177 #define STA350_AUTO3_PEQ_MASK 0x1f
178 #define STA350_AUTO3_PEQ_SHIFT 0
180 /* 0x0e 0x0f 0x10 CxCFG */
181 #define STA350_CxCFG_TCB_SHIFT 0
182 #define STA350_CxCFG_EQBP_SHIFT 1
183 #define STA350_CxCFG_VBP_SHIFT 2
184 #define STA350_CxCFG_BO_SHIFT 3
185 #define STA350_CxCFG_LS_SHIFT 4
186 #define STA350_CxCFG_OM_MASK 0xc0
187 #define STA350_CxCFG_OM_SHIFT 6
190 #define STA350_TONE_BTC_SHIFT 0
191 #define STA350_TONE_TTC_SHIFT 4
193 /* 0x12 0x13 0x14 0x15 limiter attack/release */
194 #define STA350_LxA_SHIFT 0
195 #define STA350_LxR_SHIFT 4
198 #define STA350_CFUD_W1 0x01
199 #define STA350_CFUD_WA 0x02
200 #define STA350_CFUD_R1 0x04
201 #define STA350_CFUD_RA 0x08
204 /* biquad filter coefficient table offsets */
205 #define STA350_C1_BQ_BASE 0
206 #define STA350_C2_BQ_BASE 20
207 #define STA350_CH_BQ_NUM 4
208 #define STA350_BQ_NUM_COEF 5
209 #define STA350_XO_HP_BQ_BASE 40
210 #define STA350_XO_LP_BQ_BASE 45
211 #define STA350_C1_PRESCALE 50
212 #define STA350_C2_PRESCALE 51
213 #define STA350_C1_POSTSCALE 52
214 #define STA350_C2_POSTSCALE 53
215 #define STA350_C3_POSTSCALE 54
216 #define STA350_TW_POSTSCALE 55
217 #define STA350_C1_MIX1 56
218 #define STA350_C1_MIX2 57
219 #define STA350_C2_MIX1 58
220 #define STA350_C2_MIX2 59
221 #define STA350_C3_MIX1 60
222 #define STA350_C3_MIX2 61
224 /* miscellaneous register 1 */
225 #define STA350_MISC1_CPWMEN BIT(2)
226 #define STA350_MISC1_BRIDGOFF BIT(5)
227 #define STA350_MISC1_NSHHPEN BIT(6)
228 #define STA350_MISC1_RPDNEN BIT(7)
230 /* miscellaneous register 2 */
231 #define STA350_MISC2_PNDLSL_MASK 0x1c
232 #define STA350_MISC2_PNDLSL_SHIFT 2
234 #endif /* _ASOC_STA_350_H */