1 // SPDX-License-Identifier: GPL-2.0
3 * rt715.c -- rt715 ALSA SoC audio driver
5 * Copyright(c) 2019 Realtek Semiconductor Corp.
7 * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/i2c.h>
17 #include <linux/pm_runtime.h>
19 #include <linux/soundwire/sdw.h>
20 #include <linux/gpio.h>
21 #include <linux/regmap.h>
22 #include <linux/slab.h>
23 #include <linux/platform_device.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/gpio/consumer.h>
27 #include <linux/of_gpio.h>
28 #include <linux/of_device.h>
29 #include <sound/core.h>
30 #include <sound/pcm.h>
31 #include <sound/pcm_params.h>
32 #include <sound/soc.h>
33 #include <sound/soc-dapm.h>
34 #include <sound/initval.h>
35 #include <sound/tlv.h>
36 #include <sound/hda_verbs.h>
40 static int rt715_index_write(struct regmap *regmap, unsigned int reg,
44 unsigned int addr = ((RT715_PRIV_INDEX_W_H) << 8) | reg;
46 ret = regmap_write(regmap, addr, value);
48 pr_err("Failed to set private value: %08x <= %04x %d\n", ret,
55 static void rt715_get_gain(struct rt715_priv *rt715, unsigned int addr_h,
56 unsigned int addr_l, unsigned int val_h,
57 unsigned int *r_val, unsigned int *l_val)
61 *r_val = (val_h << 8);
62 ret = regmap_read(rt715->regmap, addr_l, r_val);
64 pr_err("Failed to get R channel gain.\n");
68 *l_val = (val_h << 8);
69 ret = regmap_read(rt715->regmap, addr_h, l_val);
71 pr_err("Failed to get L channel gain.\n");
74 /* For Verb-Set Amplifier Gain (Verb ID = 3h) */
75 static int rt715_set_amp_gain_put(struct snd_kcontrol *kcontrol,
76 struct snd_ctl_elem_value *ucontrol)
78 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
79 struct snd_soc_dapm_context *dapm =
80 snd_soc_component_get_dapm(component);
81 struct soc_mixer_control *mc =
82 (struct soc_mixer_control *)kcontrol->private_value;
83 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
84 unsigned int addr_h, addr_l, val_h, val_ll, val_lr;
85 unsigned int read_ll, read_rl;
88 /* Can't use update bit function, so read the original value first */
91 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
96 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
101 val_ll = (mc->max - ucontrol->value.integer.value[0]) << 7;
103 read_ll = read_ll & 0x7f;
107 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f);
108 if (val_ll > mc->max)
110 /* keep mute status */
111 read_ll = read_ll & 0x80;
117 regmap_write(rt715->regmap,
118 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
120 val_lr = (mc->max - ucontrol->value.integer.value[1]) << 7;
122 read_rl = read_rl & 0x7f;
126 val_lr = ((ucontrol->value.integer.value[1]) & 0x7f);
127 if (val_lr > mc->max)
129 /* keep mute status */
130 read_rl = read_rl & 0x80;
134 for (i = 0; i < 3; i++) { /* retry 3 times at most */
136 if (val_ll == val_lr) {
137 /* Set both L/R channels at the same time */
138 val_h = (1 << mc->shift) | (3 << 4);
139 regmap_write(rt715->regmap, addr_h,
140 (val_h << 8 | val_ll));
141 regmap_write(rt715->regmap, addr_l,
142 (val_h << 8 | val_ll));
145 val_h = (1 << mc->shift) | (1 << 5);
146 regmap_write(rt715->regmap, addr_h,
147 (val_h << 8 | val_ll));
149 val_h = (1 << mc->shift) | (1 << 4);
150 regmap_write(rt715->regmap, addr_l,
151 (val_h << 8 | val_lr));
154 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
159 rt715_get_gain(rt715, addr_h, addr_l, val_h,
161 if (read_rl == val_lr && read_ll == val_ll)
164 /* D0:power on state, D3: power saving mode */
165 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
166 regmap_write(rt715->regmap,
167 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
171 static int rt715_set_amp_gain_get(struct snd_kcontrol *kcontrol,
172 struct snd_ctl_elem_value *ucontrol)
174 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
175 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
176 struct soc_mixer_control *mc =
177 (struct soc_mixer_control *)kcontrol->private_value;
178 unsigned int addr_h, addr_l, val_h;
179 unsigned int read_ll, read_rl;
183 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
188 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
191 /* for mute status */
192 read_ll = !((read_ll & 0x80) >> RT715_MUTE_SFT);
193 read_rl = !((read_rl & 0x80) >> RT715_MUTE_SFT);
196 read_ll = read_ll & 0x7f;
197 read_rl = read_rl & 0x7f;
199 ucontrol->value.integer.value[0] = read_ll;
200 ucontrol->value.integer.value[1] = read_rl;
205 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
206 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
208 #define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\
209 xhandler_get, xhandler_put) \
210 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
211 .info = snd_soc_info_volsw, \
212 .get = xhandler_get, .put = xhandler_put, \
213 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
216 static const struct snd_kcontrol_new rt715_snd_controls[] = {
218 SOC_DOUBLE_R_EXT("ADC 07 Capture Switch", RT715_SET_GAIN_MIC_ADC_H,
219 RT715_SET_GAIN_MIC_ADC_L, RT715_DIR_IN_SFT, 1, 1,
220 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
221 SOC_DOUBLE_R_EXT("ADC 08 Capture Switch", RT715_SET_GAIN_LINE_ADC_H,
222 RT715_SET_GAIN_LINE_ADC_L, RT715_DIR_IN_SFT, 1, 1,
223 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
224 SOC_DOUBLE_R_EXT("ADC 09 Capture Switch", RT715_SET_GAIN_MIX_ADC_H,
225 RT715_SET_GAIN_MIX_ADC_L, RT715_DIR_IN_SFT, 1, 1,
226 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
227 SOC_DOUBLE_R_EXT("ADC 27 Capture Switch", RT715_SET_GAIN_MIX_ADC2_H,
228 RT715_SET_GAIN_MIX_ADC2_L, RT715_DIR_IN_SFT, 1, 1,
229 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
231 SOC_DOUBLE_R_EXT_TLV("ADC 07 Capture Volume", RT715_SET_GAIN_MIC_ADC_H,
232 RT715_SET_GAIN_MIC_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
233 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
235 SOC_DOUBLE_R_EXT_TLV("ADC 08 Capture Volume", RT715_SET_GAIN_LINE_ADC_H,
236 RT715_SET_GAIN_LINE_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
237 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
239 SOC_DOUBLE_R_EXT_TLV("ADC 09 Capture Volume", RT715_SET_GAIN_MIX_ADC_H,
240 RT715_SET_GAIN_MIX_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
241 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
243 SOC_DOUBLE_R_EXT_TLV("ADC 27 Capture Volume", RT715_SET_GAIN_MIX_ADC2_H,
244 RT715_SET_GAIN_MIX_ADC2_L, RT715_DIR_IN_SFT, 0x3f, 0,
245 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
247 /* MIC Boost Control */
248 SOC_DOUBLE_R_EXT_TLV("DMIC1 Boost", RT715_SET_GAIN_DMIC1_H,
249 RT715_SET_GAIN_DMIC1_L, RT715_DIR_IN_SFT, 3, 0,
250 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
252 SOC_DOUBLE_R_EXT_TLV("DMIC2 Boost", RT715_SET_GAIN_DMIC2_H,
253 RT715_SET_GAIN_DMIC2_L, RT715_DIR_IN_SFT, 3, 0,
254 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
256 SOC_DOUBLE_R_EXT_TLV("DMIC3 Boost", RT715_SET_GAIN_DMIC3_H,
257 RT715_SET_GAIN_DMIC3_L, RT715_DIR_IN_SFT, 3, 0,
258 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
260 SOC_DOUBLE_R_EXT_TLV("DMIC4 Boost", RT715_SET_GAIN_DMIC4_H,
261 RT715_SET_GAIN_DMIC4_L, RT715_DIR_IN_SFT, 3, 0,
262 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
264 SOC_DOUBLE_R_EXT_TLV("MIC1 Boost", RT715_SET_GAIN_MIC1_H,
265 RT715_SET_GAIN_MIC1_L, RT715_DIR_IN_SFT, 3, 0,
266 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
268 SOC_DOUBLE_R_EXT_TLV("MIC2 Boost", RT715_SET_GAIN_MIC2_H,
269 RT715_SET_GAIN_MIC2_L, RT715_DIR_IN_SFT, 3, 0,
270 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
272 SOC_DOUBLE_R_EXT_TLV("LINE1 Boost", RT715_SET_GAIN_LINE1_H,
273 RT715_SET_GAIN_LINE1_L, RT715_DIR_IN_SFT, 3, 0,
274 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
276 SOC_DOUBLE_R_EXT_TLV("LINE2 Boost", RT715_SET_GAIN_LINE2_H,
277 RT715_SET_GAIN_LINE2_L, RT715_DIR_IN_SFT, 3, 0,
278 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
282 static int rt715_mux_get(struct snd_kcontrol *kcontrol,
283 struct snd_ctl_elem_value *ucontrol)
285 struct snd_soc_component *component =
286 snd_soc_dapm_kcontrol_component(kcontrol);
287 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
288 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
289 unsigned int reg, val;
292 /* nid = e->reg, vid = 0xf01 */
293 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
294 ret = regmap_read(rt715->regmap, reg, &val);
296 dev_err(component->dev, "%s: sdw read failed: %d\n",
302 * The first two indices of ADC Mux 24/25 are routed to the same
303 * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2.
304 * To have a unique set of inputs, we skip the index1 of the muxes.
306 if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0))
308 ucontrol->value.enumerated.item[0] = val;
313 static int rt715_mux_put(struct snd_kcontrol *kcontrol,
314 struct snd_ctl_elem_value *ucontrol)
316 struct snd_soc_component *component =
317 snd_soc_dapm_kcontrol_component(kcontrol);
318 struct snd_soc_dapm_context *dapm =
319 snd_soc_dapm_kcontrol_dapm(kcontrol);
320 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
321 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
322 unsigned int *item = ucontrol->value.enumerated.item;
323 unsigned int val, val2 = 0, change, reg;
326 if (item[0] >= e->items)
329 /* Verb ID = 0x701h, nid = e->reg */
330 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
332 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
333 ret = regmap_read(rt715->regmap, reg, &val2);
335 dev_err(component->dev, "%s: sdw read failed: %d\n",
346 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
347 regmap_write(rt715->regmap, reg, val);
350 snd_soc_dapm_mux_update_power(dapm, kcontrol,
356 static const char * const adc_22_23_mux_text[] = {
368 * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
369 * 1 will be connected to the same dmic source, therefore we skip index 1 to
370 * avoid misunderstanding on usage of dapm routing.
372 static const unsigned int rt715_adc_24_25_values[] = {
380 static const char * const adc_24_mux_text[] = {
388 static const char * const adc_25_mux_text[] = {
396 static SOC_ENUM_SINGLE_DECL(
397 rt715_adc22_enum, RT715_MUX_IN1, 0, adc_22_23_mux_text);
399 static SOC_ENUM_SINGLE_DECL(
400 rt715_adc23_enum, RT715_MUX_IN2, 0, adc_22_23_mux_text);
402 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
403 RT715_MUX_IN3, 0, 0xf,
404 adc_24_mux_text, rt715_adc_24_25_values);
406 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
407 RT715_MUX_IN4, 0, 0xf,
408 adc_25_mux_text, rt715_adc_24_25_values);
410 static const struct snd_kcontrol_new rt715_adc22_mux =
411 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
412 rt715_mux_get, rt715_mux_put);
414 static const struct snd_kcontrol_new rt715_adc23_mux =
415 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
416 rt715_mux_get, rt715_mux_put);
418 static const struct snd_kcontrol_new rt715_adc24_mux =
419 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
420 rt715_mux_get, rt715_mux_put);
422 static const struct snd_kcontrol_new rt715_adc25_mux =
423 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
424 rt715_mux_get, rt715_mux_put);
426 static const struct snd_soc_dapm_widget rt715_dapm_widgets[] = {
427 SND_SOC_DAPM_INPUT("DMIC1"),
428 SND_SOC_DAPM_INPUT("DMIC2"),
429 SND_SOC_DAPM_INPUT("DMIC3"),
430 SND_SOC_DAPM_INPUT("DMIC4"),
431 SND_SOC_DAPM_INPUT("MIC1"),
432 SND_SOC_DAPM_INPUT("MIC2"),
433 SND_SOC_DAPM_INPUT("LINE1"),
434 SND_SOC_DAPM_INPUT("LINE2"),
435 SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
436 SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
437 SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
438 SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
439 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
441 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
443 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
445 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
447 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
448 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
451 static const struct snd_soc_dapm_route rt715_audio_map[] = {
452 {"DP6TX", NULL, "ADC 09"},
453 {"DP6TX", NULL, "ADC 08"},
454 {"DP4TX", NULL, "ADC 07"},
455 {"DP4TX", NULL, "ADC 27"},
456 {"ADC 09", NULL, "ADC 22 Mux"},
457 {"ADC 08", NULL, "ADC 23 Mux"},
458 {"ADC 07", NULL, "ADC 24 Mux"},
459 {"ADC 27", NULL, "ADC 25 Mux"},
460 {"ADC 22 Mux", "MIC1", "MIC1"},
461 {"ADC 22 Mux", "MIC2", "MIC2"},
462 {"ADC 22 Mux", "LINE1", "LINE1"},
463 {"ADC 22 Mux", "LINE2", "LINE2"},
464 {"ADC 22 Mux", "DMIC1", "DMIC1"},
465 {"ADC 22 Mux", "DMIC2", "DMIC2"},
466 {"ADC 22 Mux", "DMIC3", "DMIC3"},
467 {"ADC 22 Mux", "DMIC4", "DMIC4"},
468 {"ADC 23 Mux", "MIC1", "MIC1"},
469 {"ADC 23 Mux", "MIC2", "MIC2"},
470 {"ADC 23 Mux", "LINE1", "LINE1"},
471 {"ADC 23 Mux", "LINE2", "LINE2"},
472 {"ADC 23 Mux", "DMIC1", "DMIC1"},
473 {"ADC 23 Mux", "DMIC2", "DMIC2"},
474 {"ADC 23 Mux", "DMIC3", "DMIC3"},
475 {"ADC 23 Mux", "DMIC4", "DMIC4"},
476 {"ADC 24 Mux", "MIC2", "MIC2"},
477 {"ADC 24 Mux", "DMIC1", "DMIC1"},
478 {"ADC 24 Mux", "DMIC2", "DMIC2"},
479 {"ADC 24 Mux", "DMIC3", "DMIC3"},
480 {"ADC 24 Mux", "DMIC4", "DMIC4"},
481 {"ADC 25 Mux", "MIC1", "MIC1"},
482 {"ADC 25 Mux", "DMIC1", "DMIC1"},
483 {"ADC 25 Mux", "DMIC2", "DMIC2"},
484 {"ADC 25 Mux", "DMIC3", "DMIC3"},
485 {"ADC 25 Mux", "DMIC4", "DMIC4"},
488 static int rt715_set_bias_level(struct snd_soc_component *component,
489 enum snd_soc_bias_level level)
491 struct snd_soc_dapm_context *dapm =
492 snd_soc_component_get_dapm(component);
493 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
496 case SND_SOC_BIAS_PREPARE:
497 if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
498 regmap_write(rt715->regmap,
499 RT715_SET_AUDIO_POWER_STATE,
504 case SND_SOC_BIAS_STANDBY:
505 regmap_write(rt715->regmap,
506 RT715_SET_AUDIO_POWER_STATE,
513 dapm->bias_level = level;
517 static const struct snd_soc_component_driver soc_codec_dev_rt715 = {
518 .set_bias_level = rt715_set_bias_level,
519 .controls = rt715_snd_controls,
520 .num_controls = ARRAY_SIZE(rt715_snd_controls),
521 .dapm_widgets = rt715_dapm_widgets,
522 .num_dapm_widgets = ARRAY_SIZE(rt715_dapm_widgets),
523 .dapm_routes = rt715_audio_map,
524 .num_dapm_routes = ARRAY_SIZE(rt715_audio_map),
527 static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
531 struct sdw_stream_data *stream;
533 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
537 stream->sdw_stream = (struct sdw_stream_runtime *)sdw_stream;
539 /* Use tx_mask or rx_mask to configure stream tag and set dma_data */
540 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
541 dai->playback_dma_data = stream;
543 dai->capture_dma_data = stream;
548 static void rt715_shutdown(struct snd_pcm_substream *substream,
549 struct snd_soc_dai *dai)
552 struct sdw_stream_data *stream;
554 stream = snd_soc_dai_get_dma_data(dai, substream);
555 snd_soc_dai_set_dma_data(dai, substream, NULL);
559 static int rt715_pcm_hw_params(struct snd_pcm_substream *substream,
560 struct snd_pcm_hw_params *params,
561 struct snd_soc_dai *dai)
563 struct snd_soc_component *component = dai->component;
564 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
565 struct sdw_stream_config stream_config;
566 struct sdw_port_config port_config;
567 enum sdw_data_direction direction;
568 struct sdw_stream_data *stream;
569 int retval, port, num_channels;
570 unsigned int val = 0;
572 stream = snd_soc_dai_get_dma_data(dai, substream);
582 direction = SDW_DATA_DIR_TX;
584 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500);
587 direction = SDW_DATA_DIR_TX;
589 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000);
592 dev_err(component->dev, "Invalid DAI id %d\n", dai->id);
596 stream_config.frame_rate = params_rate(params);
597 stream_config.ch_count = params_channels(params);
598 stream_config.bps = snd_pcm_format_width(params_format(params));
599 stream_config.direction = direction;
601 num_channels = params_channels(params);
602 port_config.ch_mask = (1 << (num_channels)) - 1;
603 port_config.num = port;
605 retval = sdw_stream_add_slave(rt715->slave, &stream_config,
606 &port_config, 1, stream->sdw_stream);
608 dev_err(dai->dev, "Unable to configure port\n");
612 switch (params_rate(params)) {
613 /* bit 14 0:48K 1:44.1K */
614 /* bit 15 Stream Type 0:PCM 1:Non-PCM, should always be PCM */
622 dev_err(component->dev, "Unsupported sample rate %d\n",
623 params_rate(params));
627 if (params_channels(params) <= 16) {
628 /* bit 3:0 Number of Channel */
629 val |= (params_channels(params) - 1);
631 dev_err(component->dev, "Unsupported channels %d\n",
632 params_channels(params));
636 switch (params_width(params)) {
637 /* bit 6:4 Bits per Sample */
656 regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val);
657 regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val);
658 regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val);
659 regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val);
664 static int rt715_pcm_hw_free(struct snd_pcm_substream *substream,
665 struct snd_soc_dai *dai)
667 struct snd_soc_component *component = dai->component;
668 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
669 struct sdw_stream_data *stream =
670 snd_soc_dai_get_dma_data(dai, substream);
675 sdw_stream_remove_slave(rt715->slave, stream->sdw_stream);
679 #define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
680 #define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
681 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
683 static struct snd_soc_dai_ops rt715_ops = {
684 .hw_params = rt715_pcm_hw_params,
685 .hw_free = rt715_pcm_hw_free,
686 .set_sdw_stream = rt715_set_sdw_stream,
687 .shutdown = rt715_shutdown,
690 static struct snd_soc_dai_driver rt715_dai[] = {
692 .name = "rt715-aif1",
695 .stream_name = "DP6 Capture",
698 .rates = RT715_STEREO_RATES,
699 .formats = RT715_FORMATS,
704 .name = "rt715-aif2",
707 .stream_name = "DP4 Capture",
710 .rates = RT715_STEREO_RATES,
711 .formats = RT715_FORMATS,
717 /* Bus clock frequency */
718 #define RT715_CLK_FREQ_9600000HZ 9600000
719 #define RT715_CLK_FREQ_12000000HZ 12000000
720 #define RT715_CLK_FREQ_6000000HZ 6000000
721 #define RT715_CLK_FREQ_4800000HZ 4800000
722 #define RT715_CLK_FREQ_2400000HZ 2400000
723 #define RT715_CLK_FREQ_12288000HZ 12288000
725 int rt715_clock_config(struct device *dev)
727 struct rt715_priv *rt715 = dev_get_drvdata(dev);
728 unsigned int clk_freq, value;
730 clk_freq = (rt715->params.curr_dr_freq >> 1);
733 case RT715_CLK_FREQ_12000000HZ:
736 case RT715_CLK_FREQ_6000000HZ:
739 case RT715_CLK_FREQ_9600000HZ:
742 case RT715_CLK_FREQ_4800000HZ:
745 case RT715_CLK_FREQ_2400000HZ:
748 case RT715_CLK_FREQ_12288000HZ:
755 regmap_write(rt715->regmap, 0xe0, value);
756 regmap_write(rt715->regmap, 0xf0, value);
761 int rt715_init(struct device *dev, struct regmap *sdw_regmap,
762 struct regmap *regmap, struct sdw_slave *slave)
764 struct rt715_priv *rt715;
767 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
771 dev_set_drvdata(dev, rt715);
772 rt715->slave = slave;
773 rt715->regmap = regmap;
774 rt715->sdw_regmap = sdw_regmap;
777 * Mark hw_init to false
778 * HW init will be performed when device reports present
780 rt715->hw_init = false;
781 rt715->first_hw_init = false;
783 ret = devm_snd_soc_register_component(dev,
784 &soc_codec_dev_rt715,
786 ARRAY_SIZE(rt715_dai));
791 int rt715_io_init(struct device *dev, struct sdw_slave *slave)
793 struct rt715_priv *rt715 = dev_get_drvdata(dev);
799 * PM runtime is only enabled when a Slave reports as Attached
801 if (!rt715->first_hw_init) {
802 /* set autosuspend parameters */
803 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
804 pm_runtime_use_autosuspend(&slave->dev);
806 /* update count of parent 'active' children */
807 pm_runtime_set_active(&slave->dev);
809 /* make sure the device does not suspend immediately */
810 pm_runtime_mark_last_busy(&slave->dev);
812 pm_runtime_enable(&slave->dev);
815 pm_runtime_get_noresume(&slave->dev);
817 /* Mute nid=08h/09h */
818 regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080);
819 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080);
820 /* Mute nid=07h/27h */
821 regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080);
822 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080);
825 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20);
826 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20);
827 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20);
828 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20);
829 /* Set Converter Stream */
830 regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10);
831 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10);
832 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10);
833 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10);
834 /* Set Configuration Default */
835 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0);
836 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11);
837 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1);
838 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81);
839 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1);
840 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11);
841 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1);
842 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81);
843 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0);
844 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11);
845 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1);
846 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81);
847 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1);
848 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11);
849 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1);
850 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81);
852 /* Finish Initial Settings, set power to D3 */
853 regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
855 if (rt715->first_hw_init)
856 regcache_mark_dirty(rt715->regmap);
858 rt715->first_hw_init = true;
860 /* Mark Slave initialization complete */
861 rt715->hw_init = true;
863 pm_runtime_mark_last_busy(&slave->dev);
864 pm_runtime_put_autosuspend(&slave->dev);
869 MODULE_DESCRIPTION("ASoC rt715 driver");
870 MODULE_DESCRIPTION("ASoC rt715 driver SDW");
871 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
872 MODULE_LICENSE("GPL v2");