1 // SPDX-License-Identifier: GPL-2.0
3 * rt715.c -- rt715 ALSA SoC audio driver
5 * Copyright(c) 2019 Realtek Semiconductor Corp.
7 * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/pm_runtime.h>
18 #include <linux/soundwire/sdw.h>
19 #include <linux/gpio.h>
20 #include <linux/regmap.h>
21 #include <linux/slab.h>
22 #include <linux/platform_device.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/gpio/consumer.h>
26 #include <linux/of_gpio.h>
27 #include <linux/of_device.h>
28 #include <sound/core.h>
29 #include <sound/pcm.h>
30 #include <sound/pcm_params.h>
31 #include <sound/soc.h>
32 #include <sound/soc-dapm.h>
33 #include <sound/initval.h>
34 #include <sound/tlv.h>
35 #include <sound/hda_verbs.h>
39 static int rt715_index_write(struct regmap *regmap, unsigned int reg,
43 unsigned int addr = ((RT715_PRIV_INDEX_W_H) << 8) | reg;
45 ret = regmap_write(regmap, addr, value);
47 pr_err("Failed to set private value: %08x <= %04x %d\n", ret,
54 static void rt715_get_gain(struct rt715_priv *rt715, unsigned int addr_h,
55 unsigned int addr_l, unsigned int val_h,
56 unsigned int *r_val, unsigned int *l_val)
61 ret = regmap_read(rt715->regmap, addr_l, r_val);
63 pr_err("Failed to get R channel gain.\n");
68 ret = regmap_read(rt715->regmap, addr_h, l_val);
70 pr_err("Failed to get L channel gain.\n");
73 /* For Verb-Set Amplifier Gain (Verb ID = 3h) */
74 static int rt715_set_amp_gain_put(struct snd_kcontrol *kcontrol,
75 struct snd_ctl_elem_value *ucontrol)
77 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
78 struct snd_soc_dapm_context *dapm =
79 snd_soc_component_get_dapm(component);
80 struct soc_mixer_control *mc =
81 (struct soc_mixer_control *)kcontrol->private_value;
82 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
83 unsigned int addr_h, addr_l, val_h, val_ll, val_lr;
84 unsigned int read_ll, read_rl, i;
85 unsigned int k_vol_changed = 0;
87 for (i = 0; i < 2; i++) {
88 if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_vol_ori[i]) {
94 /* Can't use update bit function, so read the original value first */
98 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
103 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
105 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
106 regmap_write(rt715->regmap,
107 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
110 rt715->kctl_2ch_vol_ori[0] = ucontrol->value.integer.value[0];
112 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f);
113 if (val_ll > mc->max)
115 /* keep mute status */
116 val_ll |= read_ll & 0x80;
119 rt715->kctl_2ch_vol_ori[1] = ucontrol->value.integer.value[1];
121 val_lr = ((ucontrol->value.integer.value[1]) & 0x7f);
122 if (val_lr > mc->max)
124 /* keep mute status */
125 val_lr |= read_rl & 0x80;
127 for (i = 0; i < 3; i++) { /* retry 3 times at most */
129 if (val_ll == val_lr) {
130 /* Set both L/R channels at the same time */
131 val_h = (1 << mc->shift) | (3 << 4);
132 regmap_write(rt715->regmap, addr_h,
133 (val_h << 8) | val_ll);
134 regmap_write(rt715->regmap, addr_l,
135 (val_h << 8) | val_ll);
138 val_h = (1 << mc->shift) | (1 << 5);
139 regmap_write(rt715->regmap, addr_h,
140 (val_h << 8) | val_ll);
142 val_h = (1 << mc->shift) | (1 << 4);
143 regmap_write(rt715->regmap, addr_l,
144 (val_h << 8) | val_lr);
147 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
152 rt715_get_gain(rt715, addr_h, addr_l, val_h,
154 if (read_rl == val_lr && read_ll == val_ll)
158 /* D0:power on state, D3: power saving mode */
159 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
160 regmap_write(rt715->regmap,
161 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
162 return k_vol_changed;
165 static int rt715_set_amp_gain_get(struct snd_kcontrol *kcontrol,
166 struct snd_ctl_elem_value *ucontrol)
168 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
169 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
170 struct soc_mixer_control *mc =
171 (struct soc_mixer_control *)kcontrol->private_value;
172 unsigned int addr_h, addr_l, val_h;
173 unsigned int read_ll, read_rl;
177 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
182 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
185 /* for mute status */
186 read_ll = !(read_ll & 0x80);
187 read_rl = !(read_rl & 0x80);
190 read_ll = read_ll & 0x7f;
191 read_rl = read_rl & 0x7f;
193 ucontrol->value.integer.value[0] = read_ll;
194 ucontrol->value.integer.value[1] = read_rl;
199 static int rt715_set_main_switch_put(struct snd_kcontrol *kcontrol,
200 struct snd_ctl_elem_value *ucontrol)
202 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
203 struct snd_soc_dapm_context *dapm =
204 snd_soc_component_get_dapm(component);
205 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
206 unsigned int capture_reg_H[] = {RT715_SET_GAIN_MIC_ADC_H,
207 RT715_SET_GAIN_LINE_ADC_H, RT715_SET_GAIN_MIX_ADC_H,
208 RT715_SET_GAIN_MIX_ADC2_H};
209 unsigned int capture_reg_L[] = {RT715_SET_GAIN_MIC_ADC_L,
210 RT715_SET_GAIN_LINE_ADC_L, RT715_SET_GAIN_MIX_ADC_L,
211 RT715_SET_GAIN_MIX_ADC2_L};
212 unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr;
213 unsigned int k_shift = RT715_DIR_IN_SFT, k_changed = 0;
214 unsigned int read_ll, read_rl, i, j, loop_cnt = 4;
216 for (i = 0; i < 8; i++) {
217 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_switch_ori[i])
221 for (j = 0; j < loop_cnt; j++) {
222 /* Can't use update bit function, so read the original value first */
223 addr_h = capture_reg_H[j];
224 addr_l = capture_reg_L[j];
225 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
227 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
228 regmap_write(rt715->regmap,
229 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
233 rt715->kctl_8ch_switch_ori[j * 2] =
234 ucontrol->value.integer.value[j * 2];
235 val_ll = (!ucontrol->value.integer.value[j * 2]) << 7;
237 val_ll |= read_ll & 0x7f;
241 rt715->kctl_8ch_switch_ori[j * 2 + 1] =
242 ucontrol->value.integer.value[j * 2 + 1];
243 val_lr = (!ucontrol->value.integer.value[j * 2 + 1]) << 7;
245 val_lr |= read_rl & 0x7f;
247 for (i = 0; i < 3; i++) { /* retry 3 times at most */
249 if (val_ll == val_lr) {
250 /* Set both L/R channels at the same time */
251 val_h = (1 << k_shift) | (3 << 4);
252 regmap_write(rt715->regmap, addr_h,
253 (val_h << 8) | val_ll);
254 regmap_write(rt715->regmap, addr_l,
255 (val_h << 8) | val_ll);
258 val_h = (1 << k_shift) | (1 << 5);
259 regmap_write(rt715->regmap, addr_h,
260 (val_h << 8) | val_ll);
262 val_h = (1 << k_shift) | (1 << 4);
263 regmap_write(rt715->regmap, addr_l,
264 (val_h << 8) | val_lr);
267 rt715_get_gain(rt715, addr_h, addr_l, val_h,
269 if (read_rl == val_lr && read_ll == val_ll)
274 /* D0:power on state, D3: power saving mode */
275 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
276 regmap_write(rt715->regmap,
277 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
281 static int rt715_set_main_switch_get(struct snd_kcontrol *kcontrol,
282 struct snd_ctl_elem_value *ucontrol)
284 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
285 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
286 unsigned int capture_reg_H[] = {RT715_SET_GAIN_MIC_ADC_H,
287 RT715_SET_GAIN_LINE_ADC_H, RT715_SET_GAIN_MIX_ADC_H,
288 RT715_SET_GAIN_MIX_ADC2_H};
289 unsigned int capture_reg_L[] = {RT715_SET_GAIN_MIC_ADC_L,
290 RT715_SET_GAIN_LINE_ADC_L, RT715_SET_GAIN_MIX_ADC_L,
291 RT715_SET_GAIN_MIX_ADC2_L};
292 unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4;
293 unsigned int read_ll, read_rl;
295 for (i = 0; i < loop_cnt; i++) {
296 addr_h = capture_reg_H[i];
297 addr_l = capture_reg_L[i];
298 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
300 ucontrol->value.integer.value[i * 2] = !(read_ll & 0x80);
301 ucontrol->value.integer.value[i * 2 + 1] = !(read_rl & 0x80);
307 static int rt715_set_main_vol_put(struct snd_kcontrol *kcontrol,
308 struct snd_ctl_elem_value *ucontrol)
310 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
311 struct snd_soc_dapm_context *dapm =
312 snd_soc_component_get_dapm(component);
313 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
314 unsigned int capture_reg_H[] = {RT715_SET_GAIN_MIC_ADC_H,
315 RT715_SET_GAIN_LINE_ADC_H, RT715_SET_GAIN_MIX_ADC_H,
316 RT715_SET_GAIN_MIX_ADC2_H};
317 unsigned int capture_reg_L[] = {RT715_SET_GAIN_MIC_ADC_L,
318 RT715_SET_GAIN_LINE_ADC_L, RT715_SET_GAIN_MIX_ADC_L,
319 RT715_SET_GAIN_MIX_ADC2_L};
320 unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr;
321 unsigned int read_ll, read_rl, i, j, loop_cnt = 4, k_changed = 0;
322 unsigned int k_shift = RT715_DIR_IN_SFT, k_max = 0x3f;
324 for (i = 0; i < 8; i++) {
325 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_vol_ori[i])
329 for (j = 0; j < loop_cnt; j++) {
330 addr_h = capture_reg_H[j];
331 addr_l = capture_reg_L[j];
332 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
334 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
335 regmap_write(rt715->regmap,
336 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
340 rt715->kctl_8ch_vol_ori[j * 2] = ucontrol->value.integer.value[j * 2];
341 val_ll = ((ucontrol->value.integer.value[j * 2]) & 0x7f);
344 /* keep mute status */
345 val_ll |= read_ll & 0x80;
349 rt715->kctl_8ch_vol_ori[j * 2 + 1] =
350 ucontrol->value.integer.value[j * 2 + 1];
351 val_lr = ((ucontrol->value.integer.value[j * 2 + 1]) & 0x7f);
354 /* keep mute status */
355 val_lr |= read_rl & 0x80;
357 for (i = 0; i < 3; i++) { /* retry 3 times at most */
358 if (val_ll == val_lr) {
359 /* Set both L/R channels at the same time */
360 val_h = (1 << k_shift) | (3 << 4);
361 regmap_write(rt715->regmap, addr_h,
362 (val_h << 8) | val_ll);
363 regmap_write(rt715->regmap, addr_l,
364 (val_h << 8) | val_ll);
367 val_h = (1 << k_shift) | (1 << 5);
368 regmap_write(rt715->regmap, addr_h,
369 (val_h << 8) | val_ll);
371 val_h = (1 << k_shift) | (1 << 4);
372 regmap_write(rt715->regmap, addr_l,
373 (val_h << 8) | val_lr);
376 rt715_get_gain(rt715, addr_h, addr_l, val_h,
378 if (read_rl == val_lr && read_ll == val_ll)
383 /* D0:power on state, D3: power saving mode */
384 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
385 regmap_write(rt715->regmap,
386 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
390 static int rt715_set_main_vol_get(struct snd_kcontrol *kcontrol,
391 struct snd_ctl_elem_value *ucontrol)
393 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
394 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
395 unsigned int capture_reg_H[] = {RT715_SET_GAIN_MIC_ADC_H,
396 RT715_SET_GAIN_LINE_ADC_H, RT715_SET_GAIN_MIX_ADC_H,
397 RT715_SET_GAIN_MIX_ADC2_H};
398 unsigned int capture_reg_L[] = {RT715_SET_GAIN_MIC_ADC_L,
399 RT715_SET_GAIN_LINE_ADC_L, RT715_SET_GAIN_MIX_ADC_L,
400 RT715_SET_GAIN_MIX_ADC2_L};
401 unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4;
402 unsigned int read_ll, read_rl;
404 for (i = 0; i < loop_cnt; i++) {
405 addr_h = capture_reg_H[i];
406 addr_l = capture_reg_L[i];
407 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
409 ucontrol->value.integer.value[i * 2] = read_ll & 0x7f;
410 ucontrol->value.integer.value[i * 2 + 1] = read_rl & 0x7f;
416 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
417 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
419 static int rt715_switch_info(struct snd_kcontrol *kcontrol,
420 struct snd_ctl_elem_info *uinfo)
422 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
424 uinfo->value.integer.min = 0;
425 uinfo->value.integer.max = 1;
429 static int rt715_vol_info(struct snd_kcontrol *kcontrol,
430 struct snd_ctl_elem_info *uinfo)
432 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
434 uinfo->value.integer.min = 0;
435 uinfo->value.integer.max = 0x3f;
439 #define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\
440 xhandler_get, xhandler_put) \
441 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
442 .info = snd_soc_info_volsw, \
443 .get = xhandler_get, .put = xhandler_put, \
444 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
447 #define RT715_MAIN_SWITCH_EXT(xname, xhandler_get, xhandler_put) \
448 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
449 .info = rt715_switch_info, \
450 .get = xhandler_get, .put = xhandler_put, \
453 #define RT715_MAIN_VOL_EXT_TLV(xname, xhandler_get, xhandler_put, tlv_array) \
454 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
455 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
456 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
457 .tlv.p = (tlv_array), \
458 .info = rt715_vol_info, \
459 .get = xhandler_get, .put = xhandler_put, \
462 static const struct snd_kcontrol_new rt715_snd_controls[] = {
464 RT715_MAIN_SWITCH_EXT("Capture Switch",
465 rt715_set_main_switch_get, rt715_set_main_switch_put),
467 RT715_MAIN_VOL_EXT_TLV("Capture Volume",
468 rt715_set_main_vol_get, rt715_set_main_vol_put, in_vol_tlv),
469 /* MIC Boost Control */
470 SOC_DOUBLE_R_EXT_TLV("DMIC1 Boost", RT715_SET_GAIN_DMIC1_H,
471 RT715_SET_GAIN_DMIC1_L, RT715_DIR_IN_SFT, 3, 0,
472 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
474 SOC_DOUBLE_R_EXT_TLV("DMIC2 Boost", RT715_SET_GAIN_DMIC2_H,
475 RT715_SET_GAIN_DMIC2_L, RT715_DIR_IN_SFT, 3, 0,
476 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
478 SOC_DOUBLE_R_EXT_TLV("DMIC3 Boost", RT715_SET_GAIN_DMIC3_H,
479 RT715_SET_GAIN_DMIC3_L, RT715_DIR_IN_SFT, 3, 0,
480 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
482 SOC_DOUBLE_R_EXT_TLV("DMIC4 Boost", RT715_SET_GAIN_DMIC4_H,
483 RT715_SET_GAIN_DMIC4_L, RT715_DIR_IN_SFT, 3, 0,
484 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
486 SOC_DOUBLE_R_EXT_TLV("MIC1 Boost", RT715_SET_GAIN_MIC1_H,
487 RT715_SET_GAIN_MIC1_L, RT715_DIR_IN_SFT, 3, 0,
488 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
490 SOC_DOUBLE_R_EXT_TLV("MIC2 Boost", RT715_SET_GAIN_MIC2_H,
491 RT715_SET_GAIN_MIC2_L, RT715_DIR_IN_SFT, 3, 0,
492 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
494 SOC_DOUBLE_R_EXT_TLV("LINE1 Boost", RT715_SET_GAIN_LINE1_H,
495 RT715_SET_GAIN_LINE1_L, RT715_DIR_IN_SFT, 3, 0,
496 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
498 SOC_DOUBLE_R_EXT_TLV("LINE2 Boost", RT715_SET_GAIN_LINE2_H,
499 RT715_SET_GAIN_LINE2_L, RT715_DIR_IN_SFT, 3, 0,
500 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
504 static int rt715_mux_get(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
507 struct snd_soc_component *component =
508 snd_soc_dapm_kcontrol_component(kcontrol);
509 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
510 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
511 unsigned int reg, val;
514 /* nid = e->reg, vid = 0xf01 */
515 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
516 ret = regmap_read(rt715->regmap, reg, &val);
518 dev_err(component->dev, "%s: sdw read failed: %d\n",
524 * The first two indices of ADC Mux 24/25 are routed to the same
525 * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2.
526 * To have a unique set of inputs, we skip the index1 of the muxes.
528 if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0))
530 ucontrol->value.enumerated.item[0] = val;
535 static int rt715_mux_put(struct snd_kcontrol *kcontrol,
536 struct snd_ctl_elem_value *ucontrol)
538 struct snd_soc_component *component =
539 snd_soc_dapm_kcontrol_component(kcontrol);
540 struct snd_soc_dapm_context *dapm =
541 snd_soc_dapm_kcontrol_dapm(kcontrol);
542 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
543 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
544 unsigned int *item = ucontrol->value.enumerated.item;
545 unsigned int val, val2 = 0, change, reg;
548 if (item[0] >= e->items)
551 /* Verb ID = 0x701h, nid = e->reg */
552 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
554 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
555 ret = regmap_read(rt715->regmap, reg, &val2);
557 dev_err(component->dev, "%s: sdw read failed: %d\n",
568 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
569 regmap_write(rt715->regmap, reg, val);
572 snd_soc_dapm_mux_update_power(dapm, kcontrol,
578 static const char * const adc_22_23_mux_text[] = {
590 * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
591 * 1 will be connected to the same dmic source, therefore we skip index 1 to
592 * avoid misunderstanding on usage of dapm routing.
594 static const unsigned int rt715_adc_24_25_values[] = {
602 static const char * const adc_24_mux_text[] = {
610 static const char * const adc_25_mux_text[] = {
618 static SOC_ENUM_SINGLE_DECL(
619 rt715_adc22_enum, RT715_MUX_IN1, 0, adc_22_23_mux_text);
621 static SOC_ENUM_SINGLE_DECL(
622 rt715_adc23_enum, RT715_MUX_IN2, 0, adc_22_23_mux_text);
624 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
625 RT715_MUX_IN3, 0, 0xf,
626 adc_24_mux_text, rt715_adc_24_25_values);
628 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
629 RT715_MUX_IN4, 0, 0xf,
630 adc_25_mux_text, rt715_adc_24_25_values);
632 static const struct snd_kcontrol_new rt715_adc22_mux =
633 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
634 rt715_mux_get, rt715_mux_put);
636 static const struct snd_kcontrol_new rt715_adc23_mux =
637 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
638 rt715_mux_get, rt715_mux_put);
640 static const struct snd_kcontrol_new rt715_adc24_mux =
641 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
642 rt715_mux_get, rt715_mux_put);
644 static const struct snd_kcontrol_new rt715_adc25_mux =
645 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
646 rt715_mux_get, rt715_mux_put);
648 static const struct snd_soc_dapm_widget rt715_dapm_widgets[] = {
649 SND_SOC_DAPM_INPUT("DMIC1"),
650 SND_SOC_DAPM_INPUT("DMIC2"),
651 SND_SOC_DAPM_INPUT("DMIC3"),
652 SND_SOC_DAPM_INPUT("DMIC4"),
653 SND_SOC_DAPM_INPUT("MIC1"),
654 SND_SOC_DAPM_INPUT("MIC2"),
655 SND_SOC_DAPM_INPUT("LINE1"),
656 SND_SOC_DAPM_INPUT("LINE2"),
657 SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
658 SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
659 SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
660 SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
661 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
663 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
665 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
667 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
669 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
670 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
673 static const struct snd_soc_dapm_route rt715_audio_map[] = {
674 {"DP6TX", NULL, "ADC 09"},
675 {"DP6TX", NULL, "ADC 08"},
676 {"DP4TX", NULL, "ADC 07"},
677 {"DP4TX", NULL, "ADC 27"},
678 {"ADC 09", NULL, "ADC 22 Mux"},
679 {"ADC 08", NULL, "ADC 23 Mux"},
680 {"ADC 07", NULL, "ADC 24 Mux"},
681 {"ADC 27", NULL, "ADC 25 Mux"},
682 {"ADC 22 Mux", "MIC1", "MIC1"},
683 {"ADC 22 Mux", "MIC2", "MIC2"},
684 {"ADC 22 Mux", "LINE1", "LINE1"},
685 {"ADC 22 Mux", "LINE2", "LINE2"},
686 {"ADC 22 Mux", "DMIC1", "DMIC1"},
687 {"ADC 22 Mux", "DMIC2", "DMIC2"},
688 {"ADC 22 Mux", "DMIC3", "DMIC3"},
689 {"ADC 22 Mux", "DMIC4", "DMIC4"},
690 {"ADC 23 Mux", "MIC1", "MIC1"},
691 {"ADC 23 Mux", "MIC2", "MIC2"},
692 {"ADC 23 Mux", "LINE1", "LINE1"},
693 {"ADC 23 Mux", "LINE2", "LINE2"},
694 {"ADC 23 Mux", "DMIC1", "DMIC1"},
695 {"ADC 23 Mux", "DMIC2", "DMIC2"},
696 {"ADC 23 Mux", "DMIC3", "DMIC3"},
697 {"ADC 23 Mux", "DMIC4", "DMIC4"},
698 {"ADC 24 Mux", "MIC2", "MIC2"},
699 {"ADC 24 Mux", "DMIC1", "DMIC1"},
700 {"ADC 24 Mux", "DMIC2", "DMIC2"},
701 {"ADC 24 Mux", "DMIC3", "DMIC3"},
702 {"ADC 24 Mux", "DMIC4", "DMIC4"},
703 {"ADC 25 Mux", "MIC1", "MIC1"},
704 {"ADC 25 Mux", "DMIC1", "DMIC1"},
705 {"ADC 25 Mux", "DMIC2", "DMIC2"},
706 {"ADC 25 Mux", "DMIC3", "DMIC3"},
707 {"ADC 25 Mux", "DMIC4", "DMIC4"},
710 static int rt715_set_bias_level(struct snd_soc_component *component,
711 enum snd_soc_bias_level level)
713 struct snd_soc_dapm_context *dapm =
714 snd_soc_component_get_dapm(component);
715 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
718 case SND_SOC_BIAS_PREPARE:
719 if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
720 regmap_write(rt715->regmap,
721 RT715_SET_AUDIO_POWER_STATE,
723 msleep(RT715_POWER_UP_DELAY_MS);
727 case SND_SOC_BIAS_STANDBY:
728 regmap_write(rt715->regmap,
729 RT715_SET_AUDIO_POWER_STATE,
736 dapm->bias_level = level;
740 static const struct snd_soc_component_driver soc_codec_dev_rt715 = {
741 .set_bias_level = rt715_set_bias_level,
742 .controls = rt715_snd_controls,
743 .num_controls = ARRAY_SIZE(rt715_snd_controls),
744 .dapm_widgets = rt715_dapm_widgets,
745 .num_dapm_widgets = ARRAY_SIZE(rt715_dapm_widgets),
746 .dapm_routes = rt715_audio_map,
747 .num_dapm_routes = ARRAY_SIZE(rt715_audio_map),
750 static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
754 struct sdw_stream_data *stream;
759 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
763 stream->sdw_stream = sdw_stream;
765 /* Use tx_mask or rx_mask to configure stream tag and set dma_data */
766 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
767 dai->playback_dma_data = stream;
769 dai->capture_dma_data = stream;
774 static void rt715_shutdown(struct snd_pcm_substream *substream,
775 struct snd_soc_dai *dai)
778 struct sdw_stream_data *stream;
780 stream = snd_soc_dai_get_dma_data(dai, substream);
781 snd_soc_dai_set_dma_data(dai, substream, NULL);
785 static int rt715_pcm_hw_params(struct snd_pcm_substream *substream,
786 struct snd_pcm_hw_params *params,
787 struct snd_soc_dai *dai)
789 struct snd_soc_component *component = dai->component;
790 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
791 struct sdw_stream_config stream_config;
792 struct sdw_port_config port_config;
793 enum sdw_data_direction direction;
794 struct sdw_stream_data *stream;
795 int retval, port, num_channels;
796 unsigned int val = 0;
798 stream = snd_soc_dai_get_dma_data(dai, substream);
808 direction = SDW_DATA_DIR_TX;
810 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500);
813 direction = SDW_DATA_DIR_TX;
815 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000);
818 dev_err(component->dev, "Invalid DAI id %d\n", dai->id);
822 stream_config.frame_rate = params_rate(params);
823 stream_config.ch_count = params_channels(params);
824 stream_config.bps = snd_pcm_format_width(params_format(params));
825 stream_config.direction = direction;
827 num_channels = params_channels(params);
828 port_config.ch_mask = (1 << (num_channels)) - 1;
829 port_config.num = port;
831 retval = sdw_stream_add_slave(rt715->slave, &stream_config,
832 &port_config, 1, stream->sdw_stream);
834 dev_err(dai->dev, "Unable to configure port\n");
838 switch (params_rate(params)) {
839 /* bit 14 0:48K 1:44.1K */
840 /* bit 15 Stream Type 0:PCM 1:Non-PCM, should always be PCM */
848 dev_err(component->dev, "Unsupported sample rate %d\n",
849 params_rate(params));
853 if (params_channels(params) <= 16) {
854 /* bit 3:0 Number of Channel */
855 val |= (params_channels(params) - 1);
857 dev_err(component->dev, "Unsupported channels %d\n",
858 params_channels(params));
862 switch (params_width(params)) {
863 /* bit 6:4 Bits per Sample */
882 regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val);
883 regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val);
884 regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val);
885 regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val);
890 static int rt715_pcm_hw_free(struct snd_pcm_substream *substream,
891 struct snd_soc_dai *dai)
893 struct snd_soc_component *component = dai->component;
894 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
895 struct sdw_stream_data *stream =
896 snd_soc_dai_get_dma_data(dai, substream);
901 sdw_stream_remove_slave(rt715->slave, stream->sdw_stream);
905 #define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
906 #define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
907 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
909 static const struct snd_soc_dai_ops rt715_ops = {
910 .hw_params = rt715_pcm_hw_params,
911 .hw_free = rt715_pcm_hw_free,
912 .set_sdw_stream = rt715_set_sdw_stream,
913 .shutdown = rt715_shutdown,
916 static struct snd_soc_dai_driver rt715_dai[] = {
918 .name = "rt715-aif1",
921 .stream_name = "DP6 Capture",
924 .rates = RT715_STEREO_RATES,
925 .formats = RT715_FORMATS,
930 .name = "rt715-aif2",
933 .stream_name = "DP4 Capture",
936 .rates = RT715_STEREO_RATES,
937 .formats = RT715_FORMATS,
943 /* Bus clock frequency */
944 #define RT715_CLK_FREQ_9600000HZ 9600000
945 #define RT715_CLK_FREQ_12000000HZ 12000000
946 #define RT715_CLK_FREQ_6000000HZ 6000000
947 #define RT715_CLK_FREQ_4800000HZ 4800000
948 #define RT715_CLK_FREQ_2400000HZ 2400000
949 #define RT715_CLK_FREQ_12288000HZ 12288000
951 int rt715_clock_config(struct device *dev)
953 struct rt715_priv *rt715 = dev_get_drvdata(dev);
954 unsigned int clk_freq, value;
956 clk_freq = (rt715->params.curr_dr_freq >> 1);
959 case RT715_CLK_FREQ_12000000HZ:
962 case RT715_CLK_FREQ_6000000HZ:
965 case RT715_CLK_FREQ_9600000HZ:
968 case RT715_CLK_FREQ_4800000HZ:
971 case RT715_CLK_FREQ_2400000HZ:
974 case RT715_CLK_FREQ_12288000HZ:
981 regmap_write(rt715->regmap, 0xe0, value);
982 regmap_write(rt715->regmap, 0xf0, value);
987 int rt715_init(struct device *dev, struct regmap *sdw_regmap,
988 struct regmap *regmap, struct sdw_slave *slave)
990 struct rt715_priv *rt715;
993 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
997 dev_set_drvdata(dev, rt715);
998 rt715->slave = slave;
999 rt715->regmap = regmap;
1000 rt715->sdw_regmap = sdw_regmap;
1003 * Mark hw_init to false
1004 * HW init will be performed when device reports present
1006 rt715->hw_init = false;
1007 rt715->first_hw_init = false;
1009 ret = devm_snd_soc_register_component(dev,
1010 &soc_codec_dev_rt715,
1012 ARRAY_SIZE(rt715_dai));
1017 int rt715_io_init(struct device *dev, struct sdw_slave *slave)
1019 struct rt715_priv *rt715 = dev_get_drvdata(dev);
1025 * PM runtime is only enabled when a Slave reports as Attached
1027 if (!rt715->first_hw_init) {
1028 /* set autosuspend parameters */
1029 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
1030 pm_runtime_use_autosuspend(&slave->dev);
1032 /* update count of parent 'active' children */
1033 pm_runtime_set_active(&slave->dev);
1035 /* make sure the device does not suspend immediately */
1036 pm_runtime_mark_last_busy(&slave->dev);
1038 pm_runtime_enable(&slave->dev);
1041 pm_runtime_get_noresume(&slave->dev);
1043 /* Mute nid=08h/09h */
1044 regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080);
1045 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080);
1046 /* Mute nid=07h/27h */
1047 regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080);
1048 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080);
1050 /* Set Pin Widget */
1051 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20);
1052 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20);
1053 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20);
1054 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20);
1055 /* Set Converter Stream */
1056 regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10);
1057 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10);
1058 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10);
1059 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10);
1060 /* Set Configuration Default */
1061 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0);
1062 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11);
1063 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1);
1064 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81);
1065 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1);
1066 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11);
1067 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1);
1068 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81);
1069 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0);
1070 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11);
1071 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1);
1072 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81);
1073 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1);
1074 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11);
1075 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1);
1076 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81);
1078 /* Finish Initial Settings, set power to D3 */
1079 regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
1081 if (rt715->first_hw_init)
1082 regcache_mark_dirty(rt715->regmap);
1084 rt715->first_hw_init = true;
1086 /* Mark Slave initialization complete */
1087 rt715->hw_init = true;
1089 pm_runtime_mark_last_busy(&slave->dev);
1090 pm_runtime_put_autosuspend(&slave->dev);
1095 MODULE_DESCRIPTION("ASoC rt715 driver");
1096 MODULE_DESCRIPTION("ASoC rt715 driver SDW");
1097 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1098 MODULE_LICENSE("GPL v2");