1 // SPDX-License-Identifier: GPL-2.0
3 * rt715-sdw.c -- rt715 ALSA SoC audio driver
5 * Copyright(c) 2019 Realtek Semiconductor Corp.
7 * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/soundwire/sdw.h>
14 #include <linux/soundwire/sdw_type.h>
15 #include <linux/soundwire/sdw_registers.h>
16 #include <linux/module.h>
18 #include <linux/regmap.h>
19 #include <sound/soc.h>
21 #include "rt715-sdw.h"
23 static bool rt715_readable_register(struct device *dev, unsigned int reg)
26 case 0x00e0 ... 0x00e5:
27 case 0x00ee ... 0x00ef:
28 case 0x00f0 ... 0x00f5:
29 case 0x00fe ... 0x00ff:
36 case 0x2000 ... 0x2016:
37 case 0x201a ... 0x2027:
38 case 0x2029 ... 0x202a:
39 case 0x202d ... 0x2034:
40 case 0x2200 ... 0x2204:
41 case 0x2206 ... 0x2212:
42 case 0x2220 ... 0x2223:
43 case 0x2230 ... 0x2239:
44 case 0x22f0 ... 0x22f3:
120 static bool rt715_volatile_register(struct device *dev, unsigned int reg)
135 case 0x200b ... 0x200e: /* i2c read */
136 case 0x2012 ... 0x2015: /* HD-A read */
137 case 0x202d ... 0x202f: /* BRA */
138 case 0x2201 ... 0x2212: /* i2c debug */
139 case 0x2220 ... 0x2223: /* decoded HD-A */
146 static int rt715_sdw_read(void *context, unsigned int reg, unsigned int *val)
148 struct device *dev = context;
149 struct rt715_priv *rt715 = dev_get_drvdata(dev);
150 unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
151 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
152 unsigned int is_hda_reg = 1, is_index_reg = 0;
160 if (is_index_reg) { /* index registers */
164 ret = regmap_write(rt715->sdw_regmap, reg, 0);
169 ret = regmap_write(rt715->sdw_regmap, reg2, val2);
173 reg3 = RT715_PRIV_DATA_R_H | nid;
174 ret = regmap_write(rt715->sdw_regmap, reg3,
175 ((*val >> 8) & 0xff));
178 reg4 = reg3 + 0x1000;
180 ret = regmap_write(rt715->sdw_regmap, reg4, (*val & 0xff));
183 } else if (mask == 0x3000) {
185 ret = regmap_write(rt715->sdw_regmap, reg, *val);
188 } else if (mask == 0x7000) {
191 ret = regmap_write(rt715->sdw_regmap, reg,
192 ((*val >> 8) & 0xff));
197 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
200 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
203 ret = regmap_write(rt715->sdw_regmap, reg2,
204 ((*val >> 8) & 0xff));
207 ret = regmap_write(rt715->sdw_regmap, reg, (*val & 0xff));
210 } else if (mask == 0x9000) {
211 ret = regmap_write(rt715->sdw_regmap, reg,
212 ((*val >> 8) & 0xff));
217 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
220 } else if (mask == 0xb000) {
221 ret = regmap_write(rt715->sdw_regmap, reg, *val);
225 ret = regmap_read(rt715->sdw_regmap, reg, val);
231 if (is_hda_reg || is_index_reg) {
236 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_3,
240 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_2,
244 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_1,
248 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_0,
252 *val = ((sdw_data_3 & 0xff) << 24) |
253 ((sdw_data_2 & 0xff) << 16) |
254 ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
258 dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
259 else if (is_index_reg)
260 dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n", __func__,
261 reg, reg2, reg3, reg4, *val);
263 dev_dbg(dev, "[%s] %04x %04x => %08x\n",
264 __func__, reg, reg2, *val);
269 static int rt715_sdw_write(void *context, unsigned int reg, unsigned int val)
271 struct device *dev = context;
272 struct rt715_priv *rt715 = dev_get_drvdata(dev);
273 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
274 unsigned int is_index_reg = 0;
282 if (is_index_reg) { /* index registers */
286 ret = regmap_write(rt715->sdw_regmap, reg, 0);
291 ret = regmap_write(rt715->sdw_regmap, reg2, val2);
295 reg3 = RT715_PRIV_DATA_W_H | nid;
296 ret = regmap_write(rt715->sdw_regmap, reg3,
297 ((val >> 8) & 0xff));
300 reg4 = reg3 + 0x1000;
302 ret = regmap_write(rt715->sdw_regmap, reg4, (val & 0xff));
306 } else if (reg < 0x4fff) {
307 ret = regmap_write(rt715->sdw_regmap, reg, val);
310 } else if (reg == RT715_FUNC_RESET) {
311 ret = regmap_write(rt715->sdw_regmap, reg, val);
314 } else if (mask == 0x7000) {
315 ret = regmap_write(rt715->sdw_regmap, reg,
316 ((val >> 8) & 0xff));
321 ret = regmap_write(rt715->sdw_regmap, reg2, (val & 0xff));
324 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
327 ret = regmap_write(rt715->sdw_regmap, reg2,
328 ((val >> 8) & 0xff));
331 ret = regmap_write(rt715->sdw_regmap, reg, (val & 0xff));
337 dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
338 else if (is_index_reg)
339 dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
340 __func__, reg, reg2, reg3, reg4, val2, val);
342 dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
343 __func__, reg, reg2, val);
348 static const struct regmap_config rt715_regmap = {
351 .readable_reg = rt715_readable_register, /* Readable registers */
352 .volatile_reg = rt715_volatile_register, /* volatile register */
353 .max_register = 0x752039, /* Maximum number of register */
354 .reg_defaults = rt715_reg_defaults, /* Defaults */
355 .num_reg_defaults = ARRAY_SIZE(rt715_reg_defaults),
356 .cache_type = REGCACHE_RBTREE,
357 .use_single_read = true,
358 .use_single_write = true,
359 .reg_read = rt715_sdw_read,
360 .reg_write = rt715_sdw_write,
363 static const struct regmap_config rt715_sdw_regmap = {
365 .reg_bits = 32, /* Total register space for SDW */
366 .val_bits = 8, /* Total number of bits in register */
367 .max_register = 0xff01, /* Maximum number of register */
368 .cache_type = REGCACHE_NONE,
369 .use_single_read = true,
370 .use_single_write = true,
373 int hda_to_sdw(unsigned int nid, unsigned int verb, unsigned int payload,
374 unsigned int *sdw_addr_h, unsigned int *sdw_data_h,
375 unsigned int *sdw_addr_l, unsigned int *sdw_data_l)
377 unsigned int offset_h, offset_l, e_verb;
379 if (((verb & 0xff) != 0) || verb == 0xf00) { /* 12 bits command */
380 if (verb == 0x7ff) /* special case */
385 if (verb & 0x800) /* get command */
386 e_verb = (verb - 0xf00) | 0x80;
387 else /* set command */
388 e_verb = (verb - 0x700);
390 *sdw_data_h = payload; /* 7 bits payload */
391 *sdw_addr_l = *sdw_data_l = 0;
392 } else { /* 4 bits command */
393 if ((verb & 0x800) == 0x800) { /* read */
401 *sdw_data_h = (payload >> 8); /* 16 bits payload [15:8] */
402 *sdw_addr_l = (e_verb << 8) | nid | 0x80; /* 0x80: valid bit */
403 *sdw_addr_l += offset_l;
404 *sdw_data_l = payload & 0xff;
407 *sdw_addr_h = (e_verb << 8) | nid;
408 *sdw_addr_h += offset_h;
412 EXPORT_SYMBOL(hda_to_sdw);
414 static int rt715_update_status(struct sdw_slave *slave,
415 enum sdw_slave_status status)
417 struct rt715_priv *rt715 = dev_get_drvdata(&slave->dev);
419 /* Update the status */
420 rt715->status = status;
422 * Perform initialization only if slave status is present and
423 * hw_init flag is false
425 if (rt715->hw_init || rt715->status != SDW_SLAVE_ATTACHED)
428 /* perform I/O transfers required for Slave initialization */
429 return rt715_io_init(&slave->dev, slave);
432 static int rt715_read_prop(struct sdw_slave *slave)
434 struct sdw_slave_prop *prop = &slave->prop;
438 struct sdw_dpn_prop *dpn;
440 prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
442 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
444 prop->paging_support = false;
446 /* first we need to allocate memory for set bits in port lists */
447 prop->source_ports = 0x50;/* BITMAP: 01010000 */
448 prop->sink_ports = 0x0; /* BITMAP: 00000000 */
450 nval = hweight32(prop->source_ports);
451 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
452 sizeof(*prop->src_dpn_prop),
454 if (!prop->src_dpn_prop)
457 dpn = prop->src_dpn_prop;
459 addr = prop->source_ports;
460 for_each_set_bit(bit, &addr, 32) {
462 dpn[i].simple_ch_prep_sm = true;
463 dpn[i].ch_prep_timeout = 10;
467 /* set the timeout values */
468 prop->clk_stop_timeout = 20;
471 prop->wake_capable = 1;
476 static int rt715_bus_config(struct sdw_slave *slave,
477 struct sdw_bus_params *params)
479 struct rt715_priv *rt715 = dev_get_drvdata(&slave->dev);
482 memcpy(&rt715->params, params, sizeof(*params));
484 ret = rt715_clock_config(&slave->dev);
486 dev_err(&slave->dev, "Invalid clk config");
491 static struct sdw_slave_ops rt715_slave_ops = {
492 .read_prop = rt715_read_prop,
493 .update_status = rt715_update_status,
494 .bus_config = rt715_bus_config,
497 static int rt715_sdw_probe(struct sdw_slave *slave,
498 const struct sdw_device_id *id)
500 struct regmap *sdw_regmap, *regmap;
502 /* Regmap Initialization */
503 sdw_regmap = devm_regmap_init_sdw(slave, &rt715_sdw_regmap);
504 if (IS_ERR(sdw_regmap))
505 return PTR_ERR(sdw_regmap);
507 regmap = devm_regmap_init(&slave->dev, NULL, &slave->dev,
510 return PTR_ERR(regmap);
512 rt715_init(&slave->dev, sdw_regmap, regmap, slave);
517 static const struct sdw_device_id rt715_id[] = {
518 SDW_SLAVE_ENTRY_EXT(0x025d, 0x714, 0x2, 0, 0),
519 SDW_SLAVE_ENTRY_EXT(0x025d, 0x715, 0x2, 0, 0),
522 MODULE_DEVICE_TABLE(sdw, rt715_id);
524 static int __maybe_unused rt715_dev_suspend(struct device *dev)
526 struct rt715_priv *rt715 = dev_get_drvdata(dev);
531 regcache_cache_only(rt715->regmap, true);
536 #define RT715_PROBE_TIMEOUT 5000
538 static int __maybe_unused rt715_dev_resume(struct device *dev)
540 struct sdw_slave *slave = dev_to_sdw_dev(dev);
541 struct rt715_priv *rt715 = dev_get_drvdata(dev);
547 if (!slave->unattach_request)
550 time = wait_for_completion_timeout(&slave->initialization_complete,
551 msecs_to_jiffies(RT715_PROBE_TIMEOUT));
553 dev_err(&slave->dev, "Initialization not complete, timed out\n");
558 slave->unattach_request = 0;
559 regcache_cache_only(rt715->regmap, false);
560 regcache_sync_region(rt715->regmap, 0x3000, 0x8fff);
561 regcache_sync_region(rt715->regmap, 0x752039, 0x752039);
566 static const struct dev_pm_ops rt715_pm = {
567 SET_SYSTEM_SLEEP_PM_OPS(rt715_dev_suspend, rt715_dev_resume)
568 SET_RUNTIME_PM_OPS(rt715_dev_suspend, rt715_dev_resume, NULL)
571 static struct sdw_driver rt715_sdw_driver = {
574 .owner = THIS_MODULE,
577 .probe = rt715_sdw_probe,
578 .ops = &rt715_slave_ops,
579 .id_table = rt715_id,
581 module_sdw_driver(rt715_sdw_driver);
583 MODULE_DESCRIPTION("ASoC RT715 driver SDW");
584 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
585 MODULE_LICENSE("GPL v2");