sound/soc/codecs/rt715-sdw.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * rt715-sdw.c -- rt715 ALSA SoC audio driver
   4  *
   5  * Copyright(c) 2019 Realtek Semiconductor Corp.
   6  *
   7  * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
   8  *
   9  */
  10 #include <linux/delay.h>
  11 #include <linux/device.h>
  12 #include <linux/mod_devicetable.h>
  13 #include <linux/soundwire/sdw.h>
  14 #include <linux/soundwire/sdw_type.h>
  15 #include <linux/soundwire/sdw_registers.h>
  16 #include <linux/module.h>
  17 #include <linux/of.h>
  18 #include <linux/regmap.h>
  19 #include <sound/soc.h>
  20 #include "rt715.h"
  21 #include "rt715-sdw.h"
  22
  23 static bool rt715_readable_register(struct device *dev, unsigned int reg)
  24 {
  25         switch (reg) {
  26         case 0x00e0 ... 0x00e5:
  27         case 0x00ee ... 0x00ef:
  28         case 0x00f0 ... 0x00f5:
  29         case 0x00fe ... 0x00ff:
  30         case 0x02e0:
  31         case 0x02f0:
  32         case 0x04e0:
  33         case 0x04f0:
  34         case 0x06e0:
  35         case 0x06f0:
  36         case 0x2000 ... 0x2016:
  37         case 0x201a ... 0x2027:
  38         case 0x2029 ... 0x202a:
  39         case 0x202d ... 0x2034:
  40         case 0x2200 ... 0x2204:
  41         case 0x2206 ... 0x2212:
  42         case 0x2220 ... 0x2223:
  43         case 0x2230 ... 0x2239:
  44         case 0x22f0 ... 0x22f3:
  45         case 0x3122:
  46         case 0x3123:
  47         case 0x3124:
  48         case 0x3125:
  49         case 0x3607:
  50         case 0x3608:
  51         case 0x3609:
  52         case 0x3610:
  53         case 0x3611:
  54         case 0x3627:
  55         case 0x3712:
  56         case 0x3713:
  57         case 0x3718:
  58         case 0x3719:
  59         case 0x371a:
  60         case 0x371b:
  61         case 0x371d:
  62         case 0x3729:
  63         case 0x385e:
  64         case 0x3859:
  65         case 0x4c12:
  66         case 0x4c13:
  67         case 0x4c1d:
  68         case 0x4c29:
  69         case 0x4d12:
  70         case 0x4d13:
  71         case 0x4d1d:
  72         case 0x4d29:
  73         case 0x4e12:
  74         case 0x4e13:
  75         case 0x4e1d:
  76         case 0x4e29:
  77         case 0x4f12:
  78         case 0x4f13:
  79         case 0x4f1d:
  80         case 0x4f29:
  81         case 0x7207:
  82         case 0x7208:
  83         case 0x7209:
  84         case 0x7227:
  85         case 0x7307:
  86         case 0x7308:
  87         case 0x7309:
  88         case 0x7312:
  89         case 0x7313:
  90         case 0x7318:
  91         case 0x7319:
  92         case 0x731a:
  93         case 0x731b:
  94         case 0x731d:
  95         case 0x7327:
  96         case 0x7329:
  97         case 0x8287:
  98         case 0x8288:
  99         case 0x8289:
 100         case 0x82a7:
 101         case 0x8387:
 102         case 0x8388:
 103         case 0x8389:
 104         case 0x8392:
 105         case 0x8393:
 106         case 0x8398:
 107         case 0x8399:
 108         case 0x839a:
 109         case 0x839b:
 110         case 0x839d:
 111         case 0x83a7:
 112         case 0x83a9:
 113         case 0x752039:
 114                 return true;
 115         default:
 116                 return false;
 117         }
 118 }
 119
 120 static bool rt715_volatile_register(struct device *dev, unsigned int reg)
 121 {
 122         switch (reg) {
 123         case 0x00e5:
 124         case 0x00f0:
 125         case 0x00f3:
 126         case 0x00f5:
 127         case 0x2009:
 128         case 0x2016:
 129         case 0x201b:
 130         case 0x201c:
 131         case 0x201d:
 132         case 0x201f:
 133         case 0x2023:
 134         case 0x2230:
 135         case 0x200b ... 0x200e: /* i2c read */
 136         case 0x2012 ... 0x2015: /* HD-A read */
 137         case 0x202d ... 0x202f: /* BRA */
 138         case 0x2201 ... 0x2212: /* i2c debug */
 139         case 0x2220 ... 0x2223: /* decoded HD-A */
 140                 return true;
 141         default:
 142                 return false;
 143         }
 144 }
 145
 146 static int rt715_sdw_read(void *context, unsigned int reg, unsigned int *val)
 147 {
 148         struct device *dev = context;
 149         struct rt715_priv *rt715 = dev_get_drvdata(dev);
 150         unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
 151         unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
 152         unsigned int is_hda_reg = 1, is_index_reg = 0;
 153         int ret;
 154
 155         if (reg > 0xffff)
 156                 is_index_reg = 1;
 157
 158         mask = reg & 0xf000;
 159
 160         if (is_index_reg) { /* index registers */
 161                 val2 = reg & 0xff;
 162                 reg = reg >> 8;
 163                 nid = reg & 0xff;
 164                 ret = regmap_write(rt715->sdw_regmap, reg, 0);
 165                 if (ret < 0)
 166                         return ret;
 167                 reg2 = reg + 0x1000;
 168                 reg2 |= 0x80;
 169                 ret = regmap_write(rt715->sdw_regmap, reg2, val2);
 170                 if (ret < 0)
 171                         return ret;
 172
 173                 reg3 = RT715_PRIV_DATA_R_H | nid;
 174                 ret = regmap_write(rt715->sdw_regmap, reg3,
 175                         ((*val >> 8) & 0xff));
 176                 if (ret < 0)
 177                         return ret;
 178                 reg4 = reg3 + 0x1000;
 179                 reg4 |= 0x80;
 180                 ret = regmap_write(rt715->sdw_regmap, reg4, (*val & 0xff));
 181                 if (ret < 0)
 182                         return ret;
 183         } else if (mask   == 0x3000) {
 184                 reg += 0x8000;
 185                 ret = regmap_write(rt715->sdw_regmap, reg, *val);
 186                 if (ret < 0)
 187                         return ret;
 188         } else if (mask == 0x7000) {
 189                 reg += 0x2000;
 190                 reg |= 0x800;
 191                 ret = regmap_write(rt715->sdw_regmap, reg,
 192                         ((*val >> 8) & 0xff));
 193                 if (ret < 0)
 194                         return ret;
 195                 reg2 = reg + 0x1000;
 196                 reg2 |= 0x80;
 197                 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
 198                 if (ret < 0)
 199                         return ret;
 200         } else if ((reg & 0xff00) == 0x8300) { /* for R channel */
 201                 reg2 = reg - 0x1000;
 202                 reg2 &= ~0x80;
 203                 ret = regmap_write(rt715->sdw_regmap, reg2,
 204                         ((*val >> 8) & 0xff));
 205                 if (ret < 0)
 206                         return ret;
 207                 ret = regmap_write(rt715->sdw_regmap, reg, (*val & 0xff));
 208                 if (ret < 0)
 209                         return ret;
 210         } else if (mask == 0x9000) {
 211                 ret = regmap_write(rt715->sdw_regmap, reg,
 212                         ((*val >> 8) & 0xff));
 213                 if (ret < 0)
 214                         return ret;
 215                 reg2 = reg + 0x1000;
 216                 reg2 |= 0x80;
 217                 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
 218                 if (ret < 0)
 219                         return ret;
 220         } else if (mask == 0xb000) {
 221                 ret = regmap_write(rt715->sdw_regmap, reg, *val);
 222                 if (ret < 0)
 223                         return ret;
 224         } else {
 225                 ret = regmap_read(rt715->sdw_regmap, reg, val);
 226                 if (ret < 0)
 227                         return ret;
 228                 is_hda_reg = 0;
 229         }
 230
 231         if (is_hda_reg || is_index_reg) {
 232                 sdw_data_3 = 0;
 233                 sdw_data_2 = 0;
 234                 sdw_data_1 = 0;
 235                 sdw_data_0 = 0;
 236                 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_3,
 237                         &sdw_data_3);
 238                 if (ret < 0)
 239                         return ret;
 240                 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_2,
 241                         &sdw_data_2);
 242                 if (ret < 0)
 243                         return ret;
 244                 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_1,
 245                         &sdw_data_1);
 246                 if (ret < 0)
 247                         return ret;
 248                 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_0,
 249                         &sdw_data_0);
 250                 if (ret < 0)
 251                         return ret;
 252                 *val = ((sdw_data_3 & 0xff) << 24) |
 253                         ((sdw_data_2 & 0xff) << 16) |
 254                         ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
 255         }
 256
 257         if (is_hda_reg == 0)
 258                 dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
 259         else if (is_index_reg)
 260                 dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n", __func__,
 261                         reg, reg2, reg3, reg4, *val);
 262         else
 263                 dev_dbg(dev, "[%s] %04x %04x => %08x\n",
 264                 __func__, reg, reg2, *val);
 265
 266         return 0;
 267 }
 268
 269 static int rt715_sdw_write(void *context, unsigned int reg, unsigned int val)
 270 {
 271         struct device *dev = context;
 272         struct rt715_priv *rt715 = dev_get_drvdata(dev);
 273         unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
 274         unsigned int is_index_reg = 0;
 275         int ret;
 276
 277         if (reg > 0xffff)
 278                 is_index_reg = 1;
 279
 280         mask = reg & 0xf000;
 281
 282         if (is_index_reg) { /* index registers */
 283                 val2 = reg & 0xff;
 284                 reg = reg >> 8;
 285                 nid = reg & 0xff;
 286                 ret = regmap_write(rt715->sdw_regmap, reg, 0);
 287                 if (ret < 0)
 288                         return ret;
 289                 reg2 = reg + 0x1000;
 290                 reg2 |= 0x80;
 291                 ret = regmap_write(rt715->sdw_regmap, reg2, val2);
 292                 if (ret < 0)
 293                         return ret;
 294
 295                 reg3 = RT715_PRIV_DATA_W_H | nid;
 296                 ret = regmap_write(rt715->sdw_regmap, reg3,
 297                         ((val >> 8) & 0xff));
 298                 if (ret < 0)
 299                         return ret;
 300                 reg4 = reg3 + 0x1000;
 301                 reg4 |= 0x80;
 302                 ret = regmap_write(rt715->sdw_regmap, reg4, (val & 0xff));
 303                 if (ret < 0)
 304                         return ret;
 305                 is_index_reg = 1;
 306         } else if (reg < 0x4fff) {
 307                 ret = regmap_write(rt715->sdw_regmap, reg, val);
 308                 if (ret < 0)
 309                         return ret;
 310         } else if (reg == RT715_FUNC_RESET) {
 311                 ret = regmap_write(rt715->sdw_regmap, reg, val);
 312                 if (ret < 0)
 313                         return ret;
 314         } else if (mask == 0x7000) {
 315                 ret = regmap_write(rt715->sdw_regmap, reg,
 316                         ((val >> 8) & 0xff));
 317                 if (ret < 0)
 318                         return ret;
 319                 reg2 = reg + 0x1000;
 320                 reg2 |= 0x80;
 321                 ret = regmap_write(rt715->sdw_regmap, reg2, (val & 0xff));
 322                 if (ret < 0)
 323                         return ret;
 324         } else if ((reg & 0xff00) == 0x8300) {  /* for R channel */
 325                 reg2 = reg - 0x1000;
 326                 reg2 &= ~0x80;
 327                 ret = regmap_write(rt715->sdw_regmap, reg2,
 328                         ((val >> 8) & 0xff));
 329                 if (ret < 0)
 330                         return ret;
 331                 ret = regmap_write(rt715->sdw_regmap, reg, (val & 0xff));
 332                 if (ret < 0)
 333                         return ret;
 334         }
 335
 336         if (reg2 == 0)
 337                 dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
 338         else if (is_index_reg)
 339                 dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
 340                         __func__, reg, reg2, reg3, reg4, val2, val);
 341         else
 342                 dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
 343                 __func__, reg, reg2, val);
 344
 345         return 0;
 346 }
 347
 348 static const struct regmap_config rt715_regmap = {
 349         .reg_bits = 24,
 350         .val_bits = 32,
 351         .readable_reg = rt715_readable_register, /* Readable registers */
 352         .volatile_reg = rt715_volatile_register, /* volatile register */
 353         .max_register = 0x752039, /* Maximum number of register */
 354         .reg_defaults = rt715_reg_defaults, /* Defaults */
 355         .num_reg_defaults = ARRAY_SIZE(rt715_reg_defaults),
 356         .cache_type = REGCACHE_RBTREE,
 357         .use_single_read = true,
 358         .use_single_write = true,
 359         .reg_read = rt715_sdw_read,
 360         .reg_write = rt715_sdw_write,
 361 };
 362
 363 static const struct regmap_config rt715_sdw_regmap = {
 364         .name = "sdw",
 365         .reg_bits = 32, /* Total register space for SDW */
 366         .val_bits = 8, /* Total number of bits in register */
 367         .max_register = 0xff01, /* Maximum number of register */
 368         .cache_type = REGCACHE_NONE,
 369         .use_single_read = true,
 370         .use_single_write = true,
 371 };
 372
 373 int hda_to_sdw(unsigned int nid, unsigned int verb, unsigned int payload,
 374                unsigned int *sdw_addr_h, unsigned int *sdw_data_h,
 375                unsigned int *sdw_addr_l, unsigned int *sdw_data_l)
 376 {
 377         unsigned int offset_h, offset_l, e_verb;
 378
 379         if (((verb & 0xff) != 0) || verb == 0xf00) { /* 12 bits command */
 380                 if (verb == 0x7ff) /* special case */
 381                         offset_h = 0;
 382                 else
 383                         offset_h = 0x3000;
 384
 385                 if (verb & 0x800) /* get command */
 386                         e_verb = (verb - 0xf00) | 0x80;
 387                 else /* set command */
 388                         e_verb = (verb - 0x700);
 389
 390                 *sdw_data_h = payload; /* 7 bits payload */
 391                 *sdw_addr_l = *sdw_data_l = 0;
 392         } else { /* 4 bits command */
 393                 if ((verb & 0x800) == 0x800) { /* read */
 394                         offset_h = 0x9000;
 395                         offset_l = 0xa000;
 396                 } else { /* write */
 397                         offset_h = 0x7000;
 398                         offset_l = 0x8000;
 399                 }
 400                 e_verb = verb >> 8;
 401                 *sdw_data_h = (payload >> 8); /* 16 bits payload [15:8] */
 402                 *sdw_addr_l = (e_verb << 8) | nid | 0x80; /* 0x80: valid bit */
 403                 *sdw_addr_l += offset_l;
 404                 *sdw_data_l = payload & 0xff;
 405         }
 406
 407         *sdw_addr_h = (e_verb << 8) | nid;
 408         *sdw_addr_h += offset_h;
 409
 410         return 0;
 411 }
 412 EXPORT_SYMBOL(hda_to_sdw);
 413
 414 static int rt715_update_status(struct sdw_slave *slave,
 415                                 enum sdw_slave_status status)
 416 {
 417         struct rt715_priv *rt715 = dev_get_drvdata(&slave->dev);
 418
 419         /* Update the status */
 420         rt715->status = status;
 421         /*
 422          * Perform initialization only if slave status is present and
 423          * hw_init flag is false
 424          */
 425         if (rt715->hw_init || rt715->status != SDW_SLAVE_ATTACHED)
 426                 return 0;
 427
 428         /* perform I/O transfers required for Slave initialization */
 429         return rt715_io_init(&slave->dev, slave);
 430 }
 431
 432 static int rt715_read_prop(struct sdw_slave *slave)
 433 {
 434         struct sdw_slave_prop *prop = &slave->prop;
 435         int nval, i;
 436         u32 bit;
 437         unsigned long addr;
 438         struct sdw_dpn_prop *dpn;
 439
 440         prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
 441                 SDW_SCP_INT1_PARITY;
 442         prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
 443
 444         prop->paging_support = false;
 445
 446         /* first we need to allocate memory for set bits in port lists */
 447         prop->source_ports = 0x50;/* BITMAP: 01010000 */
 448         prop->sink_ports = 0x0; /* BITMAP:  00000000 */
 449
 450         nval = hweight32(prop->source_ports);
 451         prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
 452                                         sizeof(*prop->src_dpn_prop),
 453                                         GFP_KERNEL);
 454         if (!prop->src_dpn_prop)
 455                 return -ENOMEM;
 456
 457         dpn = prop->src_dpn_prop;
 458         i = 0;
 459         addr = prop->source_ports;
 460         for_each_set_bit(bit, &addr, 32) {
 461                 dpn[i].num = bit;
 462                 dpn[i].simple_ch_prep_sm = true;
 463                 dpn[i].ch_prep_timeout = 10;
 464                 i++;
 465         }
 466
 467         /* set the timeout values */
 468         prop->clk_stop_timeout = 20;
 469
 470         /* wake-up event */
 471         prop->wake_capable = 1;
 472
 473         return 0;
 474 }
 475
 476 static int rt715_bus_config(struct sdw_slave *slave,
 477                                 struct sdw_bus_params *params)
 478 {
 479         struct rt715_priv *rt715 = dev_get_drvdata(&slave->dev);
 480         int ret;
 481
 482         memcpy(&rt715->params, params, sizeof(*params));
 483
 484         ret = rt715_clock_config(&slave->dev);
 485         if (ret < 0)
 486                 dev_err(&slave->dev, "Invalid clk config");
 487
 488         return 0;
 489 }
 490
 491 static const struct sdw_slave_ops rt715_slave_ops = {
 492         .read_prop = rt715_read_prop,
 493         .update_status = rt715_update_status,
 494         .bus_config = rt715_bus_config,
 495 };
 496
 497 static int rt715_sdw_probe(struct sdw_slave *slave,
 498                            const struct sdw_device_id *id)
 499 {
 500         struct regmap *sdw_regmap, *regmap;
 501
 502         /* Regmap Initialization */
 503         sdw_regmap = devm_regmap_init_sdw(slave, &rt715_sdw_regmap);
 504         if (IS_ERR(sdw_regmap))
 505                 return PTR_ERR(sdw_regmap);
 506
 507         regmap = devm_regmap_init(&slave->dev, NULL, &slave->dev,
 508                 &rt715_regmap);
 509         if (IS_ERR(regmap))
 510                 return PTR_ERR(regmap);
 511
 512         rt715_init(&slave->dev, sdw_regmap, regmap, slave);
 513
 514         return 0;
 515 }
 516
 517 static const struct sdw_device_id rt715_id[] = {
 518         SDW_SLAVE_ENTRY_EXT(0x025d, 0x714, 0x2, 0, 0),
 519         SDW_SLAVE_ENTRY_EXT(0x025d, 0x715, 0x2, 0, 0),
 520         {},
 521 };
 522 MODULE_DEVICE_TABLE(sdw, rt715_id);
 523
 524 static int __maybe_unused rt715_dev_suspend(struct device *dev)
 525 {
 526         struct rt715_priv *rt715 = dev_get_drvdata(dev);
 527
 528         if (!rt715->hw_init)
 529                 return 0;
 530
 531         regcache_cache_only(rt715->regmap, true);
 532
 533         return 0;
 534 }
 535
 536 #define RT715_PROBE_TIMEOUT 5000
 537
 538 static int __maybe_unused rt715_dev_resume(struct device *dev)
 539 {
 540         struct sdw_slave *slave = dev_to_sdw_dev(dev);
 541         struct rt715_priv *rt715 = dev_get_drvdata(dev);
 542         unsigned long time;
 543
 544         if (!rt715->first_hw_init)
 545                 return 0;
 546
 547         if (!slave->unattach_request)
 548                 goto regmap_sync;
 549
 550         time = wait_for_completion_timeout(&slave->initialization_complete,
 551                                            msecs_to_jiffies(RT715_PROBE_TIMEOUT));
 552         if (!time) {
 553                 dev_err(&slave->dev, "Initialization not complete, timed out\n");
 554                 return -ETIMEDOUT;
 555         }
 556
 557 regmap_sync:
 558         slave->unattach_request = 0;
 559         regcache_cache_only(rt715->regmap, false);
 560         regcache_sync_region(rt715->regmap, 0x3000, 0x8fff);
 561         regcache_sync_region(rt715->regmap, 0x752039, 0x752039);
 562
 563         return 0;
 564 }
 565
 566 static const struct dev_pm_ops rt715_pm = {
 567         SET_SYSTEM_SLEEP_PM_OPS(rt715_dev_suspend, rt715_dev_resume)
 568         SET_RUNTIME_PM_OPS(rt715_dev_suspend, rt715_dev_resume, NULL)
 569 };
 570
 571 static struct sdw_driver rt715_sdw_driver = {
 572         .driver = {
 573                    .name = "rt715",
 574                    .owner = THIS_MODULE,
 575                    .pm = &rt715_pm,
 576                    },
 577         .probe = rt715_sdw_probe,
 578         .ops = &rt715_slave_ops,
 579         .id_table = rt715_id,
 580 };
 581 module_sdw_driver(rt715_sdw_driver);
 582
 583 MODULE_DESCRIPTION("ASoC RT715 driver SDW");
 584 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
 585 MODULE_LICENSE("GPL v2");