sound/soc/codecs/rt5677-spi.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * rt5677-spi.c  --  RT5677 ALSA SoC audio codec driver
   4  *
   5  * Copyright 2013 Realtek Semiconductor Corp.
   6  * Author: Oder Chiou <oder_chiou@realtek.com>
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/input.h>
  11 #include <linux/spi/spi.h>
  12 #include <linux/device.h>
  13 #include <linux/init.h>
  14 #include <linux/delay.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/irq.h>
  17 #include <linux/slab.h>
  18 #include <linux/sched.h>
  19 #include <linux/uaccess.h>
  20 #include <linux/regulator/consumer.h>
  21 #include <linux/pm_qos.h>
  22 #include <linux/sysfs.h>
  23 #include <linux/clk.h>
  24 #include <linux/firmware.h>
  25 #include <linux/acpi.h>
  26
  27 #include <sound/soc.h>
  28
  29 #include "rt5677.h"
  30 #include "rt5677-spi.h"
  31
  32 #define DRV_NAME "rt5677spi"
  33
  34 #define RT5677_SPI_BURST_LEN    240
  35 #define RT5677_SPI_HEADER       5
  36 #define RT5677_SPI_FREQ         6000000
  37
  38 /* The AddressPhase and DataPhase of SPI commands are MSB first on the wire.
  39  * DataPhase word size of 16-bit commands is 2 bytes.
  40  * DataPhase word size of 32-bit commands is 4 bytes.
  41  * DataPhase word size of burst commands is 8 bytes.
  42  * The DSP CPU is little-endian.
  43  */
  44 #define RT5677_SPI_WRITE_BURST  0x5
  45 #define RT5677_SPI_READ_BURST   0x4
  46 #define RT5677_SPI_WRITE_32     0x3
  47 #define RT5677_SPI_READ_32      0x2
  48 #define RT5677_SPI_WRITE_16     0x1
  49 #define RT5677_SPI_READ_16      0x0
  50
  51 #define RT5677_BUF_BYTES_TOTAL          0x20000
  52 #define RT5677_MIC_BUF_ADDR             0x60030000
  53 #define RT5677_MODEL_ADDR               0x5FFC9800
  54 #define RT5677_MIC_BUF_BYTES            ((u32)(RT5677_BUF_BYTES_TOTAL - \
  55                                         sizeof(u32)))
  56 #define RT5677_MIC_BUF_FIRST_READ_SIZE  0x10000
  57
  58 static struct spi_device *g_spi;
  59 static DEFINE_MUTEX(spi_mutex);
  60
  61 struct rt5677_dsp {
  62         struct device *dev;
  63         struct delayed_work copy_work;
  64         struct mutex dma_lock;
  65         struct snd_pcm_substream *substream;
  66         size_t dma_offset;      /* zero-based offset into runtime->dma_area */
  67         size_t avail_bytes;     /* number of new bytes since last period */
  68         u32 mic_read_offset;    /* zero-based offset into DSP's mic buffer */
  69         bool new_hotword;       /* a new hotword is fired */
  70 };
  71
  72 static const struct snd_pcm_hardware rt5677_spi_pcm_hardware = {
  73         .info                   = SNDRV_PCM_INFO_MMAP |
  74                                   SNDRV_PCM_INFO_MMAP_VALID |
  75                                   SNDRV_PCM_INFO_INTERLEAVED,
  76         .formats                = SNDRV_PCM_FMTBIT_S16_LE,
  77         .period_bytes_min       = PAGE_SIZE,
  78         .period_bytes_max       = RT5677_BUF_BYTES_TOTAL / 8,
  79         .periods_min            = 8,
  80         .periods_max            = 8,
  81         .channels_min           = 1,
  82         .channels_max           = 1,
  83         .buffer_bytes_max       = RT5677_BUF_BYTES_TOTAL,
  84 };
  85
  86 static struct snd_soc_dai_driver rt5677_spi_dai = {
  87         /* The DAI name "rt5677-dsp-cpu-dai" is not used. The actual DAI name
  88          * registered with ASoC is the name of the device "spi-RT5677AA:00",
  89          * because we only have one DAI. See snd_soc_register_dais().
  90          */
  91         .name = "rt5677-dsp-cpu-dai",
  92         .id = 0,
  93         .capture = {
  94                 .stream_name = "DSP Capture",
  95                 .channels_min = 1,
  96                 .channels_max = 1,
  97                 .rates = SNDRV_PCM_RATE_16000,
  98                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
  99         },
 100 };
 101
 102 /* PCM for streaming audio from the DSP buffer */
 103 static int rt5677_spi_pcm_open(
 104                 struct snd_soc_component *component,
 105                 struct snd_pcm_substream *substream)
 106 {
 107         snd_soc_set_runtime_hwparams(substream, &rt5677_spi_pcm_hardware);
 108         return 0;
 109 }
 110
 111 static int rt5677_spi_pcm_close(
 112                 struct snd_soc_component *component,
 113                 struct snd_pcm_substream *substream)
 114 {
 115         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 116         struct snd_soc_component *codec_component =
 117                         snd_soc_rtdcom_lookup(rtd, "rt5677");
 118         struct rt5677_priv *rt5677 =
 119                         snd_soc_component_get_drvdata(codec_component);
 120         struct rt5677_dsp *rt5677_dsp =
 121                         snd_soc_component_get_drvdata(component);
 122
 123         cancel_delayed_work_sync(&rt5677_dsp->copy_work);
 124         rt5677->set_dsp_vad(codec_component, false);
 125         return 0;
 126 }
 127
 128 static int rt5677_spi_hw_params(
 129                 struct snd_soc_component *component,
 130                 struct snd_pcm_substream *substream,
 131                 struct snd_pcm_hw_params *hw_params)
 132 {
 133         struct rt5677_dsp *rt5677_dsp =
 134                         snd_soc_component_get_drvdata(component);
 135         int ret;
 136
 137         mutex_lock(&rt5677_dsp->dma_lock);
 138         ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 139         rt5677_dsp->substream = substream;
 140         mutex_unlock(&rt5677_dsp->dma_lock);
 141
 142         return ret;
 143 }
 144
 145 static int rt5677_spi_hw_free(
 146                 struct snd_soc_component *component,
 147                 struct snd_pcm_substream *substream)
 148 {
 149         struct rt5677_dsp *rt5677_dsp =
 150                         snd_soc_component_get_drvdata(component);
 151
 152         mutex_lock(&rt5677_dsp->dma_lock);
 153         rt5677_dsp->substream = NULL;
 154         mutex_unlock(&rt5677_dsp->dma_lock);
 155
 156         return snd_pcm_lib_free_pages(substream);
 157 }
 158
 159 static int rt5677_spi_prepare(
 160                 struct snd_soc_component *component,
 161                 struct snd_pcm_substream *substream)
 162 {
 163         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 164         struct snd_soc_component *rt5677_component =
 165                         snd_soc_rtdcom_lookup(rtd, "rt5677");
 166         struct rt5677_priv *rt5677 =
 167                         snd_soc_component_get_drvdata(rt5677_component);
 168         struct rt5677_dsp *rt5677_dsp =
 169                         snd_soc_component_get_drvdata(component);
 170
 171         rt5677->set_dsp_vad(rt5677_component, true);
 172         rt5677_dsp->dma_offset = 0;
 173         rt5677_dsp->avail_bytes = 0;
 174         return 0;
 175 }
 176
 177 static snd_pcm_uframes_t rt5677_spi_pcm_pointer(
 178                 struct snd_soc_component *component,
 179                 struct snd_pcm_substream *substream)
 180 {
 181         struct snd_pcm_runtime *runtime = substream->runtime;
 182         struct rt5677_dsp *rt5677_dsp =
 183                         snd_soc_component_get_drvdata(component);
 184
 185         return bytes_to_frames(runtime, rt5677_dsp->dma_offset);
 186 }
 187
 188 static int rt5677_spi_mic_write_offset(u32 *mic_write_offset)
 189 {
 190         int ret;
 191         /* Grab the first 4 bytes that hold the write pointer on the
 192          * dsp, and check to make sure that it points somewhere inside the
 193          * buffer.
 194          */
 195         ret = rt5677_spi_read(RT5677_MIC_BUF_ADDR, mic_write_offset,
 196                         sizeof(u32));
 197         if (ret)
 198                 return ret;
 199         /* Adjust the offset so that it's zero-based */
 200         *mic_write_offset = *mic_write_offset - sizeof(u32);
 201         return *mic_write_offset < RT5677_MIC_BUF_BYTES ? 0 : -EFAULT;
 202 }
 203
 204 /*
 205  * Copy one contiguous block of audio samples from the DSP mic buffer to the
 206  * dma_area of the pcm runtime. The receiving buffer may wrap around.
 207  * @begin: start offset of the block to copy, in bytes.
 208  * @end:   offset of the first byte after the block to copy, must be greater
 209  *         than or equal to begin.
 210  *
 211  * Return: Zero if successful, or a negative error code on failure.
 212  */
 213 static int rt5677_spi_copy_block(struct rt5677_dsp *rt5677_dsp,
 214                 u32 begin, u32 end)
 215 {
 216         struct snd_pcm_runtime *runtime = rt5677_dsp->substream->runtime;
 217         size_t bytes_per_frame = frames_to_bytes(runtime, 1);
 218         size_t first_chunk_len, second_chunk_len;
 219         int ret;
 220
 221         if (begin > end || runtime->dma_bytes < 2 * bytes_per_frame) {
 222                 dev_err(rt5677_dsp->dev,
 223                         "Invalid copy from (%u, %u), dma_area size %zu\n",
 224                         begin, end, runtime->dma_bytes);
 225                 return -EINVAL;
 226         }
 227
 228         /* The block to copy is empty */
 229         if (begin == end)
 230                 return 0;
 231
 232         /* If the incoming chunk is too big for the receiving buffer, only the
 233          * last "receiving buffer size - one frame" bytes are copied.
 234          */
 235         if (end - begin > runtime->dma_bytes - bytes_per_frame)
 236                 begin = end - (runtime->dma_bytes - bytes_per_frame);
 237
 238         /* May need to split to two chunks, calculate the size of each */
 239         first_chunk_len = end - begin;
 240         second_chunk_len = 0;
 241         if (rt5677_dsp->dma_offset + first_chunk_len > runtime->dma_bytes) {
 242                 /* Receiving buffer wrapped around */
 243                 second_chunk_len = first_chunk_len;
 244                 first_chunk_len = runtime->dma_bytes - rt5677_dsp->dma_offset;
 245                 second_chunk_len -= first_chunk_len;
 246         }
 247
 248         /* Copy first chunk */
 249         ret = rt5677_spi_read(RT5677_MIC_BUF_ADDR + sizeof(u32) + begin,
 250                         runtime->dma_area + rt5677_dsp->dma_offset,
 251                         first_chunk_len);
 252         if (ret)
 253                 return ret;
 254         rt5677_dsp->dma_offset += first_chunk_len;
 255         if (rt5677_dsp->dma_offset == runtime->dma_bytes)
 256                 rt5677_dsp->dma_offset = 0;
 257
 258         /* Copy second chunk */
 259         if (second_chunk_len) {
 260                 ret = rt5677_spi_read(RT5677_MIC_BUF_ADDR + sizeof(u32) +
 261                                 begin + first_chunk_len, runtime->dma_area,
 262                                 second_chunk_len);
 263                 if (!ret)
 264                         rt5677_dsp->dma_offset = second_chunk_len;
 265         }
 266         return ret;
 267 }
 268
 269 /*
 270  * Copy a given amount of audio samples from the DSP mic buffer starting at
 271  * mic_read_offset, to the dma_area of the pcm runtime. The source buffer may
 272  * wrap around. mic_read_offset is updated after successful copy.
 273  * @amount: amount of samples to copy, in bytes.
 274  *
 275  * Return: Zero if successful, or a negative error code on failure.
 276  */
 277 static int rt5677_spi_copy(struct rt5677_dsp *rt5677_dsp, u32 amount)
 278 {
 279         int ret = 0;
 280         u32 target;
 281
 282         if (amount == 0)
 283                 return ret;
 284
 285         target = rt5677_dsp->mic_read_offset + amount;
 286         /* Copy the first chunk in DSP's mic buffer */
 287         ret |= rt5677_spi_copy_block(rt5677_dsp, rt5677_dsp->mic_read_offset,
 288                         min(target, RT5677_MIC_BUF_BYTES));
 289
 290         if (target >= RT5677_MIC_BUF_BYTES) {
 291                 /* Wrap around, copy the second chunk */
 292                 target -= RT5677_MIC_BUF_BYTES;
 293                 ret |= rt5677_spi_copy_block(rt5677_dsp, 0, target);
 294         }
 295
 296         if (!ret)
 297                 rt5677_dsp->mic_read_offset = target;
 298         return ret;
 299 }
 300
 301 /*
 302  * A delayed work that streams audio samples from the DSP mic buffer to the
 303  * dma_area of the pcm runtime via SPI.
 304  */
 305 static void rt5677_spi_copy_work(struct work_struct *work)
 306 {
 307         struct rt5677_dsp *rt5677_dsp =
 308                 container_of(work, struct rt5677_dsp, copy_work.work);
 309         struct snd_pcm_runtime *runtime;
 310         u32 mic_write_offset;
 311         size_t new_bytes, copy_bytes, period_bytes;
 312         unsigned int delay;
 313         int ret = 0;
 314
 315         /* Ensure runtime->dma_area buffer does not go away while copying. */
 316         mutex_lock(&rt5677_dsp->dma_lock);
 317         if (!rt5677_dsp->substream) {
 318                 dev_err(rt5677_dsp->dev, "No pcm substream\n");
 319                 goto done;
 320         }
 321
 322         runtime = rt5677_dsp->substream->runtime;
 323
 324         if (rt5677_spi_mic_write_offset(&mic_write_offset)) {
 325                 dev_err(rt5677_dsp->dev, "No mic_write_offset\n");
 326                 goto done;
 327         }
 328
 329         /* If this is the first time that we've asked for streaming data after
 330          * a hotword is fired, we should start reading from the previous 2
 331          * seconds of audio from wherever the mic_write_offset is currently.
 332          */
 333         if (rt5677_dsp->new_hotword) {
 334                 rt5677_dsp->new_hotword = false;
 335                 /* See if buffer wraparound happens */
 336                 if (mic_write_offset < RT5677_MIC_BUF_FIRST_READ_SIZE)
 337                         rt5677_dsp->mic_read_offset = RT5677_MIC_BUF_BYTES -
 338                                         (RT5677_MIC_BUF_FIRST_READ_SIZE -
 339                                         mic_write_offset);
 340                 else
 341                         rt5677_dsp->mic_read_offset = mic_write_offset -
 342                                         RT5677_MIC_BUF_FIRST_READ_SIZE;
 343         }
 344
 345         /* Calculate the amount of new samples in bytes */
 346         if (rt5677_dsp->mic_read_offset <= mic_write_offset)
 347                 new_bytes = mic_write_offset - rt5677_dsp->mic_read_offset;
 348         else
 349                 new_bytes = RT5677_MIC_BUF_BYTES + mic_write_offset
 350                                 - rt5677_dsp->mic_read_offset;
 351
 352         /* Copy all new samples from DSP mic buffer, one period at a time */
 353         period_bytes = snd_pcm_lib_period_bytes(rt5677_dsp->substream);
 354         while (new_bytes) {
 355                 copy_bytes = min(new_bytes, period_bytes
 356                                 - rt5677_dsp->avail_bytes);
 357                 ret = rt5677_spi_copy(rt5677_dsp, copy_bytes);
 358                 if (ret) {
 359                         dev_err(rt5677_dsp->dev, "Copy failed %d\n", ret);
 360                         goto done;
 361                 }
 362                 rt5677_dsp->avail_bytes += copy_bytes;
 363                 if (rt5677_dsp->avail_bytes >= period_bytes) {
 364                         snd_pcm_period_elapsed(rt5677_dsp->substream);
 365                         rt5677_dsp->avail_bytes = 0;
 366                 }
 367                 new_bytes -= copy_bytes;
 368         }
 369
 370         delay = bytes_to_frames(runtime, period_bytes) / (runtime->rate / 1000);
 371         schedule_delayed_work(&rt5677_dsp->copy_work, msecs_to_jiffies(delay));
 372 done:
 373         mutex_unlock(&rt5677_dsp->dma_lock);
 374 }
 375
 376 static int rt5677_spi_pcm_new(struct snd_soc_component *component,
 377                               struct snd_soc_pcm_runtime *rtd)
 378 {
 379         snd_pcm_lib_preallocate_pages_for_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC,
 380                                               NULL, 0, 0);
 381         return 0;
 382 }
 383
 384 static int rt5677_spi_pcm_probe(struct snd_soc_component *component)
 385 {
 386         struct rt5677_dsp *rt5677_dsp;
 387
 388         rt5677_dsp = devm_kzalloc(component->dev, sizeof(*rt5677_dsp),
 389                         GFP_KERNEL);
 390         if (!rt5677_dsp)
 391                 return -ENOMEM;
 392         rt5677_dsp->dev = &g_spi->dev;
 393         mutex_init(&rt5677_dsp->dma_lock);
 394         INIT_DELAYED_WORK(&rt5677_dsp->copy_work, rt5677_spi_copy_work);
 395
 396         snd_soc_component_set_drvdata(component, rt5677_dsp);
 397         return 0;
 398 }
 399
 400 static const struct snd_soc_component_driver rt5677_spi_dai_component = {
 401         .name           = DRV_NAME,
 402         .probe          = rt5677_spi_pcm_probe,
 403         .open           = rt5677_spi_pcm_open,
 404         .close          = rt5677_spi_pcm_close,
 405         .hw_params      = rt5677_spi_hw_params,
 406         .hw_free        = rt5677_spi_hw_free,
 407         .prepare        = rt5677_spi_prepare,
 408         .pointer        = rt5677_spi_pcm_pointer,
 409         .pcm_construct  = rt5677_spi_pcm_new,
 410 };
 411
 412 /* Select a suitable transfer command for the next transfer to ensure
 413  * the transfer address is always naturally aligned while minimizing
 414  * the total number of transfers required.
 415  *
 416  * 3 transfer commands are available:
 417  * RT5677_SPI_READ/WRITE_16:    Transfer 2 bytes
 418  * RT5677_SPI_READ/WRITE_32:    Transfer 4 bytes
 419  * RT5677_SPI_READ/WRITE_BURST: Transfer any multiples of 8 bytes
 420  *
 421  * Note:
 422  * 16 Bit writes and reads are restricted to the address range
 423  * 0x18020000 ~ 0x18021000
 424  *
 425  * For example, reading 256 bytes at 0x60030004 uses the following commands:
 426  * 0x60030004 RT5677_SPI_READ_32        4 bytes
 427  * 0x60030008 RT5677_SPI_READ_BURST     240 bytes
 428  * 0x600300F8 RT5677_SPI_READ_BURST     8 bytes
 429  * 0x60030100 RT5677_SPI_READ_32        4 bytes
 430  *
 431  * Input:
 432  * @read: true for read commands; false for write commands
 433  * @align: alignment of the next transfer address
 434  * @remain: number of bytes remaining to transfer
 435  *
 436  * Output:
 437  * @len: number of bytes to transfer with the selected command
 438  * Returns the selected command
 439  */
 440 static u8 rt5677_spi_select_cmd(bool read, u32 align, u32 remain, u32 *len)
 441 {
 442         u8 cmd;
 443
 444         if (align == 4 || remain <= 4) {
 445                 cmd = RT5677_SPI_READ_32;
 446                 *len = 4;
 447         } else {
 448                 cmd = RT5677_SPI_READ_BURST;
 449                 *len = (((remain - 1) >> 3) + 1) << 3;
 450                 *len = min_t(u32, *len, RT5677_SPI_BURST_LEN);
 451         }
 452         return read ? cmd : cmd + 1;
 453 }
 454
 455 /* Copy dstlen bytes from src to dst, while reversing byte order for each word.
 456  * If srclen < dstlen, zeros are padded.
 457  */
 458 static void rt5677_spi_reverse(u8 *dst, u32 dstlen, const u8 *src, u32 srclen)
 459 {
 460         u32 w, i, si;
 461         u32 word_size = min_t(u32, dstlen, 8);
 462
 463         for (w = 0; w < dstlen; w += word_size) {
 464                 for (i = 0; i < word_size && i + w < dstlen; i++) {
 465                         si = w + word_size - i - 1;
 466                         dst[w + i] = si < srclen ? src[si] : 0;
 467                 }
 468         }
 469 }
 470
 471 /* Read DSP address space using SPI. addr and len have to be 4-byte aligned. */
 472 int rt5677_spi_read(u32 addr, void *rxbuf, size_t len)
 473 {
 474         u32 offset;
 475         int status = 0;
 476         struct spi_transfer t[2];
 477         struct spi_message m;
 478         /* +4 bytes is for the DummyPhase following the AddressPhase */
 479         u8 header[RT5677_SPI_HEADER + 4];
 480         u8 body[RT5677_SPI_BURST_LEN];
 481         u8 spi_cmd;
 482         u8 *cb = rxbuf;
 483
 484         if (!g_spi)
 485                 return -ENODEV;
 486
 487         if ((addr & 3) || (len & 3)) {
 488                 dev_err(&g_spi->dev, "Bad read align 0x%x(%zu)\n", addr, len);
 489                 return -EACCES;
 490         }
 491
 492         memset(t, 0, sizeof(t));
 493         t[0].tx_buf = header;
 494         t[0].len = sizeof(header);
 495         t[0].speed_hz = RT5677_SPI_FREQ;
 496         t[1].rx_buf = body;
 497         t[1].speed_hz = RT5677_SPI_FREQ;
 498         spi_message_init_with_transfers(&m, t, ARRAY_SIZE(t));
 499
 500         for (offset = 0; offset < len; offset += t[1].len) {
 501                 spi_cmd = rt5677_spi_select_cmd(true, (addr + offset) & 7,
 502                                 len - offset, &t[1].len);
 503
 504                 /* Construct SPI message header */
 505                 header[0] = spi_cmd;
 506                 header[1] = ((addr + offset) & 0xff000000) >> 24;
 507                 header[2] = ((addr + offset) & 0x00ff0000) >> 16;
 508                 header[3] = ((addr + offset) & 0x0000ff00) >> 8;
 509                 header[4] = ((addr + offset) & 0x000000ff) >> 0;
 510
 511                 mutex_lock(&spi_mutex);
 512                 status |= spi_sync(g_spi, &m);
 513                 mutex_unlock(&spi_mutex);
 514
 515
 516                 /* Copy data back to caller buffer */
 517                 rt5677_spi_reverse(cb + offset, len - offset, body, t[1].len);
 518         }
 519         return status;
 520 }
 521 EXPORT_SYMBOL_GPL(rt5677_spi_read);
 522
 523 /* Write DSP address space using SPI. addr has to be 4-byte aligned.
 524  * If len is not 4-byte aligned, then extra zeros are written at the end
 525  * as padding.
 526  */
 527 int rt5677_spi_write(u32 addr, const void *txbuf, size_t len)
 528 {
 529         u32 offset;
 530         int status = 0;
 531         struct spi_transfer t;
 532         struct spi_message m;
 533         /* +1 byte is for the DummyPhase following the DataPhase */
 534         u8 buf[RT5677_SPI_HEADER + RT5677_SPI_BURST_LEN + 1];
 535         u8 *body = buf + RT5677_SPI_HEADER;
 536         u8 spi_cmd;
 537         const u8 *cb = txbuf;
 538
 539         if (!g_spi)
 540                 return -ENODEV;
 541
 542         if (addr & 3) {
 543                 dev_err(&g_spi->dev, "Bad write align 0x%x(%zu)\n", addr, len);
 544                 return -EACCES;
 545         }
 546
 547         memset(&t, 0, sizeof(t));
 548         t.tx_buf = buf;
 549         t.speed_hz = RT5677_SPI_FREQ;
 550         spi_message_init_with_transfers(&m, &t, 1);
 551
 552         for (offset = 0; offset < len;) {
 553                 spi_cmd = rt5677_spi_select_cmd(false, (addr + offset) & 7,
 554                                 len - offset, &t.len);
 555
 556                 /* Construct SPI message header */
 557                 buf[0] = spi_cmd;
 558                 buf[1] = ((addr + offset) & 0xff000000) >> 24;
 559                 buf[2] = ((addr + offset) & 0x00ff0000) >> 16;
 560                 buf[3] = ((addr + offset) & 0x0000ff00) >> 8;
 561                 buf[4] = ((addr + offset) & 0x000000ff) >> 0;
 562
 563                 /* Fetch data from caller buffer */
 564                 rt5677_spi_reverse(body, t.len, cb + offset, len - offset);
 565                 offset += t.len;
 566                 t.len += RT5677_SPI_HEADER + 1;
 567
 568                 mutex_lock(&spi_mutex);
 569                 status |= spi_sync(g_spi, &m);
 570                 mutex_unlock(&spi_mutex);
 571         }
 572         return status;
 573 }
 574 EXPORT_SYMBOL_GPL(rt5677_spi_write);
 575
 576 int rt5677_spi_write_firmware(u32 addr, const struct firmware *fw)
 577 {
 578         return rt5677_spi_write(addr, fw->data, fw->size);
 579 }
 580 EXPORT_SYMBOL_GPL(rt5677_spi_write_firmware);
 581
 582 void rt5677_spi_hotword_detected(void)
 583 {
 584         struct rt5677_dsp *rt5677_dsp;
 585
 586         if (!g_spi)
 587                 return;
 588
 589         rt5677_dsp = dev_get_drvdata(&g_spi->dev);
 590         if (!rt5677_dsp) {
 591                 dev_err(&g_spi->dev, "Can't get rt5677_dsp\n");
 592                 return;
 593         }
 594
 595         mutex_lock(&rt5677_dsp->dma_lock);
 596         dev_info(rt5677_dsp->dev, "Hotword detected\n");
 597         rt5677_dsp->new_hotword = true;
 598         mutex_unlock(&rt5677_dsp->dma_lock);
 599
 600         schedule_delayed_work(&rt5677_dsp->copy_work, 0);
 601 }
 602 EXPORT_SYMBOL_GPL(rt5677_spi_hotword_detected);
 603
 604 static int rt5677_spi_probe(struct spi_device *spi)
 605 {
 606         int ret;
 607
 608         g_spi = spi;
 609
 610         ret = snd_soc_register_component(&spi->dev, &rt5677_spi_dai_component,
 611                                          &rt5677_spi_dai, 1);
 612         if (ret < 0)
 613                 dev_err(&spi->dev, "Failed to register component.\n");
 614
 615         return ret;
 616 }
 617
 618 static int rt5677_spi_remove(struct spi_device *spi)
 619 {
 620         snd_soc_unregister_component(&spi->dev);
 621         return 0;
 622 }
 623
 624 static const struct acpi_device_id rt5677_spi_acpi_id[] = {
 625         { "RT5677AA", 0 },
 626         { }
 627 };
 628 MODULE_DEVICE_TABLE(acpi, rt5677_spi_acpi_id);
 629
 630 static struct spi_driver rt5677_spi_driver = {
 631         .driver = {
 632                 .name = DRV_NAME,
 633                 .acpi_match_table = ACPI_PTR(rt5677_spi_acpi_id),
 634         },
 635         .probe = rt5677_spi_probe,
 636         .remove = rt5677_spi_remove,
 637 };
 638 module_spi_driver(rt5677_spi_driver);
 639
 640 MODULE_DESCRIPTION("ASoC RT5677 SPI driver");
 641 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
 642 MODULE_LICENSE("GPL v2");