2 * rt5651.c -- RT5651 ALSA SoC audio codec driver
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/regmap.h>
19 #include <linux/platform_device.h>
20 #include <linux/spi/spi.h>
21 #include <linux/acpi.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <sound/jack.h>
34 #define RT5651_DEVICE_ID_VALUE 0x6281
36 #define RT5651_PR_RANGE_BASE (0xff + 1)
37 #define RT5651_PR_SPACING 0x100
39 #define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING))
41 static const struct regmap_range_cfg rt5651_ranges[] = {
42 { .name = "PR", .range_min = RT5651_PR_BASE,
43 .range_max = RT5651_PR_BASE + 0xb4,
44 .selector_reg = RT5651_PRIV_INDEX,
45 .selector_mask = 0xff,
46 .selector_shift = 0x0,
47 .window_start = RT5651_PRIV_DATA,
51 static const struct reg_sequence init_list[] = {
52 {RT5651_PR_BASE + 0x3d, 0x3e00},
55 static const struct reg_default rt5651_reg[] = {
138 static bool rt5651_volatile_register(struct device *dev, unsigned int reg)
142 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
143 if ((reg >= rt5651_ranges[i].window_start &&
144 reg <= rt5651_ranges[i].window_start +
145 rt5651_ranges[i].window_len) ||
146 (reg >= rt5651_ranges[i].range_min &&
147 reg <= rt5651_ranges[i].range_max)) {
154 case RT5651_PRIV_DATA:
155 case RT5651_EQ_CTRL1:
157 case RT5651_IRQ_CTRL2:
158 case RT5651_INT_IRQ_ST:
159 case RT5651_PGM_REG_ARR1:
160 case RT5651_PGM_REG_ARR3:
161 case RT5651_VENDOR_ID:
162 case RT5651_DEVICE_ID:
169 static bool rt5651_readable_register(struct device *dev, unsigned int reg)
173 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) {
174 if ((reg >= rt5651_ranges[i].window_start &&
175 reg <= rt5651_ranges[i].window_start +
176 rt5651_ranges[i].window_len) ||
177 (reg >= rt5651_ranges[i].range_min &&
178 reg <= rt5651_ranges[i].range_max)) {
185 case RT5651_VERSION_ID:
186 case RT5651_VENDOR_ID:
187 case RT5651_DEVICE_ID:
189 case RT5651_LOUT_CTRL1:
190 case RT5651_LOUT_CTRL2:
193 case RT5651_INL1_INR1_VOL:
194 case RT5651_INL2_INR2_VOL:
195 case RT5651_DAC1_DIG_VOL:
196 case RT5651_DAC2_DIG_VOL:
197 case RT5651_DAC2_CTRL:
198 case RT5651_ADC_DIG_VOL:
199 case RT5651_ADC_DATA:
200 case RT5651_ADC_BST_VOL:
201 case RT5651_STO1_ADC_MIXER:
202 case RT5651_STO2_ADC_MIXER:
203 case RT5651_AD_DA_MIXER:
204 case RT5651_STO_DAC_MIXER:
205 case RT5651_DD_MIXER:
206 case RT5651_DIG_INF_DATA:
208 case RT5651_REC_L1_MIXER:
209 case RT5651_REC_L2_MIXER:
210 case RT5651_REC_R1_MIXER:
211 case RT5651_REC_R2_MIXER:
212 case RT5651_HPO_MIXER:
213 case RT5651_OUT_L1_MIXER:
214 case RT5651_OUT_L2_MIXER:
215 case RT5651_OUT_L3_MIXER:
216 case RT5651_OUT_R1_MIXER:
217 case RT5651_OUT_R2_MIXER:
218 case RT5651_OUT_R3_MIXER:
219 case RT5651_LOUT_MIXER:
220 case RT5651_PWR_DIG1:
221 case RT5651_PWR_DIG2:
222 case RT5651_PWR_ANLG1:
223 case RT5651_PWR_ANLG2:
224 case RT5651_PWR_MIXER:
226 case RT5651_PRIV_INDEX:
227 case RT5651_PRIV_DATA:
228 case RT5651_I2S1_SDP:
229 case RT5651_I2S2_SDP:
230 case RT5651_ADDA_CLK1:
231 case RT5651_ADDA_CLK2:
233 case RT5651_TDM_CTL_1:
234 case RT5651_TDM_CTL_2:
235 case RT5651_TDM_CTL_3:
237 case RT5651_PLL_CTRL1:
238 case RT5651_PLL_CTRL2:
239 case RT5651_PLL_MODE_1:
240 case RT5651_PLL_MODE_2:
241 case RT5651_PLL_MODE_3:
242 case RT5651_PLL_MODE_4:
243 case RT5651_PLL_MODE_5:
244 case RT5651_PLL_MODE_6:
245 case RT5651_PLL_MODE_7:
246 case RT5651_DEPOP_M1:
247 case RT5651_DEPOP_M2:
248 case RT5651_DEPOP_M3:
249 case RT5651_CHARGE_PUMP:
251 case RT5651_A_JD_CTL1:
252 case RT5651_EQ_CTRL1:
253 case RT5651_EQ_CTRL2:
257 case RT5651_JD_CTRL1:
258 case RT5651_JD_CTRL2:
259 case RT5651_IRQ_CTRL1:
260 case RT5651_IRQ_CTRL2:
261 case RT5651_INT_IRQ_ST:
262 case RT5651_GPIO_CTRL1:
263 case RT5651_GPIO_CTRL2:
264 case RT5651_GPIO_CTRL3:
265 case RT5651_PGM_REG_ARR1:
266 case RT5651_PGM_REG_ARR2:
267 case RT5651_PGM_REG_ARR3:
268 case RT5651_PGM_REG_ARR4:
269 case RT5651_PGM_REG_ARR5:
270 case RT5651_SCB_FUNC:
271 case RT5651_SCB_CTRL:
272 case RT5651_BASE_BACK:
273 case RT5651_MP3_PLUS1:
274 case RT5651_MP3_PLUS2:
275 case RT5651_ADJ_HPF_CTRL1:
276 case RT5651_ADJ_HPF_CTRL2:
277 case RT5651_HP_CALIB_AMP_DET:
278 case RT5651_HP_CALIB2:
290 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
291 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
292 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
293 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
294 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
296 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
297 static const DECLARE_TLV_DB_RANGE(bst_tlv,
298 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
299 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
300 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
301 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
302 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
303 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
304 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
307 /* Interface data select */
308 static const char * const rt5651_data_select[] = {
309 "Normal", "Swap", "left copy to right", "right copy to left"};
311 static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA,
312 RT5651_IF2_DAC_SEL_SFT, rt5651_data_select);
314 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA,
315 RT5651_IF2_ADC_SEL_SFT, rt5651_data_select);
317 static const struct snd_kcontrol_new rt5651_snd_controls[] = {
318 /* Headphone Output Volume */
319 SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL,
320 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
322 SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1,
323 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv),
325 /* DAC Digital Volume */
326 SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL,
327 RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1),
328 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL,
329 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
330 175, 0, dac_vol_tlv),
331 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL,
332 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
333 175, 0, dac_vol_tlv),
334 /* IN1/IN2/IN3 Control */
335 SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2,
336 RT5651_BST_SFT1, 8, 0, bst_tlv),
337 SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2,
338 RT5651_BST_SFT2, 8, 0, bst_tlv),
339 SOC_SINGLE_TLV("IN3 Boost", RT5651_IN3,
340 RT5651_BST_SFT1, 8, 0, bst_tlv),
341 /* INL/INR Volume Control */
342 SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL,
343 RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT,
345 /* ADC Digital Volume Control */
346 SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL,
347 RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1),
348 SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL,
349 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
350 127, 0, adc_vol_tlv),
351 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA,
352 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT,
353 127, 0, adc_vol_tlv),
354 /* ADC Boost Volume Control */
355 SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL,
356 RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT,
360 SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1,
361 RT5651_STO1_T_SFT, 1, 0),
362 SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1,
363 RT5651_STO2_T_SFT, 1, 0),
364 SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1,
365 RT5651_DMIC_1_M_SFT, 1, 0),
367 SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum),
368 SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum),
372 * set_dmic_clk - Set parameter of dmic.
375 * @kcontrol: The kcontrol of this widget.
379 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
380 struct snd_kcontrol *kcontrol, int event)
382 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
383 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
386 rate = rt5651->sysclk / rl6231_get_pre_div(rt5651->regmap,
387 RT5651_ADDA_CLK1, RT5651_I2S_PD1_SFT);
388 idx = rl6231_calc_dmic_clk(rate);
390 dev_err(component->dev, "Failed to set DMIC clock\n");
392 snd_soc_component_update_bits(component, RT5651_DMIC, RT5651_DMIC_CLK_MASK,
393 idx << RT5651_DMIC_CLK_SFT);
399 static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = {
400 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
401 RT5651_M_STO1_ADC_L1_SFT, 1, 1),
402 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
403 RT5651_M_STO1_ADC_L2_SFT, 1, 1),
406 static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = {
407 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER,
408 RT5651_M_STO1_ADC_R1_SFT, 1, 1),
409 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER,
410 RT5651_M_STO1_ADC_R2_SFT, 1, 1),
413 static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = {
414 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
415 RT5651_M_STO2_ADC_L1_SFT, 1, 1),
416 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
417 RT5651_M_STO2_ADC_L2_SFT, 1, 1),
420 static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = {
421 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER,
422 RT5651_M_STO2_ADC_R1_SFT, 1, 1),
423 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER,
424 RT5651_M_STO2_ADC_R2_SFT, 1, 1),
427 static const struct snd_kcontrol_new rt5651_dac_l_mix[] = {
428 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
429 RT5651_M_ADCMIX_L_SFT, 1, 1),
430 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
431 RT5651_M_IF1_DAC_L_SFT, 1, 1),
434 static const struct snd_kcontrol_new rt5651_dac_r_mix[] = {
435 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER,
436 RT5651_M_ADCMIX_R_SFT, 1, 1),
437 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER,
438 RT5651_M_IF1_DAC_R_SFT, 1, 1),
441 static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = {
442 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
443 RT5651_M_DAC_L1_MIXL_SFT, 1, 1),
444 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER,
445 RT5651_M_DAC_L2_MIXL_SFT, 1, 1),
446 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
447 RT5651_M_DAC_R1_MIXL_SFT, 1, 1),
450 static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = {
451 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER,
452 RT5651_M_DAC_R1_MIXR_SFT, 1, 1),
453 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER,
454 RT5651_M_DAC_R2_MIXR_SFT, 1, 1),
455 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER,
456 RT5651_M_DAC_L1_MIXR_SFT, 1, 1),
459 static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = {
460 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER,
461 RT5651_M_STO_DD_L1_SFT, 1, 1),
462 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
463 RT5651_M_STO_DD_L2_SFT, 1, 1),
464 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
465 RT5651_M_STO_DD_R2_L_SFT, 1, 1),
468 static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = {
469 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER,
470 RT5651_M_STO_DD_R1_SFT, 1, 1),
471 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER,
472 RT5651_M_STO_DD_R2_SFT, 1, 1),
473 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER,
474 RT5651_M_STO_DD_L2_R_SFT, 1, 1),
477 /* Analog Input Mixer */
478 static const struct snd_kcontrol_new rt5651_rec_l_mix[] = {
479 SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER,
480 RT5651_M_IN1_L_RM_L_SFT, 1, 1),
481 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER,
482 RT5651_M_BST3_RM_L_SFT, 1, 1),
483 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER,
484 RT5651_M_BST2_RM_L_SFT, 1, 1),
485 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER,
486 RT5651_M_BST1_RM_L_SFT, 1, 1),
489 static const struct snd_kcontrol_new rt5651_rec_r_mix[] = {
490 SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER,
491 RT5651_M_IN1_R_RM_R_SFT, 1, 1),
492 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER,
493 RT5651_M_BST3_RM_R_SFT, 1, 1),
494 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER,
495 RT5651_M_BST2_RM_R_SFT, 1, 1),
496 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER,
497 RT5651_M_BST1_RM_R_SFT, 1, 1),
500 /* Analog Output Mixer */
502 static const struct snd_kcontrol_new rt5651_out_l_mix[] = {
503 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER,
504 RT5651_M_BST1_OM_L_SFT, 1, 1),
505 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER,
506 RT5651_M_BST2_OM_L_SFT, 1, 1),
507 SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER,
508 RT5651_M_IN1_L_OM_L_SFT, 1, 1),
509 SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER,
510 RT5651_M_RM_L_OM_L_SFT, 1, 1),
511 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER,
512 RT5651_M_DAC_L1_OM_L_SFT, 1, 1),
515 static const struct snd_kcontrol_new rt5651_out_r_mix[] = {
516 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER,
517 RT5651_M_BST2_OM_R_SFT, 1, 1),
518 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER,
519 RT5651_M_BST1_OM_R_SFT, 1, 1),
520 SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER,
521 RT5651_M_IN1_R_OM_R_SFT, 1, 1),
522 SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER,
523 RT5651_M_RM_R_OM_R_SFT, 1, 1),
524 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER,
525 RT5651_M_DAC_R1_OM_R_SFT, 1, 1),
528 static const struct snd_kcontrol_new rt5651_hpo_mix[] = {
529 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER,
530 RT5651_M_DAC1_HM_SFT, 1, 1),
531 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER,
532 RT5651_M_HPVOL_HM_SFT, 1, 1),
535 static const struct snd_kcontrol_new rt5651_lout_mix[] = {
536 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER,
537 RT5651_M_DAC_L1_LM_SFT, 1, 1),
538 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER,
539 RT5651_M_DAC_R1_LM_SFT, 1, 1),
540 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER,
541 RT5651_M_OV_L_LM_SFT, 1, 1),
542 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER,
543 RT5651_M_OV_R_LM_SFT, 1, 1),
546 static const struct snd_kcontrol_new outvol_l_control =
547 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
548 RT5651_VOL_L_SFT, 1, 1);
550 static const struct snd_kcontrol_new outvol_r_control =
551 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1,
552 RT5651_VOL_R_SFT, 1, 1);
554 static const struct snd_kcontrol_new lout_l_mute_control =
555 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
556 RT5651_L_MUTE_SFT, 1, 1);
558 static const struct snd_kcontrol_new lout_r_mute_control =
559 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1,
560 RT5651_R_MUTE_SFT, 1, 1);
562 static const struct snd_kcontrol_new hpovol_l_control =
563 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
564 RT5651_VOL_L_SFT, 1, 1);
566 static const struct snd_kcontrol_new hpovol_r_control =
567 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL,
568 RT5651_VOL_R_SFT, 1, 1);
570 static const struct snd_kcontrol_new hpo_l_mute_control =
571 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
572 RT5651_L_MUTE_SFT, 1, 1);
574 static const struct snd_kcontrol_new hpo_r_mute_control =
575 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL,
576 RT5651_R_MUTE_SFT, 1, 1);
578 /* Stereo ADC source */
579 static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"};
581 static SOC_ENUM_SINGLE_DECL(
582 rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER,
583 RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src);
585 static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux =
586 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum);
588 static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux =
589 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum);
591 static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"};
593 static SOC_ENUM_SINGLE_DECL(
594 rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER,
595 RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src);
597 static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux =
598 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum);
600 static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux =
601 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum);
603 /* Mono ADC source */
604 static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"};
606 static SOC_ENUM_SINGLE_DECL(
607 rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER,
608 RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src);
610 static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux =
611 SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum);
613 static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"};
615 static SOC_ENUM_SINGLE_DECL(
616 rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER,
617 RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src);
619 static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux =
620 SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum);
622 static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"};
624 static SOC_ENUM_SINGLE_DECL(
625 rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER,
626 RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src);
628 static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux =
629 SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum);
631 static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"};
633 static SOC_ENUM_SINGLE_DECL(
634 rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER,
635 RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src);
637 static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux =
638 SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum);
640 /* DAC2 channel source */
642 static const char * const rt5651_dac_src[] = {"IF1", "IF2"};
644 static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL,
645 RT5651_SEL_DAC_L2_SFT, rt5651_dac_src);
647 static const struct snd_kcontrol_new rt5651_dac_l2_mux =
648 SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum);
650 static SOC_ENUM_SINGLE_DECL(
651 rt5651_dac_r2_enum, RT5651_DAC2_CTRL,
652 RT5651_SEL_DAC_R2_SFT, rt5651_dac_src);
654 static const struct snd_kcontrol_new rt5651_dac_r2_mux =
655 SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum);
657 /* IF2_ADC channel source */
659 static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"};
661 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA,
662 RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src);
664 static const struct snd_kcontrol_new rt5651_if2_adc_src_mux =
665 SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum);
668 static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"};
670 static SOC_ENUM_SINGLE_DECL(
671 rt5651_pdm_l_sel_enum, RT5651_PDM_CTL,
672 RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel);
674 static SOC_ENUM_SINGLE_DECL(
675 rt5651_pdm_r_sel_enum, RT5651_PDM_CTL,
676 RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel);
678 static const struct snd_kcontrol_new rt5651_pdm_l_mux =
679 SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum);
681 static const struct snd_kcontrol_new rt5651_pdm_r_mux =
682 SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum);
684 static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w,
685 struct snd_kcontrol *kcontrol, int event)
687 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
688 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
691 case SND_SOC_DAPM_POST_PMU:
692 /* depop parameters */
693 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
694 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200);
695 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
696 RT5651_DEPOP_MASK, RT5651_DEPOP_MAN);
697 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
698 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK |
699 RT5651_HP_CB_MASK, RT5651_HP_CP_PU |
700 RT5651_HP_SG_DIS | RT5651_HP_CB_PU);
701 regmap_write(rt5651->regmap, RT5651_PR_BASE +
702 RT5651_HP_DCC_INT1, 0x9f00);
703 /* headphone amp power on */
704 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
705 RT5651_PWR_FV1 | RT5651_PWR_FV2, 0);
706 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
709 usleep_range(10000, 15000);
710 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1,
711 RT5651_PWR_FV1 | RT5651_PWR_FV2 ,
712 RT5651_PWR_FV1 | RT5651_PWR_FV2);
722 static int rt5651_hp_event(struct snd_soc_dapm_widget *w,
723 struct snd_kcontrol *kcontrol, int event)
725 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
726 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
729 case SND_SOC_DAPM_POST_PMU:
730 /* headphone unmute sequence */
731 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2,
732 RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK,
733 RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN);
734 regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP,
735 RT5651_PM_HP_MASK, RT5651_PM_HP_HV);
737 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3,
738 RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK |
740 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) |
741 (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) |
742 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT));
744 regmap_write(rt5651->regmap, RT5651_PR_BASE +
745 RT5651_MAMP_INT_REG2, 0x1c00);
746 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1,
747 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK,
748 RT5651_HP_CP_PD | RT5651_HP_SG_EN);
749 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE +
750 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400);
754 case SND_SOC_DAPM_PRE_PMD:
756 usleep_range(70000, 75000);
766 static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w,
767 struct snd_kcontrol *kcontrol, int event)
770 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
771 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
774 case SND_SOC_DAPM_POST_PMU:
775 if (!rt5651->hp_mute)
776 usleep_range(80000, 85000);
787 static int rt5651_bst1_event(struct snd_soc_dapm_widget *w,
788 struct snd_kcontrol *kcontrol, int event)
790 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
793 case SND_SOC_DAPM_POST_PMU:
794 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
795 RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2);
798 case SND_SOC_DAPM_PRE_PMD:
799 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
800 RT5651_PWR_BST1_OP2, 0);
810 static int rt5651_bst2_event(struct snd_soc_dapm_widget *w,
811 struct snd_kcontrol *kcontrol, int event)
813 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
816 case SND_SOC_DAPM_POST_PMU:
817 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
818 RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2);
821 case SND_SOC_DAPM_PRE_PMD:
822 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
823 RT5651_PWR_BST2_OP2, 0);
833 static int rt5651_bst3_event(struct snd_soc_dapm_widget *w,
834 struct snd_kcontrol *kcontrol, int event)
836 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
839 case SND_SOC_DAPM_POST_PMU:
840 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
841 RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2);
844 case SND_SOC_DAPM_PRE_PMD:
845 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
846 RT5651_PWR_BST3_OP2, 0);
856 static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = {
858 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2,
860 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2,
862 SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2,
864 SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2,
866 SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2,
870 SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1,
871 RT5651_PWR_LDO_BIT, 0, NULL, 0),
872 SND_SOC_DAPM_SUPPLY("micbias1", RT5651_PWR_ANLG2,
873 RT5651_PWR_MB1_BIT, 0, NULL, 0),
875 SND_SOC_DAPM_INPUT("MIC1"),
876 SND_SOC_DAPM_INPUT("MIC2"),
877 SND_SOC_DAPM_INPUT("MIC3"),
879 SND_SOC_DAPM_INPUT("IN1P"),
880 SND_SOC_DAPM_INPUT("IN2P"),
881 SND_SOC_DAPM_INPUT("IN2N"),
882 SND_SOC_DAPM_INPUT("IN3P"),
883 SND_SOC_DAPM_INPUT("DMIC L1"),
884 SND_SOC_DAPM_INPUT("DMIC R1"),
885 SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT,
886 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
888 SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2,
889 RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event,
890 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
891 SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2,
892 RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event,
893 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
894 SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2,
895 RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event,
896 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
898 SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL,
899 RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
900 SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL,
901 RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
902 SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL,
903 RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
904 SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL,
905 RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
908 SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0,
909 rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)),
910 SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0,
911 rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)),
913 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
914 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
915 SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1,
916 RT5651_PWR_ADC_L_BIT, 0, NULL, 0),
917 SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1,
918 RT5651_PWR_ADC_R_BIT, 0, NULL, 0),
920 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
921 &rt5651_sto1_adc_l2_mux),
922 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
923 &rt5651_sto1_adc_r2_mux),
924 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
925 &rt5651_sto1_adc_l1_mux),
926 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
927 &rt5651_sto1_adc_r1_mux),
928 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
929 &rt5651_sto2_adc_l2_mux),
930 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
931 &rt5651_sto2_adc_l1_mux),
932 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
933 &rt5651_sto2_adc_r1_mux),
934 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
935 &rt5651_sto2_adc_r2_mux),
937 SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2,
938 RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
939 SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2,
940 RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0),
941 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
942 rt5651_sto1_adc_l_mix,
943 ARRAY_SIZE(rt5651_sto1_adc_l_mix)),
944 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
945 rt5651_sto1_adc_r_mix,
946 ARRAY_SIZE(rt5651_sto1_adc_r_mix)),
947 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0,
948 rt5651_sto2_adc_l_mix,
949 ARRAY_SIZE(rt5651_sto2_adc_l_mix)),
950 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0,
951 rt5651_sto2_adc_r_mix,
952 ARRAY_SIZE(rt5651_sto2_adc_r_mix)),
954 /* Digital Interface */
955 SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1,
956 RT5651_PWR_I2S1_BIT, 0, NULL, 0),
957 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
958 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
959 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
960 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
961 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
962 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
963 SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
964 SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1,
965 RT5651_PWR_I2S2_BIT, 0, NULL, 0),
966 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
967 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
968 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
969 SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0,
970 &rt5651_if2_adc_src_mux),
972 /* Digital Interface Select */
974 SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL,
975 RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux),
976 SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL,
977 RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux),
978 /* Audio Interface */
979 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
980 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
981 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
982 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
985 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
988 /* DAC mixer before sound effect */
989 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
990 rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)),
991 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
992 rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)),
994 /* DAC2 channel Mux */
995 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux),
996 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux),
997 SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
998 SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0),
1000 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2,
1001 RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
1002 SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2,
1003 RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0),
1005 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1006 rt5651_sto_dac_l_mix,
1007 ARRAY_SIZE(rt5651_sto_dac_l_mix)),
1008 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1009 rt5651_sto_dac_r_mix,
1010 ARRAY_SIZE(rt5651_sto_dac_r_mix)),
1011 SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0,
1012 rt5651_dd_dac_l_mix,
1013 ARRAY_SIZE(rt5651_dd_dac_l_mix)),
1014 SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0,
1015 rt5651_dd_dac_r_mix,
1016 ARRAY_SIZE(rt5651_dd_dac_r_mix)),
1019 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1020 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1021 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1,
1022 RT5651_PWR_DAC_L1_BIT, 0, NULL, 0),
1023 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1,
1024 RT5651_PWR_DAC_R1_BIT, 0, NULL, 0),
1026 SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT,
1027 0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)),
1028 SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT,
1029 0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)),
1031 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL,
1032 RT5651_PWR_OV_L_BIT, 0, &outvol_l_control),
1033 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL,
1034 RT5651_PWR_OV_R_BIT, 0, &outvol_r_control),
1035 SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL,
1036 RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control),
1037 SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL,
1038 RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control),
1039 SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL,
1040 RT5651_PWR_IN1_L_BIT, 0, NULL, 0),
1041 SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL,
1042 RT5651_PWR_IN1_R_BIT, 0, NULL, 0),
1043 SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL,
1044 RT5651_PWR_IN2_L_BIT, 0, NULL, 0),
1045 SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL,
1046 RT5651_PWR_IN2_R_BIT, 0, NULL, 0),
1047 /* HPO/LOUT/Mono Mixer */
1048 SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0,
1049 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1050 SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0,
1051 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)),
1052 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1,
1053 RT5651_PWR_HP_L_BIT, 0, NULL, 0),
1054 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1,
1055 RT5651_PWR_HP_R_BIT, 0, NULL, 0),
1056 SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0,
1057 rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)),
1059 SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1,
1060 RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event,
1061 SND_SOC_DAPM_POST_PMU),
1062 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event,
1063 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1064 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
1065 &hpo_l_mute_control),
1066 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
1067 &hpo_r_mute_control),
1068 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1069 &lout_l_mute_control),
1070 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1071 &lout_r_mute_control),
1072 SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event),
1075 SND_SOC_DAPM_OUTPUT("HPOL"),
1076 SND_SOC_DAPM_OUTPUT("HPOR"),
1077 SND_SOC_DAPM_OUTPUT("LOUTL"),
1078 SND_SOC_DAPM_OUTPUT("LOUTR"),
1079 SND_SOC_DAPM_OUTPUT("PDML"),
1080 SND_SOC_DAPM_OUTPUT("PDMR"),
1083 static const struct snd_soc_dapm_route rt5651_dapm_routes[] = {
1084 {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"},
1085 {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"},
1086 {"I2S1", NULL, "I2S1 ASRC"},
1087 {"I2S2", NULL, "I2S2 ASRC"},
1089 {"IN1P", NULL, "LDO"},
1090 {"IN2P", NULL, "LDO"},
1091 {"IN3P", NULL, "LDO"},
1093 {"IN1P", NULL, "MIC1"},
1094 {"IN2P", NULL, "MIC2"},
1095 {"IN2N", NULL, "MIC2"},
1096 {"IN3P", NULL, "MIC3"},
1098 {"BST1", NULL, "IN1P"},
1099 {"BST2", NULL, "IN2P"},
1100 {"BST2", NULL, "IN2N"},
1101 {"BST3", NULL, "IN3P"},
1103 {"INL1 VOL", NULL, "IN2P"},
1104 {"INR1 VOL", NULL, "IN2N"},
1106 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
1107 {"RECMIXL", "BST3 Switch", "BST3"},
1108 {"RECMIXL", "BST2 Switch", "BST2"},
1109 {"RECMIXL", "BST1 Switch", "BST1"},
1111 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
1112 {"RECMIXR", "BST3 Switch", "BST3"},
1113 {"RECMIXR", "BST2 Switch", "BST2"},
1114 {"RECMIXR", "BST1 Switch", "BST1"},
1116 {"ADC L", NULL, "RECMIXL"},
1117 {"ADC L", NULL, "ADC L Power"},
1118 {"ADC R", NULL, "RECMIXR"},
1119 {"ADC R", NULL, "ADC R Power"},
1121 {"DMIC L1", NULL, "DMIC CLK"},
1122 {"DMIC R1", NULL, "DMIC CLK"},
1124 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"},
1125 {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"},
1126 {"Stereo1 ADC L1 Mux", "ADC", "ADC L"},
1127 {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"},
1129 {"Stereo1 ADC R1 Mux", "ADC", "ADC R"},
1130 {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"},
1131 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"},
1132 {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"},
1134 {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"},
1135 {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"},
1136 {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"},
1137 {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"},
1139 {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"},
1140 {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"},
1141 {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"},
1142 {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"},
1144 {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"},
1145 {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"},
1146 {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"},
1147 {"Stereo1 Filter", NULL, "ADC ASRC"},
1149 {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"},
1150 {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"},
1151 {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"},
1153 {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"},
1154 {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"},
1155 {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"},
1156 {"Stereo2 Filter", NULL, "ADC ASRC"},
1158 {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"},
1159 {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"},
1160 {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"},
1162 {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"},
1163 {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"},
1164 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
1165 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
1167 {"IF1 ADC1", NULL, "I2S1"},
1169 {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"},
1170 {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"},
1171 {"IF2 ADC", NULL, "I2S2"},
1173 {"AIF1TX", NULL, "IF1 ADC1"},
1174 {"AIF1TX", NULL, "IF1 ADC2"},
1175 {"AIF2TX", NULL, "IF2 ADC"},
1177 {"IF1 DAC", NULL, "AIF1RX"},
1178 {"IF1 DAC", NULL, "I2S1"},
1179 {"IF2 DAC", NULL, "AIF2RX"},
1180 {"IF2 DAC", NULL, "I2S2"},
1182 {"IF1 DAC1 L", NULL, "IF1 DAC"},
1183 {"IF1 DAC1 R", NULL, "IF1 DAC"},
1184 {"IF1 DAC2 L", NULL, "IF1 DAC"},
1185 {"IF1 DAC2 R", NULL, "IF1 DAC"},
1186 {"IF2 DAC L", NULL, "IF2 DAC"},
1187 {"IF2 DAC R", NULL, "IF2 DAC"},
1189 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
1190 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
1191 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
1192 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
1194 {"Audio DSP", NULL, "DAC MIXL"},
1195 {"Audio DSP", NULL, "DAC MIXR"},
1197 {"DAC L2 Mux", "IF1", "IF1 DAC2 L"},
1198 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1199 {"DAC L2 Volume", NULL, "DAC L2 Mux"},
1201 {"DAC R2 Mux", "IF1", "IF1 DAC2 R"},
1202 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1203 {"DAC R2 Volume", NULL, "DAC R2 Mux"},
1205 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
1206 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1207 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
1208 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
1209 {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"},
1210 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
1211 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1212 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
1213 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
1214 {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"},
1216 {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"},
1217 {"PDM L Mux", "DD MIX", "DAC MIXL"},
1218 {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"},
1219 {"PDM R Mux", "DD MIX", "DAC MIXR"},
1221 {"DAC L1", NULL, "Stereo DAC MIXL"},
1222 {"DAC L1", NULL, "DAC L1 Power"},
1223 {"DAC R1", NULL, "Stereo DAC MIXR"},
1224 {"DAC R1", NULL, "DAC R1 Power"},
1226 {"DD MIXL", "DAC L1 Switch", "DAC MIXL"},
1227 {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"},
1228 {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"},
1229 {"DD MIXL", NULL, "Stero2 DAC Power"},
1231 {"DD MIXR", "DAC R1 Switch", "DAC MIXR"},
1232 {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"},
1233 {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"},
1234 {"DD MIXR", NULL, "Stero2 DAC Power"},
1236 {"OUT MIXL", "BST1 Switch", "BST1"},
1237 {"OUT MIXL", "BST2 Switch", "BST2"},
1238 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
1239 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1240 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1242 {"OUT MIXR", "BST2 Switch", "BST2"},
1243 {"OUT MIXR", "BST1 Switch", "BST1"},
1244 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
1245 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1246 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1248 {"HPOVOL L", "Switch", "OUT MIXL"},
1249 {"HPOVOL R", "Switch", "OUT MIXR"},
1250 {"OUTVOL L", "Switch", "OUT MIXL"},
1251 {"OUTVOL R", "Switch", "OUT MIXR"},
1253 {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"},
1254 {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"},
1255 {"HPOL MIX", NULL, "HP L Amp"},
1256 {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"},
1257 {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"},
1258 {"HPOR MIX", NULL, "HP R Amp"},
1260 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1261 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1262 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1263 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1265 {"HP Amp", NULL, "HPOL MIX"},
1266 {"HP Amp", NULL, "HPOR MIX"},
1267 {"HP Amp", NULL, "Amp Power"},
1268 {"HPO L Playback", "Switch", "HP Amp"},
1269 {"HPO R Playback", "Switch", "HP Amp"},
1270 {"HPOL", NULL, "HPO L Playback"},
1271 {"HPOR", NULL, "HPO R Playback"},
1273 {"LOUT L Playback", "Switch", "LOUT MIX"},
1274 {"LOUT R Playback", "Switch", "LOUT MIX"},
1275 {"LOUTL", NULL, "LOUT L Playback"},
1276 {"LOUTL", NULL, "Amp Power"},
1277 {"LOUTR", NULL, "LOUT R Playback"},
1278 {"LOUTR", NULL, "Amp Power"},
1280 {"PDML", NULL, "PDM L Mux"},
1281 {"PDMR", NULL, "PDM R Mux"},
1284 static int rt5651_hw_params(struct snd_pcm_substream *substream,
1285 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1287 struct snd_soc_component *component = dai->component;
1288 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1289 unsigned int val_len = 0, val_clk, mask_clk;
1290 int pre_div, bclk_ms, frame_size;
1292 rt5651->lrck[dai->id] = params_rate(params);
1293 pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]);
1296 dev_err(component->dev, "Unsupported clock setting\n");
1299 frame_size = snd_soc_params_to_frame_size(params);
1300 if (frame_size < 0) {
1301 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
1304 bclk_ms = frame_size > 32 ? 1 : 0;
1305 rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms);
1307 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1308 rt5651->bclk[dai->id], rt5651->lrck[dai->id]);
1309 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1310 bclk_ms, pre_div, dai->id);
1312 switch (params_width(params)) {
1316 val_len |= RT5651_I2S_DL_20;
1319 val_len |= RT5651_I2S_DL_24;
1322 val_len |= RT5651_I2S_DL_8;
1330 mask_clk = RT5651_I2S_PD1_MASK;
1331 val_clk = pre_div << RT5651_I2S_PD1_SFT;
1332 snd_soc_component_update_bits(component, RT5651_I2S1_SDP,
1333 RT5651_I2S_DL_MASK, val_len);
1334 snd_soc_component_update_bits(component, RT5651_ADDA_CLK1, mask_clk, val_clk);
1337 mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK;
1338 val_clk = pre_div << RT5651_I2S_PD2_SFT;
1339 snd_soc_component_update_bits(component, RT5651_I2S2_SDP,
1340 RT5651_I2S_DL_MASK, val_len);
1341 snd_soc_component_update_bits(component, RT5651_ADDA_CLK1, mask_clk, val_clk);
1344 dev_err(component->dev, "Wrong dai->id: %d\n", dai->id);
1351 static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1353 struct snd_soc_component *component = dai->component;
1354 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1355 unsigned int reg_val = 0;
1357 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1358 case SND_SOC_DAIFMT_CBM_CFM:
1359 rt5651->master[dai->id] = 1;
1361 case SND_SOC_DAIFMT_CBS_CFS:
1362 reg_val |= RT5651_I2S_MS_S;
1363 rt5651->master[dai->id] = 0;
1369 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1370 case SND_SOC_DAIFMT_NB_NF:
1372 case SND_SOC_DAIFMT_IB_NF:
1373 reg_val |= RT5651_I2S_BP_INV;
1379 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1380 case SND_SOC_DAIFMT_I2S:
1382 case SND_SOC_DAIFMT_LEFT_J:
1383 reg_val |= RT5651_I2S_DF_LEFT;
1385 case SND_SOC_DAIFMT_DSP_A:
1386 reg_val |= RT5651_I2S_DF_PCM_A;
1388 case SND_SOC_DAIFMT_DSP_B:
1389 reg_val |= RT5651_I2S_DF_PCM_B;
1397 snd_soc_component_update_bits(component, RT5651_I2S1_SDP,
1398 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1399 RT5651_I2S_DF_MASK, reg_val);
1402 snd_soc_component_update_bits(component, RT5651_I2S2_SDP,
1403 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK |
1404 RT5651_I2S_DF_MASK, reg_val);
1407 dev_err(component->dev, "Wrong dai->id: %d\n", dai->id);
1413 static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai,
1414 int clk_id, unsigned int freq, int dir)
1416 struct snd_soc_component *component = dai->component;
1417 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1418 unsigned int reg_val = 0;
1419 unsigned int pll_bit = 0;
1421 if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src)
1425 case RT5651_SCLK_S_MCLK:
1426 reg_val |= RT5651_SCLK_SRC_MCLK;
1428 case RT5651_SCLK_S_PLL1:
1429 reg_val |= RT5651_SCLK_SRC_PLL1;
1430 pll_bit |= RT5651_PWR_PLL;
1432 case RT5651_SCLK_S_RCCLK:
1433 reg_val |= RT5651_SCLK_SRC_RCCLK;
1436 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
1439 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1440 RT5651_PWR_PLL, pll_bit);
1441 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1442 RT5651_SCLK_SRC_MASK, reg_val);
1443 rt5651->sysclk = freq;
1444 rt5651->sysclk_src = clk_id;
1446 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1451 static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1452 unsigned int freq_in, unsigned int freq_out)
1454 struct snd_soc_component *component = dai->component;
1455 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1456 struct rl6231_pll_code pll_code;
1459 if (source == rt5651->pll_src && freq_in == rt5651->pll_in &&
1460 freq_out == rt5651->pll_out)
1463 if (!freq_in || !freq_out) {
1464 dev_dbg(component->dev, "PLL disabled\n");
1467 rt5651->pll_out = 0;
1468 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1469 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK);
1474 case RT5651_PLL1_S_MCLK:
1475 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1476 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK);
1478 case RT5651_PLL1_S_BCLK1:
1479 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1480 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1);
1482 case RT5651_PLL1_S_BCLK2:
1483 snd_soc_component_update_bits(component, RT5651_GLB_CLK,
1484 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2);
1487 dev_err(component->dev, "Unknown PLL source %d\n", source);
1491 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1493 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
1497 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
1498 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1499 pll_code.n_code, pll_code.k_code);
1501 snd_soc_component_write(component, RT5651_PLL_CTRL1,
1502 pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code);
1503 snd_soc_component_write(component, RT5651_PLL_CTRL2,
1504 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT |
1505 pll_code.m_bp << RT5651_PLL_M_BP_SFT);
1507 rt5651->pll_in = freq_in;
1508 rt5651->pll_out = freq_out;
1509 rt5651->pll_src = source;
1514 static int rt5651_set_bias_level(struct snd_soc_component *component,
1515 enum snd_soc_bias_level level)
1518 case SND_SOC_BIAS_PREPARE:
1519 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
1520 if (snd_soc_component_read32(component, RT5651_PLL_MODE_1) & 0x9200)
1521 snd_soc_component_update_bits(component, RT5651_D_MISC,
1525 case SND_SOC_BIAS_STANDBY:
1526 if (SND_SOC_BIAS_OFF == snd_soc_component_get_bias_level(component)) {
1527 snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1528 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1529 RT5651_PWR_BG | RT5651_PWR_VREF2,
1530 RT5651_PWR_VREF1 | RT5651_PWR_MB |
1531 RT5651_PWR_BG | RT5651_PWR_VREF2);
1532 usleep_range(10000, 15000);
1533 snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1534 RT5651_PWR_FV1 | RT5651_PWR_FV2,
1535 RT5651_PWR_FV1 | RT5651_PWR_FV2);
1536 snd_soc_component_update_bits(component, RT5651_D_MISC, 0x1, 0x1);
1540 case SND_SOC_BIAS_OFF:
1541 snd_soc_component_write(component, RT5651_D_MISC, 0x0010);
1542 snd_soc_component_write(component, RT5651_PWR_DIG1, 0x0000);
1543 snd_soc_component_write(component, RT5651_PWR_DIG2, 0x0000);
1544 snd_soc_component_write(component, RT5651_PWR_VOL, 0x0000);
1545 snd_soc_component_write(component, RT5651_PWR_MIXER, 0x0000);
1546 /* Do not touch the LDO voltage select bits on bias-off */
1547 snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
1548 ~RT5651_PWR_LDO_DVO_MASK, 0);
1549 /* Leave PLL1 and jack-detect power as is, all others off */
1550 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1551 ~(RT5651_PWR_PLL | RT5651_PWR_JD_M), 0);
1561 static void rt5651_enable_micbias1_for_ovcd(struct snd_soc_component *component)
1563 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1565 snd_soc_dapm_mutex_lock(dapm);
1566 snd_soc_dapm_force_enable_pin_unlocked(dapm, "LDO");
1567 snd_soc_dapm_force_enable_pin_unlocked(dapm, "micbias1");
1568 /* OVCD is unreliable when used with RCCLK as sysclk-source */
1569 snd_soc_dapm_force_enable_pin_unlocked(dapm, "Platform Clock");
1570 snd_soc_dapm_sync_unlocked(dapm);
1571 snd_soc_dapm_mutex_unlock(dapm);
1574 static void rt5651_disable_micbias1_for_ovcd(struct snd_soc_component *component)
1576 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1578 snd_soc_dapm_mutex_lock(dapm);
1579 snd_soc_dapm_disable_pin_unlocked(dapm, "Platform Clock");
1580 snd_soc_dapm_disable_pin_unlocked(dapm, "micbias1");
1581 snd_soc_dapm_disable_pin_unlocked(dapm, "LDO");
1582 snd_soc_dapm_sync_unlocked(dapm);
1583 snd_soc_dapm_mutex_unlock(dapm);
1586 static void rt5651_enable_micbias1_ovcd_irq(struct snd_soc_component *component)
1588 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1590 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1591 RT5651_IRQ_MB1_OC_MASK, RT5651_IRQ_MB1_OC_NOR);
1592 rt5651->ovcd_irq_enabled = true;
1595 static void rt5651_disable_micbias1_ovcd_irq(struct snd_soc_component *component)
1597 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1599 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1600 RT5651_IRQ_MB1_OC_MASK, RT5651_IRQ_MB1_OC_BP);
1601 rt5651->ovcd_irq_enabled = false;
1604 static void rt5651_clear_micbias1_ovcd(struct snd_soc_component *component)
1606 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1607 RT5651_MB1_OC_CLR, 0);
1610 static bool rt5651_micbias1_ovcd(struct snd_soc_component *component)
1614 val = snd_soc_component_read32(component, RT5651_IRQ_CTRL2);
1615 dev_dbg(component->dev, "irq ctrl2 %#04x\n", val);
1617 return (val & RT5651_MB1_OC_CLR);
1620 static bool rt5651_jack_inserted(struct snd_soc_component *component)
1622 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1625 val = snd_soc_component_read32(component, RT5651_INT_IRQ_ST);
1626 dev_dbg(component->dev, "irq status %#04x\n", val);
1628 switch (rt5651->jd_src) {
1645 /* Jack detect and button-press timings */
1646 #define JACK_SETTLE_TIME 100 /* milli seconds */
1647 #define JACK_DETECT_COUNT 5
1648 #define JACK_DETECT_MAXCOUNT 20 /* Aprox. 2 seconds worth of tries */
1649 #define JACK_UNPLUG_TIME 80 /* milli seconds */
1650 #define BP_POLL_TIME 10 /* milli seconds */
1651 #define BP_POLL_MAXCOUNT 200 /* assume something is wrong after this */
1652 #define BP_THRESHOLD 3
1654 static void rt5651_start_button_press_work(struct snd_soc_component *component)
1656 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1658 rt5651->poll_count = 0;
1659 rt5651->press_count = 0;
1660 rt5651->release_count = 0;
1661 rt5651->pressed = false;
1662 rt5651->press_reported = false;
1663 rt5651_clear_micbias1_ovcd(component);
1664 schedule_delayed_work(&rt5651->bp_work, msecs_to_jiffies(BP_POLL_TIME));
1667 static void rt5651_button_press_work(struct work_struct *work)
1669 struct rt5651_priv *rt5651 =
1670 container_of(work, struct rt5651_priv, bp_work.work);
1671 struct snd_soc_component *component = rt5651->component;
1673 /* Check the jack was not removed underneath us */
1674 if (!rt5651_jack_inserted(component))
1677 if (rt5651_micbias1_ovcd(component)) {
1678 rt5651->release_count = 0;
1679 rt5651->press_count++;
1680 /* Remember till after JACK_UNPLUG_TIME wait */
1681 if (rt5651->press_count >= BP_THRESHOLD)
1682 rt5651->pressed = true;
1683 rt5651_clear_micbias1_ovcd(component);
1685 rt5651->press_count = 0;
1686 rt5651->release_count++;
1690 * The pins get temporarily shorted on jack unplug, so we poll for
1691 * at least JACK_UNPLUG_TIME milli-seconds before reporting a press.
1693 rt5651->poll_count++;
1694 if (rt5651->poll_count < (JACK_UNPLUG_TIME / BP_POLL_TIME)) {
1695 schedule_delayed_work(&rt5651->bp_work,
1696 msecs_to_jiffies(BP_POLL_TIME));
1700 if (rt5651->pressed && !rt5651->press_reported) {
1701 dev_dbg(component->dev, "headset button press\n");
1702 snd_soc_jack_report(rt5651->hp_jack, SND_JACK_BTN_0,
1704 rt5651->press_reported = true;
1707 if (rt5651->release_count >= BP_THRESHOLD) {
1708 if (rt5651->press_reported) {
1709 dev_dbg(component->dev, "headset button release\n");
1710 snd_soc_jack_report(rt5651->hp_jack, 0, SND_JACK_BTN_0);
1712 /* Re-enable OVCD IRQ to detect next press */
1713 rt5651_enable_micbias1_ovcd_irq(component);
1714 return; /* Stop polling */
1717 schedule_delayed_work(&rt5651->bp_work, msecs_to_jiffies(BP_POLL_TIME));
1720 static int rt5651_detect_headset(struct snd_soc_component *component)
1722 int i, headset_count = 0, headphone_count = 0;
1725 * We get the insertion event before the jack is fully inserted at which
1726 * point the second ring on a TRRS connector may short the 2nd ring and
1727 * sleeve contacts, also the overcurrent detection is not entirely
1728 * reliable. So we try several times with a wait in between until we
1729 * detect the same type JACK_DETECT_COUNT times in a row.
1731 for (i = 0; i < JACK_DETECT_MAXCOUNT; i++) {
1732 /* Clear any previous over-current status flag */
1733 rt5651_clear_micbias1_ovcd(component);
1735 msleep(JACK_SETTLE_TIME);
1737 /* Check the jack is still connected before checking ovcd */
1738 if (!rt5651_jack_inserted(component))
1741 if (rt5651_micbias1_ovcd(component)) {
1743 * Over current detected, there is a short between the
1744 * 2nd ring contact and the ground, so a TRS connector
1745 * without a mic contact and thus plain headphones.
1747 dev_dbg(component->dev, "mic-gnd shorted\n");
1750 if (headphone_count == JACK_DETECT_COUNT)
1751 return SND_JACK_HEADPHONE;
1753 dev_dbg(component->dev, "mic-gnd open\n");
1754 headphone_count = 0;
1756 if (headset_count == JACK_DETECT_COUNT)
1757 return SND_JACK_HEADSET;
1761 dev_err(component->dev, "Error detecting headset vs headphones, bad contact?, assuming headphones\n");
1762 return SND_JACK_HEADPHONE;
1765 static void rt5651_jack_detect_work(struct work_struct *work)
1767 struct rt5651_priv *rt5651 =
1768 container_of(work, struct rt5651_priv, jack_detect_work);
1769 struct snd_soc_component *component = rt5651->component;
1772 if (!rt5651_jack_inserted(component)) {
1773 /* Jack removed, or spurious IRQ? */
1774 if (rt5651->hp_jack->status & SND_JACK_HEADPHONE) {
1775 if (rt5651->hp_jack->status & SND_JACK_MICROPHONE) {
1776 cancel_delayed_work_sync(&rt5651->bp_work);
1777 rt5651_disable_micbias1_ovcd_irq(component);
1778 rt5651_disable_micbias1_for_ovcd(component);
1780 snd_soc_jack_report(rt5651->hp_jack, 0,
1781 SND_JACK_HEADSET | SND_JACK_BTN_0);
1782 dev_dbg(component->dev, "jack unplugged\n");
1784 } else if (!(rt5651->hp_jack->status & SND_JACK_HEADPHONE)) {
1786 WARN_ON(rt5651->ovcd_irq_enabled);
1787 rt5651_enable_micbias1_for_ovcd(component);
1788 report = rt5651_detect_headset(component);
1789 if (report == SND_JACK_HEADSET) {
1790 /* Enable ovcd IRQ for button press detect. */
1791 rt5651_enable_micbias1_ovcd_irq(component);
1793 /* No more need for overcurrent detect. */
1794 rt5651_disable_micbias1_for_ovcd(component);
1796 dev_dbg(component->dev, "detect report %#02x\n", report);
1797 snd_soc_jack_report(rt5651->hp_jack, report, SND_JACK_HEADSET);
1798 } else if (rt5651->ovcd_irq_enabled && rt5651_micbias1_ovcd(component)) {
1799 dev_dbg(component->dev, "OVCD IRQ\n");
1802 * The ovcd IRQ keeps firing while the button is pressed, so
1803 * we disable it and start polling the button until released.
1805 * The disable will make the IRQ pin 0 again and since we get
1806 * IRQs on both edges (so as to detect both jack plugin and
1807 * unplug) this means we will immediately get another IRQ.
1808 * The ovcd_irq_enabled check above makes the 2ND IRQ a NOP.
1810 rt5651_disable_micbias1_ovcd_irq(component);
1811 rt5651_start_button_press_work(component);
1814 * If the jack-detect IRQ flag goes high (unplug) after our
1815 * above rt5651_jack_inserted() check and before we have
1816 * disabled the OVCD IRQ, the IRQ pin will stay high and as
1817 * we react to edges, we miss the unplug event -> recheck.
1819 queue_work(system_long_wq, &rt5651->jack_detect_work);
1823 static irqreturn_t rt5651_irq(int irq, void *data)
1825 struct rt5651_priv *rt5651 = data;
1827 queue_work(system_power_efficient_wq, &rt5651->jack_detect_work);
1832 static void rt5651_cancel_work(void *data)
1834 struct rt5651_priv *rt5651 = data;
1836 cancel_work_sync(&rt5651->jack_detect_work);
1837 cancel_delayed_work_sync(&rt5651->bp_work);
1840 static void rt5651_enable_jack_detect(struct snd_soc_component *component,
1841 struct snd_soc_jack *hp_jack)
1843 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1845 /* IRQ output on GPIO1 */
1846 snd_soc_component_update_bits(component, RT5651_GPIO_CTRL1,
1847 RT5651_GP1_PIN_MASK, RT5651_GP1_PIN_IRQ);
1849 /* Select jack detect source */
1850 switch (rt5651->jd_src) {
1852 snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1853 RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD1_1);
1854 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL1,
1855 RT5651_JD1_1_IRQ_EN, RT5651_JD1_1_IRQ_EN);
1858 snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1859 RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD1_2);
1860 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL1,
1861 RT5651_JD1_2_IRQ_EN, RT5651_JD1_2_IRQ_EN);
1864 snd_soc_component_update_bits(component, RT5651_JD_CTRL2,
1865 RT5651_JD_TRG_SEL_MASK, RT5651_JD_TRG_SEL_JD2);
1866 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL1,
1867 RT5651_JD2_IRQ_EN, RT5651_JD2_IRQ_EN);
1869 case RT5651_JD_NULL:
1872 dev_err(component->dev, "Currently only JD1_1 / JD1_2 / JD2 are supported\n");
1876 /* Enable jack detect power */
1877 snd_soc_component_update_bits(component, RT5651_PWR_ANLG2,
1878 RT5651_PWR_JD_M, RT5651_PWR_JD_M);
1880 /* Set OVCD threshold current and scale-factor */
1881 snd_soc_component_write(component, RT5651_PR_BASE + RT5651_BIAS_CUR4,
1882 0xa800 | rt5651->ovcd_sf);
1884 snd_soc_component_update_bits(component, RT5651_MICBIAS,
1885 RT5651_MIC1_OVCD_MASK |
1886 RT5651_MIC1_OVTH_MASK |
1887 RT5651_PWR_CLK12M_MASK |
1889 RT5651_MIC1_OVCD_EN |
1892 RT5651_PWR_CLK12M_PU);
1895 * The over-current-detect is only reliable in detecting the absence
1896 * of over-current, when the mic-contact in the jack is short-circuited,
1897 * the hardware periodically retries if it can apply the bias-current
1898 * leading to the ovcd status flip-flopping 1-0-1 with it being 0 about
1899 * 10% of the time, as we poll the ovcd status bit we might hit that
1900 * 10%, so we enable sticky mode and when checking OVCD we clear the
1901 * status, msleep() a bit and then check to get a reliable reading.
1903 snd_soc_component_update_bits(component, RT5651_IRQ_CTRL2,
1904 RT5651_MB1_OC_STKY_MASK, RT5651_MB1_OC_STKY_EN);
1906 rt5651->hp_jack = hp_jack;
1907 if (rt5651->hp_jack->status & SND_JACK_MICROPHONE) {
1908 rt5651_enable_micbias1_for_ovcd(component);
1909 rt5651_enable_micbias1_ovcd_irq(component);
1912 enable_irq(rt5651->irq);
1913 /* sync initial jack state */
1914 queue_work(system_power_efficient_wq, &rt5651->jack_detect_work);
1917 static void rt5651_disable_jack_detect(struct snd_soc_component *component)
1919 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1921 disable_irq(rt5651->irq);
1922 rt5651_cancel_work(rt5651);
1924 if (rt5651->hp_jack->status & SND_JACK_MICROPHONE) {
1925 rt5651_disable_micbias1_ovcd_irq(component);
1926 rt5651_disable_micbias1_for_ovcd(component);
1927 snd_soc_jack_report(rt5651->hp_jack, 0, SND_JACK_BTN_0);
1930 rt5651->hp_jack = NULL;
1933 static int rt5651_set_jack(struct snd_soc_component *component,
1934 struct snd_soc_jack *jack, void *data)
1937 rt5651_enable_jack_detect(component, jack);
1939 rt5651_disable_jack_detect(component);
1945 * Note on some platforms the platform code may need to add device-properties,
1946 * rather then relying only on properties set by the firmware. Therefor the
1947 * property parsing MUST be done from the component driver's probe function,
1948 * rather then from the i2c driver's probe function, so that the platform-code
1949 * can attach extra properties before calling snd_soc_register_card().
1951 static void rt5651_apply_properties(struct snd_soc_component *component)
1953 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
1956 if (device_property_read_bool(component->dev, "realtek,in2-differential"))
1957 snd_soc_component_update_bits(component, RT5651_IN1_IN2,
1958 RT5651_IN_DF2, RT5651_IN_DF2);
1960 if (device_property_read_bool(component->dev, "realtek,dmic-en"))
1961 snd_soc_component_update_bits(component, RT5651_GPIO_CTRL1,
1962 RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL);
1964 if (device_property_read_u32(component->dev,
1965 "realtek,jack-detect-source", &val) == 0)
1966 rt5651->jd_src = val;
1969 * Testing on various boards has shown that good defaults for the OVCD
1970 * threshold and scale-factor are 2000µA and 0.75. For an effective
1971 * limit of 1500µA, this seems to be more reliable then 1500µA and 1.0.
1973 rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA;
1974 rt5651->ovcd_sf = RT5651_MIC_OVCD_SF_0P75;
1976 if (device_property_read_u32(component->dev,
1977 "realtek,over-current-threshold-microamp", &val) == 0) {
1980 rt5651->ovcd_th = RT5651_MIC1_OVTH_600UA;
1983 rt5651->ovcd_th = RT5651_MIC1_OVTH_1500UA;
1986 rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA;
1989 dev_warn(component->dev, "Warning: Invalid over-current-threshold-microamp value: %d, defaulting to 2000uA\n",
1994 if (device_property_read_u32(component->dev,
1995 "realtek,over-current-scale-factor", &val) == 0) {
1996 if (val <= RT5651_OVCD_SF_1P5)
1997 rt5651->ovcd_sf = val << RT5651_MIC_OVCD_SF_SFT;
1999 dev_warn(component->dev, "Warning: Invalid over-current-scale-factor value: %d, defaulting to 0.75\n",
2004 static int rt5651_probe(struct snd_soc_component *component)
2006 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2008 rt5651->component = component;
2010 snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
2011 RT5651_PWR_LDO_DVO_MASK, RT5651_PWR_LDO_DVO_1_2V);
2013 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
2015 rt5651_apply_properties(component);
2021 static int rt5651_suspend(struct snd_soc_component *component)
2023 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2025 regcache_cache_only(rt5651->regmap, true);
2026 regcache_mark_dirty(rt5651->regmap);
2030 static int rt5651_resume(struct snd_soc_component *component)
2032 struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component);
2034 regcache_cache_only(rt5651->regmap, false);
2035 snd_soc_component_cache_sync(component);
2040 #define rt5651_suspend NULL
2041 #define rt5651_resume NULL
2044 #define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2045 #define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2046 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2048 static const struct snd_soc_dai_ops rt5651_aif_dai_ops = {
2049 .hw_params = rt5651_hw_params,
2050 .set_fmt = rt5651_set_dai_fmt,
2051 .set_sysclk = rt5651_set_dai_sysclk,
2052 .set_pll = rt5651_set_dai_pll,
2055 static struct snd_soc_dai_driver rt5651_dai[] = {
2057 .name = "rt5651-aif1",
2060 .stream_name = "AIF1 Playback",
2063 .rates = RT5651_STEREO_RATES,
2064 .formats = RT5651_FORMATS,
2067 .stream_name = "AIF1 Capture",
2070 .rates = RT5651_STEREO_RATES,
2071 .formats = RT5651_FORMATS,
2073 .ops = &rt5651_aif_dai_ops,
2076 .name = "rt5651-aif2",
2079 .stream_name = "AIF2 Playback",
2082 .rates = RT5651_STEREO_RATES,
2083 .formats = RT5651_FORMATS,
2086 .stream_name = "AIF2 Capture",
2089 .rates = RT5651_STEREO_RATES,
2090 .formats = RT5651_FORMATS,
2092 .ops = &rt5651_aif_dai_ops,
2096 static const struct snd_soc_component_driver soc_component_dev_rt5651 = {
2097 .probe = rt5651_probe,
2098 .suspend = rt5651_suspend,
2099 .resume = rt5651_resume,
2100 .set_bias_level = rt5651_set_bias_level,
2101 .set_jack = rt5651_set_jack,
2102 .controls = rt5651_snd_controls,
2103 .num_controls = ARRAY_SIZE(rt5651_snd_controls),
2104 .dapm_widgets = rt5651_dapm_widgets,
2105 .num_dapm_widgets = ARRAY_SIZE(rt5651_dapm_widgets),
2106 .dapm_routes = rt5651_dapm_routes,
2107 .num_dapm_routes = ARRAY_SIZE(rt5651_dapm_routes),
2108 .use_pmdown_time = 1,
2110 .non_legacy_dai_naming = 1,
2113 static const struct regmap_config rt5651_regmap = {
2117 .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) *
2119 .volatile_reg = rt5651_volatile_register,
2120 .readable_reg = rt5651_readable_register,
2122 .cache_type = REGCACHE_RBTREE,
2123 .reg_defaults = rt5651_reg,
2124 .num_reg_defaults = ARRAY_SIZE(rt5651_reg),
2125 .ranges = rt5651_ranges,
2126 .num_ranges = ARRAY_SIZE(rt5651_ranges),
2127 .use_single_rw = true,
2130 #if defined(CONFIG_OF)
2131 static const struct of_device_id rt5651_of_match[] = {
2132 { .compatible = "realtek,rt5651", },
2135 MODULE_DEVICE_TABLE(of, rt5651_of_match);
2139 static const struct acpi_device_id rt5651_acpi_match[] = {
2143 MODULE_DEVICE_TABLE(acpi, rt5651_acpi_match);
2146 static const struct i2c_device_id rt5651_i2c_id[] = {
2150 MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id);
2153 * Note this function MUST not look at device-properties, see the comment
2154 * above rt5651_apply_properties().
2156 static int rt5651_i2c_probe(struct i2c_client *i2c,
2157 const struct i2c_device_id *id)
2159 struct rt5651_priv *rt5651;
2162 rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651),
2167 i2c_set_clientdata(i2c, rt5651);
2169 rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap);
2170 if (IS_ERR(rt5651->regmap)) {
2171 ret = PTR_ERR(rt5651->regmap);
2172 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2177 regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret);
2178 if (ret != RT5651_DEVICE_ID_VALUE) {
2180 "Device with ID register %#x is not rt5651\n", ret);
2184 regmap_write(rt5651->regmap, RT5651_RESET, 0);
2186 ret = regmap_register_patch(rt5651->regmap, init_list,
2187 ARRAY_SIZE(init_list));
2189 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2191 rt5651->irq = i2c->irq;
2192 rt5651->hp_mute = 1;
2194 INIT_DELAYED_WORK(&rt5651->bp_work, rt5651_button_press_work);
2195 INIT_WORK(&rt5651->jack_detect_work, rt5651_jack_detect_work);
2197 /* Make sure work is stopped on probe-error / remove */
2198 ret = devm_add_action_or_reset(&i2c->dev, rt5651_cancel_work, rt5651);
2202 ret = devm_request_irq(&i2c->dev, rt5651->irq, rt5651_irq,
2203 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2204 | IRQF_ONESHOT, "rt5651", rt5651);
2206 /* Gets re-enabled by rt5651_set_jack() */
2207 disable_irq(rt5651->irq);
2209 dev_warn(&i2c->dev, "Failed to reguest IRQ %d: %d\n",
2211 rt5651->irq = -ENXIO;
2214 ret = devm_snd_soc_register_component(&i2c->dev,
2215 &soc_component_dev_rt5651,
2216 rt5651_dai, ARRAY_SIZE(rt5651_dai));
2221 static struct i2c_driver rt5651_i2c_driver = {
2224 .acpi_match_table = ACPI_PTR(rt5651_acpi_match),
2225 .of_match_table = of_match_ptr(rt5651_of_match),
2227 .probe = rt5651_i2c_probe,
2228 .id_table = rt5651_i2c_id,
2230 module_i2c_driver(rt5651_i2c_driver);
2232 MODULE_DESCRIPTION("ASoC RT5651 driver");
2233 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2234 MODULE_LICENSE("GPL v2");