2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/acpi.h>
23 #include <linux/dmi.h>
24 #include <linux/regulator/consumer.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/jack.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
37 #define RT5645_DEVICE_ID 0x6308
38 #define RT5650_DEVICE_ID 0x6419
40 #define RT5645_PR_RANGE_BASE (0xff + 1)
41 #define RT5645_PR_SPACING 0x100
43 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
45 static const struct regmap_range_cfg rt5645_ranges[] = {
48 .range_min = RT5645_PR_BASE,
49 .range_max = RT5645_PR_BASE + 0xf8,
50 .selector_reg = RT5645_PRIV_INDEX,
51 .selector_mask = 0xff,
52 .selector_shift = 0x0,
53 .window_start = RT5645_PRIV_DATA,
58 static const struct reg_sequence init_list[] = {
59 {RT5645_PR_BASE + 0x3d, 0x3600},
60 {RT5645_PR_BASE + 0x1c, 0xfd20},
61 {RT5645_PR_BASE + 0x20, 0x611f},
62 {RT5645_PR_BASE + 0x21, 0x4040},
63 {RT5645_PR_BASE + 0x23, 0x0004},
65 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
67 static const struct reg_sequence rt5650_init_list[] = {
71 static const struct reg_default rt5645_reg[] = {
227 static const char *const rt5645_supply_names[] = {
233 struct snd_soc_codec *codec;
234 struct rt5645_platform_data pdata;
235 struct regmap *regmap;
236 struct i2c_client *i2c;
237 struct gpio_desc *gpiod_hp_det;
238 struct snd_soc_jack *hp_jack;
239 struct snd_soc_jack *mic_jack;
240 struct snd_soc_jack *btn_jack;
241 struct delayed_work jack_detect_work;
242 struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
247 int lrck[RT5645_AIFS];
248 int bclk[RT5645_AIFS];
249 int master[RT5645_AIFS];
260 static int rt5645_reset(struct snd_soc_codec *codec)
262 return snd_soc_write(codec, RT5645_RESET, 0);
265 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
269 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
270 if (reg >= rt5645_ranges[i].range_min &&
271 reg <= rt5645_ranges[i].range_max) {
278 case RT5645_PRIV_DATA:
279 case RT5645_IN1_CTRL1:
280 case RT5645_IN1_CTRL2:
281 case RT5645_IN1_CTRL3:
282 case RT5645_A_JD_CTRL1:
283 case RT5645_ADC_EQ_CTRL1:
284 case RT5645_EQ_CTRL1:
285 case RT5645_ALC_CTRL_1:
286 case RT5645_IRQ_CTRL2:
287 case RT5645_IRQ_CTRL3:
288 case RT5645_INT_IRQ_ST:
290 case RT5650_4BTN_IL_CMD1:
291 case RT5645_VENDOR_ID:
292 case RT5645_VENDOR_ID1:
293 case RT5645_VENDOR_ID2:
300 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
304 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
305 if (reg >= rt5645_ranges[i].range_min &&
306 reg <= rt5645_ranges[i].range_max) {
316 case RT5645_IN1_CTRL1:
317 case RT5645_IN1_CTRL2:
318 case RT5645_IN1_CTRL3:
319 case RT5645_IN2_CTRL:
320 case RT5645_INL1_INR1_VOL:
321 case RT5645_SPK_FUNC_LIM:
322 case RT5645_ADJ_HPF_CTRL:
323 case RT5645_DAC1_DIG_VOL:
324 case RT5645_DAC2_DIG_VOL:
325 case RT5645_DAC_CTRL:
326 case RT5645_STO1_ADC_DIG_VOL:
327 case RT5645_MONO_ADC_DIG_VOL:
328 case RT5645_ADC_BST_VOL1:
329 case RT5645_ADC_BST_VOL2:
330 case RT5645_STO1_ADC_MIXER:
331 case RT5645_MONO_ADC_MIXER:
332 case RT5645_AD_DA_MIXER:
333 case RT5645_STO_DAC_MIXER:
334 case RT5645_MONO_DAC_MIXER:
335 case RT5645_DIG_MIXER:
336 case RT5650_A_DAC_SOUR:
337 case RT5645_DIG_INF1_DATA:
338 case RT5645_PDM_OUT_CTRL:
339 case RT5645_REC_L1_MIXER:
340 case RT5645_REC_L2_MIXER:
341 case RT5645_REC_R1_MIXER:
342 case RT5645_REC_R2_MIXER:
343 case RT5645_HPMIXL_CTRL:
344 case RT5645_HPOMIXL_CTRL:
345 case RT5645_HPMIXR_CTRL:
346 case RT5645_HPOMIXR_CTRL:
347 case RT5645_HPO_MIXER:
348 case RT5645_SPK_L_MIXER:
349 case RT5645_SPK_R_MIXER:
350 case RT5645_SPO_MIXER:
351 case RT5645_SPO_CLSD_RATIO:
352 case RT5645_OUT_L1_MIXER:
353 case RT5645_OUT_R1_MIXER:
354 case RT5645_OUT_L_GAIN1:
355 case RT5645_OUT_L_GAIN2:
356 case RT5645_OUT_R_GAIN1:
357 case RT5645_OUT_R_GAIN2:
358 case RT5645_LOUT_MIXER:
359 case RT5645_HAPTIC_CTRL1:
360 case RT5645_HAPTIC_CTRL2:
361 case RT5645_HAPTIC_CTRL3:
362 case RT5645_HAPTIC_CTRL4:
363 case RT5645_HAPTIC_CTRL5:
364 case RT5645_HAPTIC_CTRL6:
365 case RT5645_HAPTIC_CTRL7:
366 case RT5645_HAPTIC_CTRL8:
367 case RT5645_HAPTIC_CTRL9:
368 case RT5645_HAPTIC_CTRL10:
369 case RT5645_PWR_DIG1:
370 case RT5645_PWR_DIG2:
371 case RT5645_PWR_ANLG1:
372 case RT5645_PWR_ANLG2:
373 case RT5645_PWR_MIXER:
375 case RT5645_PRIV_INDEX:
376 case RT5645_PRIV_DATA:
377 case RT5645_I2S1_SDP:
378 case RT5645_I2S2_SDP:
379 case RT5645_ADDA_CLK1:
380 case RT5645_ADDA_CLK2:
381 case RT5645_DMIC_CTRL1:
382 case RT5645_DMIC_CTRL2:
383 case RT5645_TDM_CTRL_1:
384 case RT5645_TDM_CTRL_2:
385 case RT5645_TDM_CTRL_3:
386 case RT5650_TDM_CTRL_4:
388 case RT5645_PLL_CTRL1:
389 case RT5645_PLL_CTRL2:
394 case RT5645_DEPOP_M1:
395 case RT5645_DEPOP_M2:
396 case RT5645_DEPOP_M3:
397 case RT5645_CHARGE_PUMP:
399 case RT5645_A_JD_CTRL1:
400 case RT5645_VAD_CTRL4:
401 case RT5645_CLSD_OUT_CTRL:
402 case RT5645_ADC_EQ_CTRL1:
403 case RT5645_ADC_EQ_CTRL2:
404 case RT5645_EQ_CTRL1:
405 case RT5645_EQ_CTRL2:
406 case RT5645_ALC_CTRL_1:
407 case RT5645_ALC_CTRL_2:
408 case RT5645_ALC_CTRL_3:
409 case RT5645_ALC_CTRL_4:
410 case RT5645_ALC_CTRL_5:
412 case RT5645_IRQ_CTRL1:
413 case RT5645_IRQ_CTRL2:
414 case RT5645_IRQ_CTRL3:
415 case RT5645_INT_IRQ_ST:
416 case RT5645_GPIO_CTRL1:
417 case RT5645_GPIO_CTRL2:
418 case RT5645_GPIO_CTRL3:
419 case RT5645_BASS_BACK:
420 case RT5645_MP3_PLUS1:
421 case RT5645_MP3_PLUS2:
422 case RT5645_ADJ_HPF1:
423 case RT5645_ADJ_HPF2:
424 case RT5645_HP_CALIB_AMP_DET:
430 case RT5650_4BTN_IL_CMD1:
431 case RT5650_4BTN_IL_CMD2:
432 case RT5645_DRC1_HL_CTRL1:
433 case RT5645_DRC2_HL_CTRL1:
434 case RT5645_ADC_MONO_HP_CTRL1:
435 case RT5645_ADC_MONO_HP_CTRL2:
436 case RT5645_DRC2_CTRL1:
437 case RT5645_DRC2_CTRL2:
438 case RT5645_DRC2_CTRL3:
439 case RT5645_DRC2_CTRL4:
440 case RT5645_DRC2_CTRL5:
441 case RT5645_JD_CTRL3:
442 case RT5645_JD_CTRL4:
443 case RT5645_GEN_CTRL1:
444 case RT5645_GEN_CTRL2:
445 case RT5645_GEN_CTRL3:
446 case RT5645_VENDOR_ID:
447 case RT5645_VENDOR_ID1:
448 case RT5645_VENDOR_ID2:
455 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
456 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
457 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
458 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
459 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
461 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
462 static unsigned int bst_tlv[] = {
463 TLV_DB_RANGE_HEAD(7),
464 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
465 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
466 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
467 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
468 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
469 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
470 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
473 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
474 /* Speaker Output Volume */
475 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
476 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
477 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
478 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
480 /* Headphone Output Volume */
481 SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
482 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
483 SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
484 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
487 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
488 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
489 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
490 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
491 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
492 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
494 /* DAC Digital Volume */
495 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
496 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
497 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
498 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
499 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
500 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
502 /* IN1/IN2 Control */
503 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
504 RT5645_BST_SFT1, 8, 0, bst_tlv),
505 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
506 RT5645_BST_SFT2, 8, 0, bst_tlv),
508 /* INL/INR Volume Control */
509 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
510 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
512 /* ADC Digital Volume Control */
513 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
514 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
515 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
516 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
517 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
518 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
519 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
520 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
522 /* ADC Boost Volume Control */
523 SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
524 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
526 SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
527 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
530 /* I2S2 function select */
531 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
536 * set_dmic_clk - Set parameter of dmic.
539 * @kcontrol: The kcontrol of this widget.
543 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
544 struct snd_kcontrol *kcontrol, int event)
546 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
547 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
550 rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
551 RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
552 idx = rl6231_calc_dmic_clk(rate);
554 dev_err(codec->dev, "Failed to set DMIC clock\n");
556 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
557 RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
561 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
562 struct snd_soc_dapm_widget *sink)
564 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
567 val = snd_soc_read(codec, RT5645_GLB_CLK);
568 val &= RT5645_SCLK_SRC_MASK;
569 if (val == RT5645_SCLK_SRC_PLL1)
575 static int is_using_asrc(struct snd_soc_dapm_widget *source,
576 struct snd_soc_dapm_widget *sink)
578 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
579 unsigned int reg, shift, val;
581 switch (source->shift) {
610 val = (snd_soc_read(codec, reg) >> shift) & 0xf;
624 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
625 * @codec: SoC audio codec device.
626 * @filter_mask: mask of filters.
627 * @clk_src: clock source
629 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
630 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
631 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
632 * ASRC function will track i2s clock and generate a corresponding system clock
633 * for codec. This function provides an API to select the clock source for a
634 * set of filters specified by the mask. And the codec driver will turn on ASRC
635 * for these filters if ASRC is selected as their clock source.
637 int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec,
638 unsigned int filter_mask, unsigned int clk_src)
640 unsigned int asrc2_mask = 0;
641 unsigned int asrc2_value = 0;
642 unsigned int asrc3_mask = 0;
643 unsigned int asrc3_value = 0;
646 case RT5645_CLK_SEL_SYS:
647 case RT5645_CLK_SEL_I2S1_ASRC:
648 case RT5645_CLK_SEL_I2S2_ASRC:
649 case RT5645_CLK_SEL_SYS2:
656 if (filter_mask & RT5645_DA_STEREO_FILTER) {
657 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
658 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
659 | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
662 if (filter_mask & RT5645_DA_MONO_L_FILTER) {
663 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
664 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
665 | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
668 if (filter_mask & RT5645_DA_MONO_R_FILTER) {
669 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
670 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
671 | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
674 if (filter_mask & RT5645_AD_STEREO_FILTER) {
675 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
676 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
677 | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
680 if (filter_mask & RT5645_AD_MONO_L_FILTER) {
681 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
682 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
683 | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
686 if (filter_mask & RT5645_AD_MONO_R_FILTER) {
687 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
688 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
689 | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
693 snd_soc_update_bits(codec, RT5645_ASRC_2,
694 asrc2_mask, asrc2_value);
697 snd_soc_update_bits(codec, RT5645_ASRC_3,
698 asrc3_mask, asrc3_value);
702 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
705 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
706 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
707 RT5645_M_ADC_L1_SFT, 1, 1),
708 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
709 RT5645_M_ADC_L2_SFT, 1, 1),
712 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
713 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
714 RT5645_M_ADC_R1_SFT, 1, 1),
715 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
716 RT5645_M_ADC_R2_SFT, 1, 1),
719 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
720 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
721 RT5645_M_MONO_ADC_L1_SFT, 1, 1),
722 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
723 RT5645_M_MONO_ADC_L2_SFT, 1, 1),
726 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
727 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
728 RT5645_M_MONO_ADC_R1_SFT, 1, 1),
729 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
730 RT5645_M_MONO_ADC_R2_SFT, 1, 1),
733 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
734 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
735 RT5645_M_ADCMIX_L_SFT, 1, 1),
736 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
737 RT5645_M_DAC1_L_SFT, 1, 1),
740 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
741 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
742 RT5645_M_ADCMIX_R_SFT, 1, 1),
743 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
744 RT5645_M_DAC1_R_SFT, 1, 1),
747 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
748 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
749 RT5645_M_DAC_L1_SFT, 1, 1),
750 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
751 RT5645_M_DAC_L2_SFT, 1, 1),
752 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
753 RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
756 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
757 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
758 RT5645_M_DAC_R1_SFT, 1, 1),
759 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
760 RT5645_M_DAC_R2_SFT, 1, 1),
761 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
762 RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
765 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
766 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
767 RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
768 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
769 RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
770 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
771 RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
774 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
775 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
776 RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
777 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
778 RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
779 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
780 RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
783 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
784 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
785 RT5645_M_STO_L_DAC_L_SFT, 1, 1),
786 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
787 RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
788 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
789 RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
792 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
793 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
794 RT5645_M_STO_R_DAC_R_SFT, 1, 1),
795 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
796 RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
797 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
798 RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
801 /* Analog Input Mixer */
802 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
803 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
804 RT5645_M_HP_L_RM_L_SFT, 1, 1),
805 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
806 RT5645_M_IN_L_RM_L_SFT, 1, 1),
807 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
808 RT5645_M_BST2_RM_L_SFT, 1, 1),
809 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
810 RT5645_M_BST1_RM_L_SFT, 1, 1),
811 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
812 RT5645_M_OM_L_RM_L_SFT, 1, 1),
815 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
816 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
817 RT5645_M_HP_R_RM_R_SFT, 1, 1),
818 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
819 RT5645_M_IN_R_RM_R_SFT, 1, 1),
820 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
821 RT5645_M_BST2_RM_R_SFT, 1, 1),
822 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
823 RT5645_M_BST1_RM_R_SFT, 1, 1),
824 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
825 RT5645_M_OM_R_RM_R_SFT, 1, 1),
828 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
829 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
830 RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
831 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
832 RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
833 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
834 RT5645_M_IN_L_SM_L_SFT, 1, 1),
835 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
836 RT5645_M_BST1_L_SM_L_SFT, 1, 1),
839 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
840 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
841 RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
842 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
843 RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
844 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
845 RT5645_M_IN_R_SM_R_SFT, 1, 1),
846 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
847 RT5645_M_BST2_R_SM_R_SFT, 1, 1),
850 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
851 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
852 RT5645_M_BST1_OM_L_SFT, 1, 1),
853 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
854 RT5645_M_IN_L_OM_L_SFT, 1, 1),
855 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
856 RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
857 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
858 RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
861 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
862 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
863 RT5645_M_BST2_OM_R_SFT, 1, 1),
864 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
865 RT5645_M_IN_R_OM_R_SFT, 1, 1),
866 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
867 RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
868 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
869 RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
872 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
873 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
874 RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
875 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
876 RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
877 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
878 RT5645_M_SV_R_SPM_L_SFT, 1, 1),
879 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
880 RT5645_M_SV_L_SPM_L_SFT, 1, 1),
883 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
884 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
885 RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
886 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
887 RT5645_M_SV_R_SPM_R_SFT, 1, 1),
890 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
891 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
892 RT5645_M_DAC1_HM_SFT, 1, 1),
893 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
894 RT5645_M_HPVOL_HM_SFT, 1, 1),
897 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
898 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
899 RT5645_M_DAC1_HV_SFT, 1, 1),
900 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
901 RT5645_M_DAC2_HV_SFT, 1, 1),
902 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
903 RT5645_M_IN_HV_SFT, 1, 1),
904 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
905 RT5645_M_BST1_HV_SFT, 1, 1),
908 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
909 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
910 RT5645_M_DAC1_HV_SFT, 1, 1),
911 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
912 RT5645_M_DAC2_HV_SFT, 1, 1),
913 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
914 RT5645_M_IN_HV_SFT, 1, 1),
915 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
916 RT5645_M_BST2_HV_SFT, 1, 1),
919 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
920 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
921 RT5645_M_DAC_L1_LM_SFT, 1, 1),
922 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
923 RT5645_M_DAC_R1_LM_SFT, 1, 1),
924 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
925 RT5645_M_OV_L_LM_SFT, 1, 1),
926 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
927 RT5645_M_OV_R_LM_SFT, 1, 1),
930 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
931 static const char * const rt5645_dac1_src[] = {
932 "IF1 DAC", "IF2 DAC", "IF3 DAC"
935 static SOC_ENUM_SINGLE_DECL(
936 rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
937 RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
939 static const struct snd_kcontrol_new rt5645_dac1l_mux =
940 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
942 static SOC_ENUM_SINGLE_DECL(
943 rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
944 RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
946 static const struct snd_kcontrol_new rt5645_dac1r_mux =
947 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
949 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
950 static const char * const rt5645_dac12_src[] = {
951 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
954 static SOC_ENUM_SINGLE_DECL(
955 rt5645_dac2l_enum, RT5645_DAC_CTRL,
956 RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
958 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
959 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
961 static const char * const rt5645_dacr2_src[] = {
962 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
965 static SOC_ENUM_SINGLE_DECL(
966 rt5645_dac2r_enum, RT5645_DAC_CTRL,
967 RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
969 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
970 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
974 static const char * const rt5645_inl_src[] = {
978 static SOC_ENUM_SINGLE_DECL(
979 rt5645_inl_enum, RT5645_INL1_INR1_VOL,
980 RT5645_INL_SEL_SFT, rt5645_inl_src);
982 static const struct snd_kcontrol_new rt5645_inl_mux =
983 SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
985 static const char * const rt5645_inr_src[] = {
989 static SOC_ENUM_SINGLE_DECL(
990 rt5645_inr_enum, RT5645_INL1_INR1_VOL,
991 RT5645_INR_SEL_SFT, rt5645_inr_src);
993 static const struct snd_kcontrol_new rt5645_inr_mux =
994 SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
996 /* Stereo1 ADC source */
998 static const char * const rt5645_stereo_adc1_src[] = {
1002 static SOC_ENUM_SINGLE_DECL(
1003 rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1004 RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1006 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1007 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1010 static const char * const rt5645_stereo_adc2_src[] = {
1014 static SOC_ENUM_SINGLE_DECL(
1015 rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1016 RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1018 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1019 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1022 static const char * const rt5645_stereo_dmic_src[] = {
1026 static SOC_ENUM_SINGLE_DECL(
1027 rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1028 RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1030 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1031 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1033 /* Mono ADC source */
1035 static const char * const rt5645_mono_adc_l1_src[] = {
1036 "Mono DAC MIXL", "ADC"
1039 static SOC_ENUM_SINGLE_DECL(
1040 rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1041 RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1043 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1044 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1046 static const char * const rt5645_mono_adc_l2_src[] = {
1047 "Mono DAC MIXL", "DMIC"
1050 static SOC_ENUM_SINGLE_DECL(
1051 rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1052 RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1054 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1055 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1058 static const char * const rt5645_mono_dmic_src[] = {
1062 static SOC_ENUM_SINGLE_DECL(
1063 rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1064 RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1066 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1067 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1069 static SOC_ENUM_SINGLE_DECL(
1070 rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1071 RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1073 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1074 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1076 static const char * const rt5645_mono_adc_r1_src[] = {
1077 "Mono DAC MIXR", "ADC"
1080 static SOC_ENUM_SINGLE_DECL(
1081 rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1082 RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1084 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1085 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1087 static const char * const rt5645_mono_adc_r2_src[] = {
1088 "Mono DAC MIXR", "DMIC"
1091 static SOC_ENUM_SINGLE_DECL(
1092 rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1093 RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1095 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1096 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1099 static const char * const rt5645_if1_adc_in_src[] = {
1100 "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1101 "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1104 static SOC_ENUM_SINGLE_DECL(
1105 rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1106 RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1108 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1109 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1112 static const char * const rt5650_if1_adc_in_src[] = {
1113 "IF_ADC1/IF_ADC2/DAC_REF/Null",
1114 "IF_ADC1/IF_ADC2/Null/DAC_REF",
1115 "IF_ADC1/DAC_REF/IF_ADC2/Null",
1116 "IF_ADC1/DAC_REF/Null/IF_ADC2",
1117 "IF_ADC1/Null/DAC_REF/IF_ADC2",
1118 "IF_ADC1/Null/IF_ADC2/DAC_REF",
1120 "IF_ADC2/IF_ADC1/DAC_REF/Null",
1121 "IF_ADC2/IF_ADC1/Null/DAC_REF",
1122 "IF_ADC2/DAC_REF/IF_ADC1/Null",
1123 "IF_ADC2/DAC_REF/Null/IF_ADC1",
1124 "IF_ADC2/Null/DAC_REF/IF_ADC1",
1125 "IF_ADC2/Null/IF_ADC1/DAC_REF",
1127 "DAC_REF/IF_ADC1/IF_ADC2/Null",
1128 "DAC_REF/IF_ADC1/Null/IF_ADC2",
1129 "DAC_REF/IF_ADC2/IF_ADC1/Null",
1130 "DAC_REF/IF_ADC2/Null/IF_ADC1",
1131 "DAC_REF/Null/IF_ADC1/IF_ADC2",
1132 "DAC_REF/Null/IF_ADC2/IF_ADC1",
1134 "Null/IF_ADC1/IF_ADC2/DAC_REF",
1135 "Null/IF_ADC1/DAC_REF/IF_ADC2",
1136 "Null/IF_ADC2/IF_ADC1/DAC_REF",
1137 "Null/IF_ADC2/DAC_REF/IF_ADC1",
1138 "Null/DAC_REF/IF_ADC1/IF_ADC2",
1139 "Null/DAC_REF/IF_ADC2/IF_ADC1",
1142 static SOC_ENUM_SINGLE_DECL(
1143 rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1144 0, rt5650_if1_adc_in_src);
1146 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1147 SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1149 /* MX-78 [15:14][13:12][11:10] */
1150 static const char * const rt5645_tdm_adc_swap_select[] = {
1151 "L/R", "R/L", "L/L", "R/R"
1154 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1155 RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1157 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1158 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1160 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1161 RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1163 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1164 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1166 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1167 RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1169 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1170 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1172 /* MX-77 [7:6][5:4][3:2] */
1173 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1174 RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1176 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1177 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1179 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1180 RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1182 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1183 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1185 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1186 RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1188 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1189 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1191 /* MX-79 [14:12][10:8][6:4][2:0] */
1192 static const char * const rt5645_tdm_dac_swap_select[] = {
1193 "Slot0", "Slot1", "Slot2", "Slot3"
1196 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1197 RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1199 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1200 SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1202 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1203 RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1205 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1206 SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1208 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1209 RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1211 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1212 SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1214 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1215 RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1217 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1218 SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1220 /* MX-7a [14:12][10:8][6:4][2:0] */
1221 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1222 RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1224 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1225 SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1227 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1228 RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1230 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1231 SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1233 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1234 RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1236 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1237 SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1239 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1240 RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1242 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1243 SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1246 static const char * const rt5650_a_dac1_src[] = {
1247 "DAC1", "Stereo DAC Mixer"
1250 static SOC_ENUM_SINGLE_DECL(
1251 rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1252 RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1254 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1255 SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1257 static SOC_ENUM_SINGLE_DECL(
1258 rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1259 RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1261 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1262 SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1265 static const char * const rt5650_a_dac2_src[] = {
1266 "Stereo DAC Mixer", "Mono DAC Mixer"
1269 static SOC_ENUM_SINGLE_DECL(
1270 rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1271 RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1273 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1274 SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1276 static SOC_ENUM_SINGLE_DECL(
1277 rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1278 RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1280 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1281 SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1284 static const char * const rt5645_if2_adc_in_src[] = {
1285 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1288 static SOC_ENUM_SINGLE_DECL(
1289 rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1290 RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1292 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1293 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1296 static const char * const rt5645_if3_adc_in_src[] = {
1297 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1300 static SOC_ENUM_SINGLE_DECL(
1301 rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1302 RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1304 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1305 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1307 /* MX-31 [15] [13] [11] [9] */
1308 static const char * const rt5645_pdm_src[] = {
1309 "Mono DAC", "Stereo DAC"
1312 static SOC_ENUM_SINGLE_DECL(
1313 rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1314 RT5645_PDM1_L_SFT, rt5645_pdm_src);
1316 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1317 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1319 static SOC_ENUM_SINGLE_DECL(
1320 rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1321 RT5645_PDM1_R_SFT, rt5645_pdm_src);
1323 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1324 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1327 static const char * const rt5645_vad_adc_src[] = {
1328 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1331 static SOC_ENUM_SINGLE_DECL(
1332 rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1333 RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1335 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1336 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1338 static const struct snd_kcontrol_new spk_l_vol_control =
1339 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1340 RT5645_L_MUTE_SFT, 1, 1);
1342 static const struct snd_kcontrol_new spk_r_vol_control =
1343 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1344 RT5645_R_MUTE_SFT, 1, 1);
1346 static const struct snd_kcontrol_new hp_l_vol_control =
1347 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1348 RT5645_L_MUTE_SFT, 1, 1);
1350 static const struct snd_kcontrol_new hp_r_vol_control =
1351 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1352 RT5645_R_MUTE_SFT, 1, 1);
1354 static const struct snd_kcontrol_new pdm1_l_vol_control =
1355 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1356 RT5645_M_PDM1_L, 1, 1);
1358 static const struct snd_kcontrol_new pdm1_r_vol_control =
1359 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1360 RT5645_M_PDM1_R, 1, 1);
1362 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1364 static int hp_amp_power_count;
1365 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1368 if (hp_amp_power_count <= 0) {
1369 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1370 snd_soc_write(codec, RT5645_DEPOP_M2, 0x3100);
1371 snd_soc_write(codec, RT5645_CHARGE_PUMP,
1373 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1374 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1375 RT5645_HP_DCC_INT1, 0x9f01);
1377 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1378 RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1379 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1381 snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1382 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1383 RT5645_MAMP_INT_REG2, 0xfc00);
1384 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140);
1386 rt5645->hp_on = true;
1388 /* depop parameters */
1389 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1390 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1391 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1392 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1393 RT5645_HP_DCC_INT1, 0x9f01);
1395 /* headphone amp power on */
1396 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1397 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1398 snd_soc_update_bits(codec, RT5645_PWR_VOL,
1399 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1400 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1401 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1402 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1404 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1407 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1408 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1409 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1411 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1412 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1413 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1414 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1416 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1420 hp_amp_power_count++;
1422 hp_amp_power_count--;
1423 if (hp_amp_power_count <= 0) {
1424 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1425 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1427 snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1428 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1429 RT5645_MAMP_INT_REG2, 0xfc00);
1430 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140);
1432 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0001);
1435 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1437 RT5645_HP_L_SMT_MASK |
1438 RT5645_HP_R_SMT_MASK,
1440 RT5645_HP_L_SMT_DIS |
1441 RT5645_HP_R_SMT_DIS);
1442 /* headphone amp power down */
1443 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1444 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1445 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1447 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1448 RT5645_DEPOP_MASK, 0);
1454 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1455 struct snd_kcontrol *kcontrol, int event)
1457 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1458 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1461 case SND_SOC_DAPM_POST_PMU:
1462 hp_amp_power(codec, 1);
1463 /* headphone unmute sequence */
1464 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1465 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1466 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1468 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1469 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1470 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1471 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1472 RT5645_MAMP_INT_REG2, 0xfc00);
1473 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1474 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1475 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1476 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1477 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1478 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1479 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1480 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1482 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1483 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1484 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1485 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1489 case SND_SOC_DAPM_PRE_PMD:
1490 /* headphone mute sequence */
1491 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1492 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1493 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1495 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1496 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1497 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1498 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1499 RT5645_MAMP_INT_REG2, 0xfc00);
1500 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1501 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1502 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1503 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1504 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1505 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1506 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1507 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1510 hp_amp_power(codec, 0);
1520 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1521 struct snd_kcontrol *kcontrol, int event)
1523 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1526 case SND_SOC_DAPM_POST_PMU:
1527 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1528 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1530 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1531 RT5645_PWR_CLS_D_L);
1534 case SND_SOC_DAPM_PRE_PMD:
1535 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1536 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1537 RT5645_PWR_CLS_D_L, 0);
1547 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1548 struct snd_kcontrol *kcontrol, int event)
1550 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1553 case SND_SOC_DAPM_POST_PMU:
1554 hp_amp_power(codec, 1);
1555 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1556 RT5645_PWR_LM, RT5645_PWR_LM);
1557 snd_soc_update_bits(codec, RT5645_LOUT1,
1558 RT5645_L_MUTE | RT5645_R_MUTE, 0);
1561 case SND_SOC_DAPM_PRE_PMD:
1562 snd_soc_update_bits(codec, RT5645_LOUT1,
1563 RT5645_L_MUTE | RT5645_R_MUTE,
1564 RT5645_L_MUTE | RT5645_R_MUTE);
1565 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1567 hp_amp_power(codec, 0);
1577 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1578 struct snd_kcontrol *kcontrol, int event)
1580 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1583 case SND_SOC_DAPM_POST_PMU:
1584 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1585 RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1588 case SND_SOC_DAPM_PRE_PMD:
1589 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1590 RT5645_PWR_BST2_P, 0);
1600 static int rt5650_hp_event(struct snd_soc_dapm_widget *w,
1601 struct snd_kcontrol *k, int event)
1603 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1604 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1607 case SND_SOC_DAPM_POST_PMU:
1608 if (rt5645->hp_on) {
1610 rt5645->hp_on = false;
1621 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1622 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1623 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1624 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1625 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1627 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1628 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1629 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1630 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1633 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1635 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1637 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1639 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1641 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1643 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1645 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1647 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1649 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1651 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1653 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1658 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1659 RT5645_PWR_MB1_BIT, 0),
1660 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1661 RT5645_PWR_MB2_BIT, 0),
1663 SND_SOC_DAPM_INPUT("DMIC L1"),
1664 SND_SOC_DAPM_INPUT("DMIC R1"),
1665 SND_SOC_DAPM_INPUT("DMIC L2"),
1666 SND_SOC_DAPM_INPUT("DMIC R2"),
1668 SND_SOC_DAPM_INPUT("IN1P"),
1669 SND_SOC_DAPM_INPUT("IN1N"),
1670 SND_SOC_DAPM_INPUT("IN2P"),
1671 SND_SOC_DAPM_INPUT("IN2N"),
1673 SND_SOC_DAPM_INPUT("Haptic Generator"),
1675 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1676 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1677 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1678 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1679 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1680 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1681 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1682 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1684 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1685 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1686 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1687 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1688 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1690 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1691 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1692 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1693 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1695 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1696 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1697 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1698 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1700 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1701 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1703 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1704 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1705 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1706 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1709 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1710 &rt5645_sto1_dmic_mux),
1711 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1712 &rt5645_sto_adc2_mux),
1713 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1714 &rt5645_sto_adc2_mux),
1715 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1716 &rt5645_sto_adc1_mux),
1717 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1718 &rt5645_sto_adc1_mux),
1719 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1720 &rt5645_mono_dmic_l_mux),
1721 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1722 &rt5645_mono_dmic_r_mux),
1723 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1724 &rt5645_mono_adc_l2_mux),
1725 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1726 &rt5645_mono_adc_l1_mux),
1727 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1728 &rt5645_mono_adc_r1_mux),
1729 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1730 &rt5645_mono_adc_r2_mux),
1733 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1734 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1735 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1736 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1738 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1739 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1741 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1742 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1743 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1744 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1746 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1747 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1748 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1749 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1753 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1754 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1755 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1756 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1757 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1758 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1759 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1760 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1761 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1762 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1765 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1766 0, 0, &rt5645_if2_adc_in_mux),
1768 /* Digital Interface */
1769 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1770 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1771 SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
1772 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1773 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1774 SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1775 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1776 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1777 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1778 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1779 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1780 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1781 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1782 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1783 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1785 /* Digital Interface Select */
1786 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1787 0, 0, &rt5645_vad_adc_mux),
1789 /* Audio Interface */
1790 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1791 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1792 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1793 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1796 /* DAC mixer before sound effect */
1797 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1798 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1799 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1800 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1802 /* DAC2 channel Mux */
1803 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1804 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1805 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1806 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1807 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1808 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1810 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1811 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1814 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1815 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1816 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1817 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1818 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1819 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1820 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1821 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1822 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1823 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1824 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1825 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1826 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1827 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1828 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1829 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1830 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1831 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1834 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1836 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1838 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1840 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1843 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1844 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1845 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1846 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1847 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1848 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1849 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1850 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1852 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1853 &spk_l_vol_control),
1854 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1855 &spk_r_vol_control),
1856 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1857 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1858 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1859 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1860 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1861 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1862 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1863 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1864 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1865 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1866 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1867 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1868 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1870 /* HPO/LOUT/Mono Mixer */
1871 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1872 ARRAY_SIZE(rt5645_spo_l_mix)),
1873 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1874 ARRAY_SIZE(rt5645_spo_r_mix)),
1875 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1876 ARRAY_SIZE(rt5645_hpo_mix)),
1877 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1878 ARRAY_SIZE(rt5645_lout_mix)),
1880 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1881 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1882 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1883 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1884 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1885 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1888 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1890 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1891 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1893 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1894 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1897 SND_SOC_DAPM_OUTPUT("HPOL"),
1898 SND_SOC_DAPM_OUTPUT("HPOR"),
1899 SND_SOC_DAPM_OUTPUT("LOUTL"),
1900 SND_SOC_DAPM_OUTPUT("LOUTR"),
1901 SND_SOC_DAPM_OUTPUT("PDM1L"),
1902 SND_SOC_DAPM_OUTPUT("PDM1R"),
1903 SND_SOC_DAPM_OUTPUT("SPOL"),
1904 SND_SOC_DAPM_OUTPUT("SPOR"),
1905 SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event),
1908 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
1909 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
1910 &rt5645_if1_dac0_tdm_sel_mux),
1911 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
1912 &rt5645_if1_dac1_tdm_sel_mux),
1913 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
1914 &rt5645_if1_dac2_tdm_sel_mux),
1915 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
1916 &rt5645_if1_dac3_tdm_sel_mux),
1917 SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
1918 0, 0, &rt5645_if1_adc_in_mux),
1919 SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
1920 0, 0, &rt5645_if1_adc1_in_mux),
1921 SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
1922 0, 0, &rt5645_if1_adc2_in_mux),
1923 SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
1924 0, 0, &rt5645_if1_adc3_in_mux),
1927 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
1928 SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
1929 0, 0, &rt5650_a_dac1_l_mux),
1930 SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
1931 0, 0, &rt5650_a_dac1_r_mux),
1932 SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
1933 0, 0, &rt5650_a_dac2_l_mux),
1934 SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
1935 0, 0, &rt5650_a_dac2_r_mux),
1937 SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
1938 0, 0, &rt5650_if1_adc1_in_mux),
1939 SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
1940 0, 0, &rt5650_if1_adc2_in_mux),
1941 SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
1942 0, 0, &rt5650_if1_adc3_in_mux),
1943 SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
1944 0, 0, &rt5650_if1_adc_in_mux),
1946 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
1947 &rt5650_if1_dac0_tdm_sel_mux),
1948 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
1949 &rt5650_if1_dac1_tdm_sel_mux),
1950 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
1951 &rt5650_if1_dac2_tdm_sel_mux),
1952 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
1953 &rt5650_if1_dac3_tdm_sel_mux),
1956 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1957 { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1958 { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1959 { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1960 { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1961 { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1962 { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
1964 { "I2S1", NULL, "I2S1 ASRC" },
1965 { "I2S2", NULL, "I2S2 ASRC" },
1967 { "IN1P", NULL, "LDO2" },
1968 { "IN2P", NULL, "LDO2" },
1970 { "DMIC1", NULL, "DMIC L1" },
1971 { "DMIC1", NULL, "DMIC R1" },
1972 { "DMIC2", NULL, "DMIC L2" },
1973 { "DMIC2", NULL, "DMIC R2" },
1975 { "BST1", NULL, "IN1P" },
1976 { "BST1", NULL, "IN1N" },
1977 { "BST1", NULL, "JD Power" },
1978 { "BST1", NULL, "Mic Det Power" },
1979 { "BST2", NULL, "IN2P" },
1980 { "BST2", NULL, "IN2N" },
1982 { "INL VOL", NULL, "IN2P" },
1983 { "INR VOL", NULL, "IN2N" },
1985 { "RECMIXL", "HPOL Switch", "HPOL" },
1986 { "RECMIXL", "INL Switch", "INL VOL" },
1987 { "RECMIXL", "BST2 Switch", "BST2" },
1988 { "RECMIXL", "BST1 Switch", "BST1" },
1989 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1991 { "RECMIXR", "HPOR Switch", "HPOR" },
1992 { "RECMIXR", "INR Switch", "INR VOL" },
1993 { "RECMIXR", "BST2 Switch", "BST2" },
1994 { "RECMIXR", "BST1 Switch", "BST1" },
1995 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1997 { "ADC L", NULL, "RECMIXL" },
1998 { "ADC L", NULL, "ADC L power" },
1999 { "ADC R", NULL, "RECMIXR" },
2000 { "ADC R", NULL, "ADC R power" },
2002 {"DMIC L1", NULL, "DMIC CLK"},
2003 {"DMIC L1", NULL, "DMIC1 Power"},
2004 {"DMIC R1", NULL, "DMIC CLK"},
2005 {"DMIC R1", NULL, "DMIC1 Power"},
2006 {"DMIC L2", NULL, "DMIC CLK"},
2007 {"DMIC L2", NULL, "DMIC2 Power"},
2008 {"DMIC R2", NULL, "DMIC CLK"},
2009 {"DMIC R2", NULL, "DMIC2 Power"},
2011 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2012 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2013 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2015 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2016 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2017 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2019 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2020 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2021 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2023 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2024 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2025 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2026 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2028 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2029 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2030 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2031 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2033 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2034 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2035 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2036 { "Mono ADC L1 Mux", "ADC", "ADC L" },
2038 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2039 { "Mono ADC R1 Mux", "ADC", "ADC R" },
2040 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2041 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2043 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2044 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2045 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2046 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2048 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2049 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2050 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2052 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2053 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2054 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2056 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2057 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2058 { "Mono ADC MIXL", NULL, "adc mono left filter" },
2059 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2061 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2062 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2063 { "Mono ADC MIXR", NULL, "adc mono right filter" },
2064 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2066 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2067 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2068 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2070 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2071 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2072 { "IF_ADC2", NULL, "Mono ADC MIXL" },
2073 { "IF_ADC2", NULL, "Mono ADC MIXR" },
2074 { "VAD_ADC", NULL, "VAD ADC Mux" },
2076 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2077 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2078 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2080 { "IF1 ADC", NULL, "I2S1" },
2081 { "IF2 ADC", NULL, "I2S2" },
2082 { "IF2 ADC", NULL, "IF2 ADC Mux" },
2084 { "AIF2TX", NULL, "IF2 ADC" },
2086 { "IF1 DAC0", NULL, "AIF1RX" },
2087 { "IF1 DAC1", NULL, "AIF1RX" },
2088 { "IF1 DAC2", NULL, "AIF1RX" },
2089 { "IF1 DAC3", NULL, "AIF1RX" },
2090 { "IF2 DAC", NULL, "AIF2RX" },
2092 { "IF1 DAC0", NULL, "I2S1" },
2093 { "IF1 DAC1", NULL, "I2S1" },
2094 { "IF1 DAC2", NULL, "I2S1" },
2095 { "IF1 DAC3", NULL, "I2S1" },
2096 { "IF2 DAC", NULL, "I2S2" },
2098 { "IF2 DAC L", NULL, "IF2 DAC" },
2099 { "IF2 DAC R", NULL, "IF2 DAC" },
2101 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2102 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2104 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2105 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2106 { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2107 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2108 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2109 { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2111 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2112 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2113 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2114 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2115 { "DAC L2 Volume", NULL, "dac mono left filter" },
2117 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2118 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2119 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2120 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2121 { "DAC R2 Volume", NULL, "dac mono right filter" },
2123 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2124 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2125 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2126 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2127 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2128 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2129 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2130 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2132 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2133 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2134 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2135 { "Mono DAC MIXL", NULL, "dac mono left filter" },
2136 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2137 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2138 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2139 { "Mono DAC MIXR", NULL, "dac mono right filter" },
2141 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2142 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2143 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2144 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2145 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2146 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2148 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2149 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2150 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2151 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2153 { "SPK MIXL", "BST1 Switch", "BST1" },
2154 { "SPK MIXL", "INL Switch", "INL VOL" },
2155 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2156 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2157 { "SPK MIXR", "BST2 Switch", "BST2" },
2158 { "SPK MIXR", "INR Switch", "INR VOL" },
2159 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2160 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2162 { "OUT MIXL", "BST1 Switch", "BST1" },
2163 { "OUT MIXL", "INL Switch", "INL VOL" },
2164 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2165 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2167 { "OUT MIXR", "BST2 Switch", "BST2" },
2168 { "OUT MIXR", "INR Switch", "INR VOL" },
2169 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2170 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2172 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2173 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2174 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2175 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2176 { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2177 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2178 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2179 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2180 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2181 { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2183 { "DAC 2", NULL, "DAC L2" },
2184 { "DAC 2", NULL, "DAC R2" },
2185 { "DAC 1", NULL, "DAC L1" },
2186 { "DAC 1", NULL, "DAC R1" },
2187 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2188 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2189 { "HPOVOL", NULL, "HPOVOL L" },
2190 { "HPOVOL", NULL, "HPOVOL R" },
2191 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2192 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2194 { "SPKVOL L", "Switch", "SPK MIXL" },
2195 { "SPKVOL R", "Switch", "SPK MIXR" },
2197 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2198 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2199 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2200 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2201 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2202 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2204 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2205 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2206 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2207 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2209 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2210 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2211 { "PDM1 L Mux", NULL, "PDM1 Power" },
2212 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2213 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2214 { "PDM1 R Mux", NULL, "PDM1 Power" },
2216 { "HP amp", NULL, "HPO MIX" },
2217 { "HP amp", NULL, "JD Power" },
2218 { "HP amp", NULL, "Mic Det Power" },
2219 { "HP amp", NULL, "LDO2" },
2220 { "HPOL", NULL, "HP amp" },
2221 { "HPOR", NULL, "HP amp" },
2223 { "LOUT amp", NULL, "LOUT MIX" },
2224 { "LOUTL", NULL, "LOUT amp" },
2225 { "LOUTR", NULL, "LOUT amp" },
2227 { "PDM1 L", "Switch", "PDM1 L Mux" },
2228 { "PDM1 R", "Switch", "PDM1 R Mux" },
2230 { "PDM1L", NULL, "PDM1 L" },
2231 { "PDM1R", NULL, "PDM1 R" },
2233 { "SPK amp", NULL, "SPOL MIX" },
2234 { "SPK amp", NULL, "SPOR MIX" },
2235 { "SPOL", NULL, "SPK amp" },
2236 { "SPOR", NULL, "SPK amp" },
2239 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2240 { "A DAC1 L Mux", "DAC1", "DAC1 MIXL"},
2241 { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2242 { "A DAC1 R Mux", "DAC1", "DAC1 MIXR"},
2243 { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2245 { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2246 { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2247 { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2248 { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2250 { "DAC L1", NULL, "A DAC1 L Mux" },
2251 { "DAC R1", NULL, "A DAC1 R Mux" },
2252 { "DAC L2", NULL, "A DAC2 L Mux" },
2253 { "DAC R2", NULL, "A DAC2 R Mux" },
2255 { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2256 { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2257 { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2258 { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2260 { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2261 { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2262 { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2263 { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2265 { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2266 { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2267 { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2268 { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2270 { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2271 { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2272 { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2274 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2275 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2276 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2277 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2278 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2279 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2281 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2282 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2283 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2284 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2285 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2286 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2288 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2289 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2290 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2291 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2292 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2293 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2295 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2296 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2297 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2298 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2299 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2300 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2301 { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2303 { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2304 { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2305 { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2306 { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2308 { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2309 { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2310 { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2311 { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2313 { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2314 { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2315 { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2316 { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2318 { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2319 { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2320 { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2321 { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2323 { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2324 { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2326 { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2327 { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2330 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2331 { "DAC L1", NULL, "Stereo DAC MIXL" },
2332 { "DAC R1", NULL, "Stereo DAC MIXR" },
2333 { "DAC L2", NULL, "Mono DAC MIXL" },
2334 { "DAC R2", NULL, "Mono DAC MIXR" },
2336 { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2337 { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2338 { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2339 { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2341 { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2342 { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2343 { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2344 { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2346 { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2347 { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2348 { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2349 { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2351 { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2352 { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2353 { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2355 { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2356 { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2357 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2358 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2359 { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2361 { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2362 { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2363 { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2364 { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2366 { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2367 { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2368 { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2369 { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2371 { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2372 { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2373 { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2374 { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2376 { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2377 { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2378 { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2379 { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2381 { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2382 { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2384 { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2385 { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2388 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2389 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2391 struct snd_soc_codec *codec = dai->codec;
2392 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2393 unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2394 int pre_div, bclk_ms, frame_size;
2396 rt5645->lrck[dai->id] = params_rate(params);
2397 pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2399 dev_err(codec->dev, "Unsupported clock setting\n");
2402 frame_size = snd_soc_params_to_frame_size(params);
2403 if (frame_size < 0) {
2404 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2408 switch (rt5645->codec_type) {
2409 case CODEC_TYPE_RT5650:
2417 bclk_ms = frame_size > 32;
2418 rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2420 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2421 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2422 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2423 bclk_ms, pre_div, dai->id);
2425 switch (params_width(params)) {
2443 mask_clk = RT5645_I2S_PD1_MASK;
2444 val_clk = pre_div << RT5645_I2S_PD1_SFT;
2445 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2446 (0x3 << dl_sft), (val_len << dl_sft));
2447 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2450 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2451 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2452 pre_div << RT5645_I2S_PD2_SFT;
2453 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2454 (0x3 << dl_sft), (val_len << dl_sft));
2455 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2458 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2465 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2467 struct snd_soc_codec *codec = dai->codec;
2468 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2469 unsigned int reg_val = 0, pol_sft;
2471 switch (rt5645->codec_type) {
2472 case CODEC_TYPE_RT5650:
2480 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2481 case SND_SOC_DAIFMT_CBM_CFM:
2482 rt5645->master[dai->id] = 1;
2484 case SND_SOC_DAIFMT_CBS_CFS:
2485 reg_val |= RT5645_I2S_MS_S;
2486 rt5645->master[dai->id] = 0;
2492 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2493 case SND_SOC_DAIFMT_NB_NF:
2495 case SND_SOC_DAIFMT_IB_NF:
2496 reg_val |= (1 << pol_sft);
2502 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2503 case SND_SOC_DAIFMT_I2S:
2505 case SND_SOC_DAIFMT_LEFT_J:
2506 reg_val |= RT5645_I2S_DF_LEFT;
2508 case SND_SOC_DAIFMT_DSP_A:
2509 reg_val |= RT5645_I2S_DF_PCM_A;
2511 case SND_SOC_DAIFMT_DSP_B:
2512 reg_val |= RT5645_I2S_DF_PCM_B;
2519 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2520 RT5645_I2S_MS_MASK | (1 << pol_sft) |
2521 RT5645_I2S_DF_MASK, reg_val);
2524 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2525 RT5645_I2S_MS_MASK | (1 << pol_sft) |
2526 RT5645_I2S_DF_MASK, reg_val);
2529 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2535 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2536 int clk_id, unsigned int freq, int dir)
2538 struct snd_soc_codec *codec = dai->codec;
2539 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2540 unsigned int reg_val = 0;
2542 if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2546 case RT5645_SCLK_S_MCLK:
2547 reg_val |= RT5645_SCLK_SRC_MCLK;
2549 case RT5645_SCLK_S_PLL1:
2550 reg_val |= RT5645_SCLK_SRC_PLL1;
2552 case RT5645_SCLK_S_RCCLK:
2553 reg_val |= RT5645_SCLK_SRC_RCCLK;
2556 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2559 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2560 RT5645_SCLK_SRC_MASK, reg_val);
2561 rt5645->sysclk = freq;
2562 rt5645->sysclk_src = clk_id;
2564 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2569 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2570 unsigned int freq_in, unsigned int freq_out)
2572 struct snd_soc_codec *codec = dai->codec;
2573 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2574 struct rl6231_pll_code pll_code;
2577 if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2578 freq_out == rt5645->pll_out)
2581 if (!freq_in || !freq_out) {
2582 dev_dbg(codec->dev, "PLL disabled\n");
2585 rt5645->pll_out = 0;
2586 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2587 RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2592 case RT5645_PLL1_S_MCLK:
2593 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2594 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2596 case RT5645_PLL1_S_BCLK1:
2597 case RT5645_PLL1_S_BCLK2:
2600 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2601 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2604 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2605 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2608 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2613 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2617 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2619 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2623 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2624 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2625 pll_code.n_code, pll_code.k_code);
2627 snd_soc_write(codec, RT5645_PLL_CTRL1,
2628 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2629 snd_soc_write(codec, RT5645_PLL_CTRL2,
2630 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2631 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2633 rt5645->pll_in = freq_in;
2634 rt5645->pll_out = freq_out;
2635 rt5645->pll_src = source;
2640 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2641 unsigned int rx_mask, int slots, int slot_width)
2643 struct snd_soc_codec *codec = dai->codec;
2644 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2645 unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2646 unsigned int mask, val = 0;
2648 switch (rt5645->codec_type) {
2649 case CODEC_TYPE_RT5650:
2659 i_slot_sft = o_slot_sft = 12;
2660 i_width_sht = o_width_sht = 10;
2664 if (rx_mask || tx_mask) {
2665 val |= (1 << en_sft);
2666 if (rt5645->codec_type == CODEC_TYPE_RT5645)
2667 snd_soc_update_bits(codec, RT5645_BASS_BACK,
2668 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
2673 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
2676 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
2679 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
2686 switch (slot_width) {
2688 val |= (1 << i_width_sht) | (1 << o_width_sht);
2691 val |= (2 << i_width_sht) | (2 << o_width_sht);
2694 val |= (3 << i_width_sht) | (3 << o_width_sht);
2701 snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val);
2706 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2707 enum snd_soc_bias_level level)
2709 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2712 case SND_SOC_BIAS_PREPARE:
2713 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
2714 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2715 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2716 RT5645_PWR_BG | RT5645_PWR_VREF2,
2717 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2718 RT5645_PWR_BG | RT5645_PWR_VREF2);
2720 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2721 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2722 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2723 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2724 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2728 case SND_SOC_BIAS_STANDBY:
2729 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2730 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2731 RT5645_PWR_BG | RT5645_PWR_VREF2,
2732 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2733 RT5645_PWR_BG | RT5645_PWR_VREF2);
2734 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2735 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2736 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2739 case SND_SOC_BIAS_OFF:
2740 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2741 if (!rt5645->en_button_func)
2742 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2743 RT5645_DIG_GATE_CTRL, 0);
2744 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2745 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2746 RT5645_PWR_BG | RT5645_PWR_VREF2 |
2747 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
2757 static void rt5645_enable_push_button_irq(struct snd_soc_codec *codec,
2760 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
2763 snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
2764 snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
2765 snd_soc_dapm_sync(dapm);
2767 snd_soc_update_bits(codec,
2768 RT5645_INT_IRQ_ST, 0x8, 0x8);
2769 snd_soc_update_bits(codec,
2770 RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
2771 snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
2772 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
2773 snd_soc_read(codec, RT5650_4BTN_IL_CMD1));
2775 snd_soc_update_bits(codec, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
2776 snd_soc_update_bits(codec, RT5645_INT_IRQ_ST, 0x8, 0x0);
2778 snd_soc_dapm_disable_pin(dapm, "ADC L power");
2779 snd_soc_dapm_disable_pin(dapm, "ADC R power");
2780 snd_soc_dapm_sync(dapm);
2784 static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert)
2786 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
2787 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2791 regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0006);
2793 /* for jack type detect */
2794 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
2795 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
2796 snd_soc_dapm_sync(dapm);
2797 if (!dapm->card->instantiated) {
2798 /* Power up necessary bits for JD if dapm is
2800 regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
2801 RT5645_PWR_MB | RT5645_PWR_VREF2,
2802 RT5645_PWR_MB | RT5645_PWR_VREF2);
2803 regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
2804 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
2805 regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
2806 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
2809 regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
2810 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
2811 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2812 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
2813 RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
2815 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
2816 RT5645_CBJ_MN_JD, 0);
2819 regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
2821 dev_dbg(codec->dev, "val = %d\n", val);
2823 if (val == 1 || val == 2) {
2824 rt5645->jack_type = SND_JACK_HEADSET;
2825 if (rt5645->en_button_func) {
2826 rt5645_enable_push_button_irq(codec, true);
2829 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
2830 snd_soc_dapm_sync(dapm);
2831 rt5645->jack_type = SND_JACK_HEADPHONE;
2834 snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2835 snd_soc_write(codec, RT5645_DEPOP_M1, 0x001d);
2836 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0001);
2837 } else { /* jack out */
2838 rt5645->jack_type = 0;
2840 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
2841 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2842 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
2843 RT5645_CBJ_BST1_EN, 0);
2845 if (rt5645->en_button_func)
2846 rt5645_enable_push_button_irq(codec, false);
2848 if (rt5645->pdata.jd_mode == 0)
2849 snd_soc_dapm_disable_pin(dapm, "LDO2");
2850 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
2851 snd_soc_dapm_sync(dapm);
2854 return rt5645->jack_type;
2857 static int rt5645_button_detect(struct snd_soc_codec *codec)
2861 val = snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
2862 pr_debug("val=0x%x\n", val);
2863 btn_type = val & 0xfff0;
2864 snd_soc_write(codec, RT5650_4BTN_IL_CMD1, val);
2869 static irqreturn_t rt5645_irq(int irq, void *data);
2871 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2872 struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
2873 struct snd_soc_jack *btn_jack)
2875 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2877 rt5645->hp_jack = hp_jack;
2878 rt5645->mic_jack = mic_jack;
2879 rt5645->btn_jack = btn_jack;
2880 if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
2881 rt5645->en_button_func = true;
2882 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2883 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
2884 regmap_update_bits(rt5645->regmap, RT5645_DEPOP_M1,
2885 RT5645_HP_CB_MASK, RT5645_HP_CB_PU);
2886 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
2887 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2889 rt5645_irq(0, rt5645);
2893 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2895 static void rt5645_jack_detect_work(struct work_struct *work)
2897 struct rt5645_priv *rt5645 =
2898 container_of(work, struct rt5645_priv, jack_detect_work.work);
2899 int val, btn_type, gpio_state = 0, report = 0;
2904 switch (rt5645->pdata.jd_mode) {
2905 case 0: /* Not using rt5645 JD */
2906 if (rt5645->gpiod_hp_det) {
2907 gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
2908 dev_dbg(rt5645->codec->dev, "gpio_state = %d\n",
2910 report = rt5645_jack_detect(rt5645->codec, gpio_state);
2912 snd_soc_jack_report(rt5645->hp_jack,
2913 report, SND_JACK_HEADPHONE);
2914 snd_soc_jack_report(rt5645->mic_jack,
2915 report, SND_JACK_MICROPHONE);
2917 case 1: /* 2 port */
2918 val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0070;
2920 default: /* 1 port */
2921 val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0020;
2928 case 0x30: /* 2 port */
2929 case 0x0: /* 1 port or 2 port */
2930 if (rt5645->jack_type == 0) {
2931 report = rt5645_jack_detect(rt5645->codec, 1);
2932 /* for push button and jack out */
2936 if (snd_soc_read(rt5645->codec, RT5645_INT_IRQ_ST) & 0x4) {
2937 /* button pressed */
2938 report = SND_JACK_HEADSET;
2939 btn_type = rt5645_button_detect(rt5645->codec);
2940 /* rt5650 can report three kinds of button behavior,
2941 one click, double click and hold. However,
2942 currently we will report button pressed/released
2943 event. So all the three button behaviors are
2944 treated as button pressed. */
2949 report |= SND_JACK_BTN_0;
2954 report |= SND_JACK_BTN_1;
2959 report |= SND_JACK_BTN_2;
2964 report |= SND_JACK_BTN_3;
2966 case 0x0000: /* unpressed */
2969 dev_err(rt5645->codec->dev,
2970 "Unexpected button code 0x%04x\n",
2975 if (btn_type == 0)/* button release */
2976 report = rt5645->jack_type;
2980 case 0x70: /* 2 port */
2981 case 0x10: /* 2 port */
2982 case 0x20: /* 1 port */
2984 snd_soc_update_bits(rt5645->codec,
2985 RT5645_INT_IRQ_ST, 0x1, 0x0);
2986 rt5645_jack_detect(rt5645->codec, 0);
2992 snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
2993 snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
2994 if (rt5645->en_button_func)
2995 snd_soc_jack_report(rt5645->btn_jack,
2996 report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
2997 SND_JACK_BTN_2 | SND_JACK_BTN_3);
3000 static irqreturn_t rt5645_irq(int irq, void *data)
3002 struct rt5645_priv *rt5645 = data;
3004 queue_delayed_work(system_power_efficient_wq,
3005 &rt5645->jack_detect_work, msecs_to_jiffies(250));
3010 static int rt5645_probe(struct snd_soc_codec *codec)
3012 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3013 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3015 rt5645->codec = codec;
3017 switch (rt5645->codec_type) {
3018 case CODEC_TYPE_RT5645:
3019 snd_soc_dapm_new_controls(dapm,
3020 rt5645_specific_dapm_widgets,
3021 ARRAY_SIZE(rt5645_specific_dapm_widgets));
3022 snd_soc_dapm_add_routes(dapm,
3023 rt5645_specific_dapm_routes,
3024 ARRAY_SIZE(rt5645_specific_dapm_routes));
3026 case CODEC_TYPE_RT5650:
3027 snd_soc_dapm_new_controls(dapm,
3028 rt5650_specific_dapm_widgets,
3029 ARRAY_SIZE(rt5650_specific_dapm_widgets));
3030 snd_soc_dapm_add_routes(dapm,
3031 rt5650_specific_dapm_routes,
3032 ARRAY_SIZE(rt5650_specific_dapm_routes));
3036 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
3038 /* for JD function */
3039 if (rt5645->pdata.jd_mode) {
3040 snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3041 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3042 snd_soc_dapm_sync(dapm);
3048 static int rt5645_remove(struct snd_soc_codec *codec)
3050 rt5645_reset(codec);
3055 static int rt5645_suspend(struct snd_soc_codec *codec)
3057 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3059 regcache_cache_only(rt5645->regmap, true);
3060 regcache_mark_dirty(rt5645->regmap);
3065 static int rt5645_resume(struct snd_soc_codec *codec)
3067 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3069 regcache_cache_only(rt5645->regmap, false);
3070 regcache_sync(rt5645->regmap);
3075 #define rt5645_suspend NULL
3076 #define rt5645_resume NULL
3079 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3080 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3081 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3083 static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3084 .hw_params = rt5645_hw_params,
3085 .set_fmt = rt5645_set_dai_fmt,
3086 .set_sysclk = rt5645_set_dai_sysclk,
3087 .set_tdm_slot = rt5645_set_tdm_slot,
3088 .set_pll = rt5645_set_dai_pll,
3091 static struct snd_soc_dai_driver rt5645_dai[] = {
3093 .name = "rt5645-aif1",
3096 .stream_name = "AIF1 Playback",
3099 .rates = RT5645_STEREO_RATES,
3100 .formats = RT5645_FORMATS,
3103 .stream_name = "AIF1 Capture",
3106 .rates = RT5645_STEREO_RATES,
3107 .formats = RT5645_FORMATS,
3109 .ops = &rt5645_aif_dai_ops,
3112 .name = "rt5645-aif2",
3115 .stream_name = "AIF2 Playback",
3118 .rates = RT5645_STEREO_RATES,
3119 .formats = RT5645_FORMATS,
3122 .stream_name = "AIF2 Capture",
3125 .rates = RT5645_STEREO_RATES,
3126 .formats = RT5645_FORMATS,
3128 .ops = &rt5645_aif_dai_ops,
3132 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
3133 .probe = rt5645_probe,
3134 .remove = rt5645_remove,
3135 .suspend = rt5645_suspend,
3136 .resume = rt5645_resume,
3137 .set_bias_level = rt5645_set_bias_level,
3138 .idle_bias_off = true,
3139 .controls = rt5645_snd_controls,
3140 .num_controls = ARRAY_SIZE(rt5645_snd_controls),
3141 .dapm_widgets = rt5645_dapm_widgets,
3142 .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
3143 .dapm_routes = rt5645_dapm_routes,
3144 .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
3147 static const struct regmap_config rt5645_regmap = {
3150 .use_single_rw = true,
3151 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3153 .volatile_reg = rt5645_volatile_register,
3154 .readable_reg = rt5645_readable_register,
3156 .cache_type = REGCACHE_RBTREE,
3157 .reg_defaults = rt5645_reg,
3158 .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3159 .ranges = rt5645_ranges,
3160 .num_ranges = ARRAY_SIZE(rt5645_ranges),
3163 static const struct i2c_device_id rt5645_i2c_id[] = {
3168 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3171 static struct acpi_device_id rt5645_acpi_match[] = {
3176 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3179 static struct rt5645_platform_data *rt5645_pdata;
3181 static struct rt5645_platform_data strago_platform_data = {
3182 .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3183 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3187 static int strago_quirk_cb(const struct dmi_system_id *id)
3189 rt5645_pdata = &strago_platform_data;
3194 static const struct dmi_system_id dmi_platform_intel_braswell[] = {
3196 .ident = "Intel Strago",
3197 .callback = strago_quirk_cb,
3199 DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3203 .ident = "Google Celes",
3204 .callback = strago_quirk_cb,
3206 DMI_MATCH(DMI_PRODUCT_NAME, "Celes"),
3212 static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3214 rt5645->pdata.in2_diff = device_property_read_bool(dev,
3215 "realtek,in2-differential");
3216 device_property_read_u32(dev,
3217 "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3218 device_property_read_u32(dev,
3219 "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3220 device_property_read_u32(dev,
3221 "realtek,jd-mode", &rt5645->pdata.jd_mode);
3226 static int rt5645_i2c_probe(struct i2c_client *i2c,
3227 const struct i2c_device_id *id)
3229 struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
3230 struct rt5645_priv *rt5645;
3234 rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3240 i2c_set_clientdata(i2c, rt5645);
3243 rt5645->pdata = *pdata;
3244 else if (dmi_check_system(dmi_platform_intel_braswell))
3245 rt5645->pdata = *rt5645_pdata;
3247 rt5645_parse_dt(rt5645, &i2c->dev);
3249 rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3252 if (IS_ERR(rt5645->gpiod_hp_det)) {
3253 dev_err(&i2c->dev, "failed to initialize gpiod\n");
3254 return PTR_ERR(rt5645->gpiod_hp_det);
3257 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3258 if (IS_ERR(rt5645->regmap)) {
3259 ret = PTR_ERR(rt5645->regmap);
3260 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3265 for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3266 rt5645->supplies[i].supply = rt5645_supply_names[i];
3268 ret = devm_regulator_bulk_get(&i2c->dev,
3269 ARRAY_SIZE(rt5645->supplies),
3272 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3276 ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3279 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3283 regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
3286 case RT5645_DEVICE_ID:
3287 rt5645->codec_type = CODEC_TYPE_RT5645;
3289 case RT5650_DEVICE_ID:
3290 rt5645->codec_type = CODEC_TYPE_RT5650;
3294 "Device with ID register %#x is not rt5645 or rt5650\n",
3300 regmap_write(rt5645->regmap, RT5645_RESET, 0);
3302 ret = regmap_register_patch(rt5645->regmap, init_list,
3303 ARRAY_SIZE(init_list));
3305 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3307 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3308 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3309 ARRAY_SIZE(rt5650_init_list));
3311 dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
3315 if (rt5645->pdata.in2_diff)
3316 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
3317 RT5645_IN_DF2, RT5645_IN_DF2);
3319 if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
3320 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3321 RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
3323 switch (rt5645->pdata.dmic1_data_pin) {
3324 case RT5645_DMIC_DATA_IN2N:
3325 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3326 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
3329 case RT5645_DMIC_DATA_GPIO5:
3330 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3331 RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
3332 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3333 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3334 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3335 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
3338 case RT5645_DMIC_DATA_GPIO11:
3339 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3340 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
3341 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3342 RT5645_GP11_PIN_MASK,
3343 RT5645_GP11_PIN_DMIC1_SDA);
3350 switch (rt5645->pdata.dmic2_data_pin) {
3351 case RT5645_DMIC_DATA_IN2P:
3352 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3353 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3356 case RT5645_DMIC_DATA_GPIO6:
3357 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3358 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3359 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3360 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3363 case RT5645_DMIC_DATA_GPIO10:
3364 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3365 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3366 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3367 RT5645_GP10_PIN_MASK,
3368 RT5645_GP10_PIN_DMIC2_SDA);
3371 case RT5645_DMIC_DATA_GPIO12:
3372 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3373 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
3374 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3375 RT5645_GP12_PIN_MASK,
3376 RT5645_GP12_PIN_DMIC2_SDA);
3383 if (rt5645->pdata.jd_mode) {
3384 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3385 RT5645_IRQ_CLK_GATE_CTRL,
3386 RT5645_IRQ_CLK_GATE_CTRL);
3387 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3388 RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
3389 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3390 RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
3391 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3392 RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
3393 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
3394 RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
3395 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3396 RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
3397 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3398 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3399 switch (rt5645->pdata.jd_mode) {
3401 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3402 RT5645_JD1_MODE_MASK,
3406 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3407 RT5645_JD1_MODE_MASK,
3411 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3412 RT5645_JD1_MODE_MASK,
3420 INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
3422 if (rt5645->i2c->irq) {
3423 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
3424 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
3425 | IRQF_ONESHOT, "rt5645", rt5645);
3427 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
3432 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
3433 rt5645_dai, ARRAY_SIZE(rt5645_dai));
3440 if (rt5645->i2c->irq)
3441 free_irq(rt5645->i2c->irq, rt5645);
3443 regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
3447 static int rt5645_i2c_remove(struct i2c_client *i2c)
3449 struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
3452 free_irq(i2c->irq, rt5645);
3454 cancel_delayed_work_sync(&rt5645->jack_detect_work);
3456 snd_soc_unregister_codec(&i2c->dev);
3457 regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
3462 static void rt5645_i2c_shutdown(struct i2c_client *i2c)
3464 struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
3466 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3467 RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
3468 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
3470 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
3474 static struct i2c_driver rt5645_i2c_driver = {
3477 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
3479 .probe = rt5645_i2c_probe,
3480 .remove = rt5645_i2c_remove,
3481 .shutdown = rt5645_i2c_shutdown,
3482 .id_table = rt5645_i2c_id,
3484 module_i2c_driver(rt5645_i2c_driver);
3486 MODULE_DESCRIPTION("ASoC RT5645 driver");
3487 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3488 MODULE_LICENSE("GPL v2");