sound/soc/codecs/rt5645.c

   1 /*
   2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/gpio.h>
  21 #include <linux/gpio/consumer.h>
  22 #include <linux/acpi.h>
  23 #include <linux/dmi.h>
  24 #include <linux/regulator/consumer.h>
  25 #include <sound/core.h>
  26 #include <sound/pcm.h>
  27 #include <sound/pcm_params.h>
  28 #include <sound/jack.h>
  29 #include <sound/soc.h>
  30 #include <sound/soc-dapm.h>
  31 #include <sound/initval.h>
  32 #include <sound/tlv.h>
  33
  34 #include "rl6231.h"
  35 #include "rt5645.h"
  36
  37 #define QUIRK_INV_JD1_1(q)      ((q) & 1)
  38 #define QUIRK_LEVEL_IRQ(q)      (((q) >> 1) & 1)
  39 #define QUIRK_IN2_DIFF(q)       (((q) >> 2) & 1)
  40 #define QUIRK_JD_MODE(q)        (((q) >> 4) & 7)
  41 #define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
  42 #define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
  43
  44 static unsigned int quirk = -1;
  45 module_param(quirk, uint, 0444);
  46 MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
  47
  48 #define RT5645_DEVICE_ID 0x6308
  49 #define RT5650_DEVICE_ID 0x6419
  50
  51 #define RT5645_PR_RANGE_BASE (0xff + 1)
  52 #define RT5645_PR_SPACING 0x100
  53
  54 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  55
  56 #define RT5645_HWEQ_NUM 57
  57
  58 #define TIME_TO_POWER_MS 400
  59
  60 static const struct regmap_range_cfg rt5645_ranges[] = {
  61         {
  62                 .name = "PR",
  63                 .range_min = RT5645_PR_BASE,
  64                 .range_max = RT5645_PR_BASE + 0xf8,
  65                 .selector_reg = RT5645_PRIV_INDEX,
  66                 .selector_mask = 0xff,
  67                 .selector_shift = 0x0,
  68                 .window_start = RT5645_PRIV_DATA,
  69                 .window_len = 0x1,
  70         },
  71 };
  72
  73 static const struct reg_sequence init_list[] = {
  74         {RT5645_PR_BASE + 0x3d, 0x3600},
  75         {RT5645_PR_BASE + 0x1c, 0xfd70},
  76         {RT5645_PR_BASE + 0x20, 0x611f},
  77         {RT5645_PR_BASE + 0x21, 0x4040},
  78         {RT5645_PR_BASE + 0x23, 0x0004},
  79         {RT5645_ASRC_4, 0x0120},
  80 };
  81
  82 static const struct reg_sequence rt5650_init_list[] = {
  83         {0xf6,  0x0100},
  84 };
  85
  86 static const struct reg_default rt5645_reg[] = {
  87         { 0x00, 0x0000 },
  88         { 0x01, 0xc8c8 },
  89         { 0x02, 0xc8c8 },
  90         { 0x03, 0xc8c8 },
  91         { 0x0a, 0x0002 },
  92         { 0x0b, 0x2827 },
  93         { 0x0c, 0xe000 },
  94         { 0x0d, 0x0000 },
  95         { 0x0e, 0x0000 },
  96         { 0x0f, 0x0808 },
  97         { 0x14, 0x3333 },
  98         { 0x16, 0x4b00 },
  99         { 0x18, 0x018b },
 100         { 0x19, 0xafaf },
 101         { 0x1a, 0xafaf },
 102         { 0x1b, 0x0001 },
 103         { 0x1c, 0x2f2f },
 104         { 0x1d, 0x2f2f },
 105         { 0x1e, 0x0000 },
 106         { 0x20, 0x0000 },
 107         { 0x27, 0x7060 },
 108         { 0x28, 0x7070 },
 109         { 0x29, 0x8080 },
 110         { 0x2a, 0x5656 },
 111         { 0x2b, 0x5454 },
 112         { 0x2c, 0xaaa0 },
 113         { 0x2d, 0x0000 },
 114         { 0x2f, 0x1002 },
 115         { 0x31, 0x5000 },
 116         { 0x32, 0x0000 },
 117         { 0x33, 0x0000 },
 118         { 0x34, 0x0000 },
 119         { 0x35, 0x0000 },
 120         { 0x3b, 0x0000 },
 121         { 0x3c, 0x007f },
 122         { 0x3d, 0x0000 },
 123         { 0x3e, 0x007f },
 124         { 0x3f, 0x0000 },
 125         { 0x40, 0x001f },
 126         { 0x41, 0x0000 },
 127         { 0x42, 0x001f },
 128         { 0x45, 0x6000 },
 129         { 0x46, 0x003e },
 130         { 0x47, 0x003e },
 131         { 0x48, 0xf807 },
 132         { 0x4a, 0x0004 },
 133         { 0x4d, 0x0000 },
 134         { 0x4e, 0x0000 },
 135         { 0x4f, 0x01ff },
 136         { 0x50, 0x0000 },
 137         { 0x51, 0x0000 },
 138         { 0x52, 0x01ff },
 139         { 0x53, 0xf000 },
 140         { 0x56, 0x0111 },
 141         { 0x57, 0x0064 },
 142         { 0x58, 0xef0e },
 143         { 0x59, 0xf0f0 },
 144         { 0x5a, 0xef0e },
 145         { 0x5b, 0xf0f0 },
 146         { 0x5c, 0xef0e },
 147         { 0x5d, 0xf0f0 },
 148         { 0x5e, 0xf000 },
 149         { 0x5f, 0x0000 },
 150         { 0x61, 0x0300 },
 151         { 0x62, 0x0000 },
 152         { 0x63, 0x00c2 },
 153         { 0x64, 0x0000 },
 154         { 0x65, 0x0000 },
 155         { 0x66, 0x0000 },
 156         { 0x6a, 0x0000 },
 157         { 0x6c, 0x0aaa },
 158         { 0x70, 0x8000 },
 159         { 0x71, 0x8000 },
 160         { 0x72, 0x8000 },
 161         { 0x73, 0x7770 },
 162         { 0x74, 0x3e00 },
 163         { 0x75, 0x2409 },
 164         { 0x76, 0x000a },
 165         { 0x77, 0x0c00 },
 166         { 0x78, 0x0000 },
 167         { 0x79, 0x0123 },
 168         { 0x80, 0x0000 },
 169         { 0x81, 0x0000 },
 170         { 0x82, 0x0000 },
 171         { 0x83, 0x0000 },
 172         { 0x84, 0x0000 },
 173         { 0x85, 0x0000 },
 174         { 0x8a, 0x0120 },
 175         { 0x8e, 0x0004 },
 176         { 0x8f, 0x1100 },
 177         { 0x90, 0x0646 },
 178         { 0x91, 0x0c06 },
 179         { 0x93, 0x0000 },
 180         { 0x94, 0x0200 },
 181         { 0x95, 0x0000 },
 182         { 0x9a, 0x2184 },
 183         { 0x9b, 0x010a },
 184         { 0x9c, 0x0aea },
 185         { 0x9d, 0x000c },
 186         { 0x9e, 0x0400 },
 187         { 0xa0, 0xa0a8 },
 188         { 0xa1, 0x0059 },
 189         { 0xa2, 0x0001 },
 190         { 0xae, 0x6000 },
 191         { 0xaf, 0x0000 },
 192         { 0xb0, 0x6000 },
 193         { 0xb1, 0x0000 },
 194         { 0xb2, 0x0000 },
 195         { 0xb3, 0x001f },
 196         { 0xb4, 0x020c },
 197         { 0xb5, 0x1f00 },
 198         { 0xb6, 0x0000 },
 199         { 0xbb, 0x0000 },
 200         { 0xbc, 0x0000 },
 201         { 0xbd, 0x0000 },
 202         { 0xbe, 0x0000 },
 203         { 0xbf, 0x3100 },
 204         { 0xc0, 0x0000 },
 205         { 0xc1, 0x0000 },
 206         { 0xc2, 0x0000 },
 207         { 0xc3, 0x2000 },
 208         { 0xcd, 0x0000 },
 209         { 0xce, 0x0000 },
 210         { 0xcf, 0x1813 },
 211         { 0xd0, 0x0690 },
 212         { 0xd1, 0x1c17 },
 213         { 0xd3, 0xb320 },
 214         { 0xd4, 0x0000 },
 215         { 0xd6, 0x0400 },
 216         { 0xd9, 0x0809 },
 217         { 0xda, 0x0000 },
 218         { 0xdb, 0x0003 },
 219         { 0xdc, 0x0049 },
 220         { 0xdd, 0x001b },
 221         { 0xdf, 0x0008 },
 222         { 0xe0, 0x4000 },
 223         { 0xe6, 0x8000 },
 224         { 0xe7, 0x0200 },
 225         { 0xec, 0xb300 },
 226         { 0xed, 0x0000 },
 227         { 0xf0, 0x001f },
 228         { 0xf1, 0x020c },
 229         { 0xf2, 0x1f00 },
 230         { 0xf3, 0x0000 },
 231         { 0xf4, 0x4000 },
 232         { 0xf8, 0x0000 },
 233         { 0xf9, 0x0000 },
 234         { 0xfa, 0x2060 },
 235         { 0xfb, 0x4040 },
 236         { 0xfc, 0x0000 },
 237         { 0xfd, 0x0002 },
 238         { 0xfe, 0x10ec },
 239         { 0xff, 0x6308 },
 240 };
 241
 242 static const struct reg_default rt5650_reg[] = {
 243         { 0x00, 0x0000 },
 244         { 0x01, 0xc8c8 },
 245         { 0x02, 0xc8c8 },
 246         { 0x03, 0xc8c8 },
 247         { 0x0a, 0x0002 },
 248         { 0x0b, 0x2827 },
 249         { 0x0c, 0xe000 },
 250         { 0x0d, 0x0000 },
 251         { 0x0e, 0x0000 },
 252         { 0x0f, 0x0808 },
 253         { 0x14, 0x3333 },
 254         { 0x16, 0x4b00 },
 255         { 0x18, 0x018b },
 256         { 0x19, 0xafaf },
 257         { 0x1a, 0xafaf },
 258         { 0x1b, 0x0001 },
 259         { 0x1c, 0x2f2f },
 260         { 0x1d, 0x2f2f },
 261         { 0x1e, 0x0000 },
 262         { 0x20, 0x0000 },
 263         { 0x27, 0x7060 },
 264         { 0x28, 0x7070 },
 265         { 0x29, 0x8080 },
 266         { 0x2a, 0x5656 },
 267         { 0x2b, 0x5454 },
 268         { 0x2c, 0xaaa0 },
 269         { 0x2d, 0x0000 },
 270         { 0x2f, 0x5002 },
 271         { 0x31, 0x5000 },
 272         { 0x32, 0x0000 },
 273         { 0x33, 0x0000 },
 274         { 0x34, 0x0000 },
 275         { 0x35, 0x0000 },
 276         { 0x3b, 0x0000 },
 277         { 0x3c, 0x007f },
 278         { 0x3d, 0x0000 },
 279         { 0x3e, 0x007f },
 280         { 0x3f, 0x0000 },
 281         { 0x40, 0x001f },
 282         { 0x41, 0x0000 },
 283         { 0x42, 0x001f },
 284         { 0x45, 0x6000 },
 285         { 0x46, 0x003e },
 286         { 0x47, 0x003e },
 287         { 0x48, 0xf807 },
 288         { 0x4a, 0x0004 },
 289         { 0x4d, 0x0000 },
 290         { 0x4e, 0x0000 },
 291         { 0x4f, 0x01ff },
 292         { 0x50, 0x0000 },
 293         { 0x51, 0x0000 },
 294         { 0x52, 0x01ff },
 295         { 0x53, 0xf000 },
 296         { 0x56, 0x0111 },
 297         { 0x57, 0x0064 },
 298         { 0x58, 0xef0e },
 299         { 0x59, 0xf0f0 },
 300         { 0x5a, 0xef0e },
 301         { 0x5b, 0xf0f0 },
 302         { 0x5c, 0xef0e },
 303         { 0x5d, 0xf0f0 },
 304         { 0x5e, 0xf000 },
 305         { 0x5f, 0x0000 },
 306         { 0x61, 0x0300 },
 307         { 0x62, 0x0000 },
 308         { 0x63, 0x00c2 },
 309         { 0x64, 0x0000 },
 310         { 0x65, 0x0000 },
 311         { 0x66, 0x0000 },
 312         { 0x6a, 0x0000 },
 313         { 0x6c, 0x0aaa },
 314         { 0x70, 0x8000 },
 315         { 0x71, 0x8000 },
 316         { 0x72, 0x8000 },
 317         { 0x73, 0x7770 },
 318         { 0x74, 0x3e00 },
 319         { 0x75, 0x2409 },
 320         { 0x76, 0x000a },
 321         { 0x77, 0x0c00 },
 322         { 0x78, 0x0000 },
 323         { 0x79, 0x0123 },
 324         { 0x7a, 0x0123 },
 325         { 0x80, 0x0000 },
 326         { 0x81, 0x0000 },
 327         { 0x82, 0x0000 },
 328         { 0x83, 0x0000 },
 329         { 0x84, 0x0000 },
 330         { 0x85, 0x0000 },
 331         { 0x8a, 0x0120 },
 332         { 0x8e, 0x0004 },
 333         { 0x8f, 0x1100 },
 334         { 0x90, 0x0646 },
 335         { 0x91, 0x0c06 },
 336         { 0x93, 0x0000 },
 337         { 0x94, 0x0200 },
 338         { 0x95, 0x0000 },
 339         { 0x9a, 0x2184 },
 340         { 0x9b, 0x010a },
 341         { 0x9c, 0x0aea },
 342         { 0x9d, 0x000c },
 343         { 0x9e, 0x0400 },
 344         { 0xa0, 0xa0a8 },
 345         { 0xa1, 0x0059 },
 346         { 0xa2, 0x0001 },
 347         { 0xae, 0x6000 },
 348         { 0xaf, 0x0000 },
 349         { 0xb0, 0x6000 },
 350         { 0xb1, 0x0000 },
 351         { 0xb2, 0x0000 },
 352         { 0xb3, 0x001f },
 353         { 0xb4, 0x020c },
 354         { 0xb5, 0x1f00 },
 355         { 0xb6, 0x0000 },
 356         { 0xbb, 0x0000 },
 357         { 0xbc, 0x0000 },
 358         { 0xbd, 0x0000 },
 359         { 0xbe, 0x0000 },
 360         { 0xbf, 0x3100 },
 361         { 0xc0, 0x0000 },
 362         { 0xc1, 0x0000 },
 363         { 0xc2, 0x0000 },
 364         { 0xc3, 0x2000 },
 365         { 0xcd, 0x0000 },
 366         { 0xce, 0x0000 },
 367         { 0xcf, 0x1813 },
 368         { 0xd0, 0x0690 },
 369         { 0xd1, 0x1c17 },
 370         { 0xd3, 0xb320 },
 371         { 0xd4, 0x0000 },
 372         { 0xd6, 0x0400 },
 373         { 0xd9, 0x0809 },
 374         { 0xda, 0x0000 },
 375         { 0xdb, 0x0003 },
 376         { 0xdc, 0x0049 },
 377         { 0xdd, 0x001b },
 378         { 0xdf, 0x0008 },
 379         { 0xe0, 0x4000 },
 380         { 0xe6, 0x8000 },
 381         { 0xe7, 0x0200 },
 382         { 0xec, 0xb300 },
 383         { 0xed, 0x0000 },
 384         { 0xf0, 0x001f },
 385         { 0xf1, 0x020c },
 386         { 0xf2, 0x1f00 },
 387         { 0xf3, 0x0000 },
 388         { 0xf4, 0x4000 },
 389         { 0xf8, 0x0000 },
 390         { 0xf9, 0x0000 },
 391         { 0xfa, 0x2060 },
 392         { 0xfb, 0x4040 },
 393         { 0xfc, 0x0000 },
 394         { 0xfd, 0x0002 },
 395         { 0xfe, 0x10ec },
 396         { 0xff, 0x6308 },
 397 };
 398
 399 struct rt5645_eq_param_s {
 400         unsigned short reg;
 401         unsigned short val;
 402 };
 403
 404 struct rt5645_eq_param_s_be16 {
 405         __be16 reg;
 406         __be16 val;
 407 };
 408
 409 static const char *const rt5645_supply_names[] = {
 410         "avdd",
 411         "cpvdd",
 412 };
 413
 414 struct rt5645_priv {
 415         struct snd_soc_component *component;
 416         struct rt5645_platform_data pdata;
 417         struct regmap *regmap;
 418         struct i2c_client *i2c;
 419         struct gpio_desc *gpiod_hp_det;
 420         struct snd_soc_jack *hp_jack;
 421         struct snd_soc_jack *mic_jack;
 422         struct snd_soc_jack *btn_jack;
 423         struct delayed_work jack_detect_work, rcclock_work;
 424         struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
 425         struct rt5645_eq_param_s *eq_param;
 426         struct timer_list btn_check_timer;
 427
 428         int codec_type;
 429         int sysclk;
 430         int sysclk_src;
 431         int lrck[RT5645_AIFS];
 432         int bclk[RT5645_AIFS];
 433         int master[RT5645_AIFS];
 434
 435         int pll_src;
 436         int pll_in;
 437         int pll_out;
 438
 439         int jack_type;
 440         bool en_button_func;
 441         bool hp_on;
 442         int v_id;
 443 };
 444
 445 static int rt5645_reset(struct snd_soc_component *component)
 446 {
 447         return snd_soc_component_write(component, RT5645_RESET, 0);
 448 }
 449
 450 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 451 {
 452         int i;
 453
 454         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 455                 if (reg >= rt5645_ranges[i].range_min &&
 456                         reg <= rt5645_ranges[i].range_max) {
 457                         return true;
 458                 }
 459         }
 460
 461         switch (reg) {
 462         case RT5645_RESET:
 463         case RT5645_PRIV_INDEX:
 464         case RT5645_PRIV_DATA:
 465         case RT5645_IN1_CTRL1:
 466         case RT5645_IN1_CTRL2:
 467         case RT5645_IN1_CTRL3:
 468         case RT5645_A_JD_CTRL1:
 469         case RT5645_ADC_EQ_CTRL1:
 470         case RT5645_EQ_CTRL1:
 471         case RT5645_ALC_CTRL_1:
 472         case RT5645_IRQ_CTRL2:
 473         case RT5645_IRQ_CTRL3:
 474         case RT5645_INT_IRQ_ST:
 475         case RT5645_IL_CMD:
 476         case RT5650_4BTN_IL_CMD1:
 477         case RT5645_VENDOR_ID:
 478         case RT5645_VENDOR_ID1:
 479         case RT5645_VENDOR_ID2:
 480                 return true;
 481         default:
 482                 return false;
 483         }
 484 }
 485
 486 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 487 {
 488         int i;
 489
 490         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 491                 if (reg >= rt5645_ranges[i].range_min &&
 492                         reg <= rt5645_ranges[i].range_max) {
 493                         return true;
 494                 }
 495         }
 496
 497         switch (reg) {
 498         case RT5645_RESET:
 499         case RT5645_SPK_VOL:
 500         case RT5645_HP_VOL:
 501         case RT5645_LOUT1:
 502         case RT5645_IN1_CTRL1:
 503         case RT5645_IN1_CTRL2:
 504         case RT5645_IN1_CTRL3:
 505         case RT5645_IN2_CTRL:
 506         case RT5645_INL1_INR1_VOL:
 507         case RT5645_SPK_FUNC_LIM:
 508         case RT5645_ADJ_HPF_CTRL:
 509         case RT5645_DAC1_DIG_VOL:
 510         case RT5645_DAC2_DIG_VOL:
 511         case RT5645_DAC_CTRL:
 512         case RT5645_STO1_ADC_DIG_VOL:
 513         case RT5645_MONO_ADC_DIG_VOL:
 514         case RT5645_ADC_BST_VOL1:
 515         case RT5645_ADC_BST_VOL2:
 516         case RT5645_STO1_ADC_MIXER:
 517         case RT5645_MONO_ADC_MIXER:
 518         case RT5645_AD_DA_MIXER:
 519         case RT5645_STO_DAC_MIXER:
 520         case RT5645_MONO_DAC_MIXER:
 521         case RT5645_DIG_MIXER:
 522         case RT5650_A_DAC_SOUR:
 523         case RT5645_DIG_INF1_DATA:
 524         case RT5645_PDM_OUT_CTRL:
 525         case RT5645_REC_L1_MIXER:
 526         case RT5645_REC_L2_MIXER:
 527         case RT5645_REC_R1_MIXER:
 528         case RT5645_REC_R2_MIXER:
 529         case RT5645_HPMIXL_CTRL:
 530         case RT5645_HPOMIXL_CTRL:
 531         case RT5645_HPMIXR_CTRL:
 532         case RT5645_HPOMIXR_CTRL:
 533         case RT5645_HPO_MIXER:
 534         case RT5645_SPK_L_MIXER:
 535         case RT5645_SPK_R_MIXER:
 536         case RT5645_SPO_MIXER:
 537         case RT5645_SPO_CLSD_RATIO:
 538         case RT5645_OUT_L1_MIXER:
 539         case RT5645_OUT_R1_MIXER:
 540         case RT5645_OUT_L_GAIN1:
 541         case RT5645_OUT_L_GAIN2:
 542         case RT5645_OUT_R_GAIN1:
 543         case RT5645_OUT_R_GAIN2:
 544         case RT5645_LOUT_MIXER:
 545         case RT5645_HAPTIC_CTRL1:
 546         case RT5645_HAPTIC_CTRL2:
 547         case RT5645_HAPTIC_CTRL3:
 548         case RT5645_HAPTIC_CTRL4:
 549         case RT5645_HAPTIC_CTRL5:
 550         case RT5645_HAPTIC_CTRL6:
 551         case RT5645_HAPTIC_CTRL7:
 552         case RT5645_HAPTIC_CTRL8:
 553         case RT5645_HAPTIC_CTRL9:
 554         case RT5645_HAPTIC_CTRL10:
 555         case RT5645_PWR_DIG1:
 556         case RT5645_PWR_DIG2:
 557         case RT5645_PWR_ANLG1:
 558         case RT5645_PWR_ANLG2:
 559         case RT5645_PWR_MIXER:
 560         case RT5645_PWR_VOL:
 561         case RT5645_PRIV_INDEX:
 562         case RT5645_PRIV_DATA:
 563         case RT5645_I2S1_SDP:
 564         case RT5645_I2S2_SDP:
 565         case RT5645_ADDA_CLK1:
 566         case RT5645_ADDA_CLK2:
 567         case RT5645_DMIC_CTRL1:
 568         case RT5645_DMIC_CTRL2:
 569         case RT5645_TDM_CTRL_1:
 570         case RT5645_TDM_CTRL_2:
 571         case RT5645_TDM_CTRL_3:
 572         case RT5650_TDM_CTRL_4:
 573         case RT5645_GLB_CLK:
 574         case RT5645_PLL_CTRL1:
 575         case RT5645_PLL_CTRL2:
 576         case RT5645_ASRC_1:
 577         case RT5645_ASRC_2:
 578         case RT5645_ASRC_3:
 579         case RT5645_ASRC_4:
 580         case RT5645_DEPOP_M1:
 581         case RT5645_DEPOP_M2:
 582         case RT5645_DEPOP_M3:
 583         case RT5645_CHARGE_PUMP:
 584         case RT5645_MICBIAS:
 585         case RT5645_A_JD_CTRL1:
 586         case RT5645_VAD_CTRL4:
 587         case RT5645_CLSD_OUT_CTRL:
 588         case RT5645_ADC_EQ_CTRL1:
 589         case RT5645_ADC_EQ_CTRL2:
 590         case RT5645_EQ_CTRL1:
 591         case RT5645_EQ_CTRL2:
 592         case RT5645_ALC_CTRL_1:
 593         case RT5645_ALC_CTRL_2:
 594         case RT5645_ALC_CTRL_3:
 595         case RT5645_ALC_CTRL_4:
 596         case RT5645_ALC_CTRL_5:
 597         case RT5645_JD_CTRL:
 598         case RT5645_IRQ_CTRL1:
 599         case RT5645_IRQ_CTRL2:
 600         case RT5645_IRQ_CTRL3:
 601         case RT5645_INT_IRQ_ST:
 602         case RT5645_GPIO_CTRL1:
 603         case RT5645_GPIO_CTRL2:
 604         case RT5645_GPIO_CTRL3:
 605         case RT5645_BASS_BACK:
 606         case RT5645_MP3_PLUS1:
 607         case RT5645_MP3_PLUS2:
 608         case RT5645_ADJ_HPF1:
 609         case RT5645_ADJ_HPF2:
 610         case RT5645_HP_CALIB_AMP_DET:
 611         case RT5645_SV_ZCD1:
 612         case RT5645_SV_ZCD2:
 613         case RT5645_IL_CMD:
 614         case RT5645_IL_CMD2:
 615         case RT5645_IL_CMD3:
 616         case RT5650_4BTN_IL_CMD1:
 617         case RT5650_4BTN_IL_CMD2:
 618         case RT5645_DRC1_HL_CTRL1:
 619         case RT5645_DRC2_HL_CTRL1:
 620         case RT5645_ADC_MONO_HP_CTRL1:
 621         case RT5645_ADC_MONO_HP_CTRL2:
 622         case RT5645_DRC2_CTRL1:
 623         case RT5645_DRC2_CTRL2:
 624         case RT5645_DRC2_CTRL3:
 625         case RT5645_DRC2_CTRL4:
 626         case RT5645_DRC2_CTRL5:
 627         case RT5645_JD_CTRL3:
 628         case RT5645_JD_CTRL4:
 629         case RT5645_GEN_CTRL1:
 630         case RT5645_GEN_CTRL2:
 631         case RT5645_GEN_CTRL3:
 632         case RT5645_VENDOR_ID:
 633         case RT5645_VENDOR_ID1:
 634         case RT5645_VENDOR_ID2:
 635                 return true;
 636         default:
 637                 return false;
 638         }
 639 }
 640
 641 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 642 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
 643 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 644 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
 645 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 646
 647 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 648 static const DECLARE_TLV_DB_RANGE(bst_tlv,
 649         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 650         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 651         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 652         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 653         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 654         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 655         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
 656 );
 657
 658 /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
 659 static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
 660         0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
 661         5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
 662         6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
 663         7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
 664 );
 665
 666 static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
 667                          struct snd_ctl_elem_info *uinfo)
 668 {
 669         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 670         uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
 671
 672         return 0;
 673 }
 674
 675 static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
 676                         struct snd_ctl_elem_value *ucontrol)
 677 {
 678         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 679         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 680         struct rt5645_eq_param_s_be16 *eq_param =
 681                 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
 682         int i;
 683
 684         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 685                 eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
 686                 eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
 687         }
 688
 689         return 0;
 690 }
 691
 692 static bool rt5645_validate_hweq(unsigned short reg)
 693 {
 694         if ((reg >= 0x1a4 && reg <= 0x1cd) | (reg >= 0x1e5 && reg <= 0x1f8) |
 695                 (reg == RT5645_EQ_CTRL2))
 696                 return true;
 697
 698         return false;
 699 }
 700
 701 static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
 702                         struct snd_ctl_elem_value *ucontrol)
 703 {
 704         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 705         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 706         struct rt5645_eq_param_s_be16 *eq_param =
 707                 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
 708         int i;
 709
 710         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 711                 rt5645->eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
 712                 rt5645->eq_param[i].val = be16_to_cpu(eq_param[i].val);
 713         }
 714
 715         /* The final setting of the table should be RT5645_EQ_CTRL2 */
 716         for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
 717                 if (rt5645->eq_param[i].reg == 0)
 718                         continue;
 719                 else if (rt5645->eq_param[i].reg != RT5645_EQ_CTRL2)
 720                         return 0;
 721                 else
 722                         break;
 723         }
 724
 725         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 726                 if (!rt5645_validate_hweq(rt5645->eq_param[i].reg) &&
 727                     rt5645->eq_param[i].reg != 0)
 728                         return 0;
 729                 else if (rt5645->eq_param[i].reg == 0)
 730                         break;
 731         }
 732
 733         return 0;
 734 }
 735
 736 #define RT5645_HWEQ(xname) \
 737 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 738         .info = rt5645_hweq_info, \
 739         .get = rt5645_hweq_get, \
 740         .put = rt5645_hweq_put \
 741 }
 742
 743 static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
 744                 struct snd_ctl_elem_value *ucontrol)
 745 {
 746         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 747         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 748         int ret;
 749
 750         regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
 751                 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
 752
 753         ret = snd_soc_put_volsw(kcontrol, ucontrol);
 754
 755         mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
 756                 msecs_to_jiffies(200));
 757
 758         return ret;
 759 }
 760
 761 static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
 762         "immediately", "zero crossing", "soft ramp"
 763 };
 764
 765 static SOC_ENUM_SINGLE_DECL(
 766         rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
 767         RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
 768
 769 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 770         /* Speaker Output Volume */
 771         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 772                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 773         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 774                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
 775                 rt5645_spk_put_volsw, out_vol_tlv),
 776
 777         /* ClassD modulator Speaker Gain Ratio */
 778         SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
 779                 RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
 780
 781         /* Headphone Output Volume */
 782         SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
 783                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 784         SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
 785                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 786
 787         /* OUTPUT Control */
 788         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 789                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 790         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 791                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 792         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 793                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 794
 795         /* DAC Digital Volume */
 796         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 797                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 798         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 799                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 800         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 801                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 802
 803         /* IN1/IN2 Control */
 804         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 805                 RT5645_BST_SFT1, 12, 0, bst_tlv),
 806         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 807                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 808
 809         /* INL/INR Volume Control */
 810         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 811                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 812
 813         /* ADC Digital Volume Control */
 814         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 815                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 816         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 817                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 818         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 819                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 820         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 821                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 822
 823         /* ADC Boost Volume Control */
 824         SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
 825                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 826                 adc_bst_tlv),
 827         SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
 828                 RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
 829                 adc_bst_tlv),
 830
 831         /* I2S2 function select */
 832         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 833                 1, 1),
 834         RT5645_HWEQ("Speaker HWEQ"),
 835
 836         /* Digital Soft Volume Control */
 837         SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
 838 };
 839
 840 /**
 841  * set_dmic_clk - Set parameter of dmic.
 842  *
 843  * @w: DAPM widget.
 844  * @kcontrol: The kcontrol of this widget.
 845  * @event: Event id.
 846  *
 847  */
 848 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 849         struct snd_kcontrol *kcontrol, int event)
 850 {
 851         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 852         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 853         int idx, rate;
 854
 855         rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
 856                 RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
 857         idx = rl6231_calc_dmic_clk(rate);
 858         if (idx < 0)
 859                 dev_err(component->dev, "Failed to set DMIC clock\n");
 860         else
 861                 snd_soc_component_update_bits(component, RT5645_DMIC_CTRL1,
 862                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 863         return idx;
 864 }
 865
 866 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 867                          struct snd_soc_dapm_widget *sink)
 868 {
 869         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 870         unsigned int val;
 871
 872         val = snd_soc_component_read32(component, RT5645_GLB_CLK);
 873         val &= RT5645_SCLK_SRC_MASK;
 874         if (val == RT5645_SCLK_SRC_PLL1)
 875                 return 1;
 876         else
 877                 return 0;
 878 }
 879
 880 static int is_using_asrc(struct snd_soc_dapm_widget *source,
 881                          struct snd_soc_dapm_widget *sink)
 882 {
 883         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 884         unsigned int reg, shift, val;
 885
 886         switch (source->shift) {
 887         case 0:
 888                 reg = RT5645_ASRC_3;
 889                 shift = 0;
 890                 break;
 891         case 1:
 892                 reg = RT5645_ASRC_3;
 893                 shift = 4;
 894                 break;
 895         case 3:
 896                 reg = RT5645_ASRC_2;
 897                 shift = 0;
 898                 break;
 899         case 8:
 900                 reg = RT5645_ASRC_2;
 901                 shift = 4;
 902                 break;
 903         case 9:
 904                 reg = RT5645_ASRC_2;
 905                 shift = 8;
 906                 break;
 907         case 10:
 908                 reg = RT5645_ASRC_2;
 909                 shift = 12;
 910                 break;
 911         default:
 912                 return 0;
 913         }
 914
 915         val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
 916         switch (val) {
 917         case 1:
 918         case 2:
 919         case 3:
 920         case 4:
 921                 return 1;
 922         default:
 923                 return 0;
 924         }
 925
 926 }
 927
 928 static int rt5645_enable_hweq(struct snd_soc_component *component)
 929 {
 930         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 931         int i;
 932
 933         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 934                 if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
 935                         regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
 936                                         rt5645->eq_param[i].val);
 937                 else
 938                         break;
 939         }
 940
 941         return 0;
 942 }
 943
 944 /**
 945  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 946  * @component: SoC audio component device.
 947  * @filter_mask: mask of filters.
 948  * @clk_src: clock source
 949  *
 950  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 951  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 952  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 953  * ASRC function will track i2s clock and generate a corresponding system clock
 954  * for codec. This function provides an API to select the clock source for a
 955  * set of filters specified by the mask. And the codec driver will turn on ASRC
 956  * for these filters if ASRC is selected as their clock source.
 957  */
 958 int rt5645_sel_asrc_clk_src(struct snd_soc_component *component,
 959                 unsigned int filter_mask, unsigned int clk_src)
 960 {
 961         unsigned int asrc2_mask = 0;
 962         unsigned int asrc2_value = 0;
 963         unsigned int asrc3_mask = 0;
 964         unsigned int asrc3_value = 0;
 965
 966         switch (clk_src) {
 967         case RT5645_CLK_SEL_SYS:
 968         case RT5645_CLK_SEL_I2S1_ASRC:
 969         case RT5645_CLK_SEL_I2S2_ASRC:
 970         case RT5645_CLK_SEL_SYS2:
 971                 break;
 972
 973         default:
 974                 return -EINVAL;
 975         }
 976
 977         if (filter_mask & RT5645_DA_STEREO_FILTER) {
 978                 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
 979                 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
 980                         | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
 981         }
 982
 983         if (filter_mask & RT5645_DA_MONO_L_FILTER) {
 984                 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
 985                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
 986                         | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
 987         }
 988
 989         if (filter_mask & RT5645_DA_MONO_R_FILTER) {
 990                 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
 991                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
 992                         | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
 993         }
 994
 995         if (filter_mask & RT5645_AD_STEREO_FILTER) {
 996                 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
 997                 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
 998                         | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
 999         }
1000
1001         if (filter_mask & RT5645_AD_MONO_L_FILTER) {
1002                 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
1003                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
1004                         | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
1005         }
1006
1007         if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
1008                 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
1009                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
1010                         | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
1011         }
1012
1013         if (asrc2_mask)
1014                 snd_soc_component_update_bits(component, RT5645_ASRC_2,
1015                         asrc2_mask, asrc2_value);
1016
1017         if (asrc3_mask)
1018                 snd_soc_component_update_bits(component, RT5645_ASRC_3,
1019                         asrc3_mask, asrc3_value);
1020
1021         return 0;
1022 }
1023 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
1024
1025 /* Digital Mixer */
1026 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
1027         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1028                         RT5645_M_ADC_L1_SFT, 1, 1),
1029         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1030                         RT5645_M_ADC_L2_SFT, 1, 1),
1031 };
1032
1033 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
1034         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1035                         RT5645_M_ADC_R1_SFT, 1, 1),
1036         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1037                         RT5645_M_ADC_R2_SFT, 1, 1),
1038 };
1039
1040 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
1041         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1042                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
1043         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1044                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
1045 };
1046
1047 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
1048         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1049                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
1050         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1051                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
1052 };
1053
1054 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
1055         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1056                         RT5645_M_ADCMIX_L_SFT, 1, 1),
1057         SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1058                         RT5645_M_DAC1_L_SFT, 1, 1),
1059 };
1060
1061 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
1062         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1063                         RT5645_M_ADCMIX_R_SFT, 1, 1),
1064         SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1065                         RT5645_M_DAC1_R_SFT, 1, 1),
1066 };
1067
1068 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
1069         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1070                         RT5645_M_DAC_L1_SFT, 1, 1),
1071         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
1072                         RT5645_M_DAC_L2_SFT, 1, 1),
1073         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1074                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
1075 };
1076
1077 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
1078         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1079                         RT5645_M_DAC_R1_SFT, 1, 1),
1080         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
1081                         RT5645_M_DAC_R2_SFT, 1, 1),
1082         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1083                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
1084 };
1085
1086 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
1087         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
1088                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
1089         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1090                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
1091         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1092                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
1093 };
1094
1095 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
1096         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
1097                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
1098         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1099                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
1100         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1101                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
1102 };
1103
1104 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
1105         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
1106                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
1107         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1108                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
1109         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1110                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
1111 };
1112
1113 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
1114         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
1115                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
1116         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1117                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
1118         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1119                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
1120 };
1121
1122 /* Analog Input Mixer */
1123 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
1124         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
1125                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
1126         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
1127                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
1128         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
1129                         RT5645_M_BST2_RM_L_SFT, 1, 1),
1130         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
1131                         RT5645_M_BST1_RM_L_SFT, 1, 1),
1132         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
1133                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
1134 };
1135
1136 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
1137         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
1138                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
1139         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
1140                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
1141         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
1142                         RT5645_M_BST2_RM_R_SFT, 1, 1),
1143         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
1144                         RT5645_M_BST1_RM_R_SFT, 1, 1),
1145         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
1146                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
1147 };
1148
1149 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
1150         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
1151                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
1152         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
1153                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
1154         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
1155                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
1156         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
1157                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
1158 };
1159
1160 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
1161         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
1162                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
1163         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
1164                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
1165         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
1166                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
1167         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
1168                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
1169 };
1170
1171 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
1172         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
1173                         RT5645_M_BST1_OM_L_SFT, 1, 1),
1174         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
1175                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
1176         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
1177                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
1178         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
1179                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
1180 };
1181
1182 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
1183         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
1184                         RT5645_M_BST2_OM_R_SFT, 1, 1),
1185         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
1186                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
1187         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
1188                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
1189         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
1190                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
1191 };
1192
1193 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
1194         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1195                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
1196         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
1197                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
1198         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1199                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
1200         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
1201                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
1202 };
1203
1204 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
1205         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1206                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
1207         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1208                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
1209 };
1210
1211 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
1212         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
1213                         RT5645_M_DAC1_HM_SFT, 1, 1),
1214         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
1215                         RT5645_M_HPVOL_HM_SFT, 1, 1),
1216 };
1217
1218 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
1219         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
1220                         RT5645_M_DAC1_HV_SFT, 1, 1),
1221         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
1222                         RT5645_M_DAC2_HV_SFT, 1, 1),
1223         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
1224                         RT5645_M_IN_HV_SFT, 1, 1),
1225         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
1226                         RT5645_M_BST1_HV_SFT, 1, 1),
1227 };
1228
1229 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
1230         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
1231                         RT5645_M_DAC1_HV_SFT, 1, 1),
1232         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
1233                         RT5645_M_DAC2_HV_SFT, 1, 1),
1234         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
1235                         RT5645_M_IN_HV_SFT, 1, 1),
1236         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
1237                         RT5645_M_BST2_HV_SFT, 1, 1),
1238 };
1239
1240 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
1241         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
1242                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
1243         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
1244                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
1245         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
1246                         RT5645_M_OV_L_LM_SFT, 1, 1),
1247         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
1248                         RT5645_M_OV_R_LM_SFT, 1, 1),
1249 };
1250
1251 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1252 static const char * const rt5645_dac1_src[] = {
1253         "IF1 DAC", "IF2 DAC", "IF3 DAC"
1254 };
1255
1256 static SOC_ENUM_SINGLE_DECL(
1257         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
1258         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
1259
1260 static const struct snd_kcontrol_new rt5645_dac1l_mux =
1261         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
1262
1263 static SOC_ENUM_SINGLE_DECL(
1264         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
1265         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
1266
1267 static const struct snd_kcontrol_new rt5645_dac1r_mux =
1268         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
1269
1270 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1271 static const char * const rt5645_dac12_src[] = {
1272         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1273 };
1274
1275 static SOC_ENUM_SINGLE_DECL(
1276         rt5645_dac2l_enum, RT5645_DAC_CTRL,
1277         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
1278
1279 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
1280         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
1281
1282 static const char * const rt5645_dacr2_src[] = {
1283         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1284 };
1285
1286 static SOC_ENUM_SINGLE_DECL(
1287         rt5645_dac2r_enum, RT5645_DAC_CTRL,
1288         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
1289
1290 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
1291         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
1292
1293 /* Stereo1 ADC source */
1294 /* MX-27 [12] */
1295 static const char * const rt5645_stereo_adc1_src[] = {
1296         "DAC MIX", "ADC"
1297 };
1298
1299 static SOC_ENUM_SINGLE_DECL(
1300         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1301         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1302
1303 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1304         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1305
1306 /* MX-27 [11] */
1307 static const char * const rt5645_stereo_adc2_src[] = {
1308         "DAC MIX", "DMIC"
1309 };
1310
1311 static SOC_ENUM_SINGLE_DECL(
1312         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1313         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1314
1315 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1316         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1317
1318 /* MX-27 [8] */
1319 static const char * const rt5645_stereo_dmic_src[] = {
1320         "DMIC1", "DMIC2"
1321 };
1322
1323 static SOC_ENUM_SINGLE_DECL(
1324         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1325         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1326
1327 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1328         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1329
1330 /* Mono ADC source */
1331 /* MX-28 [12] */
1332 static const char * const rt5645_mono_adc_l1_src[] = {
1333         "Mono DAC MIXL", "ADC"
1334 };
1335
1336 static SOC_ENUM_SINGLE_DECL(
1337         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1338         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1339
1340 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1341         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1342 /* MX-28 [11] */
1343 static const char * const rt5645_mono_adc_l2_src[] = {
1344         "Mono DAC MIXL", "DMIC"
1345 };
1346
1347 static SOC_ENUM_SINGLE_DECL(
1348         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1349         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1350
1351 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1352         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1353
1354 /* MX-28 [8] */
1355 static const char * const rt5645_mono_dmic_src[] = {
1356         "DMIC1", "DMIC2"
1357 };
1358
1359 static SOC_ENUM_SINGLE_DECL(
1360         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1361         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1362
1363 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1364         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1365 /* MX-28 [1:0] */
1366 static SOC_ENUM_SINGLE_DECL(
1367         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1368         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1369
1370 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1371         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1372 /* MX-28 [4] */
1373 static const char * const rt5645_mono_adc_r1_src[] = {
1374         "Mono DAC MIXR", "ADC"
1375 };
1376
1377 static SOC_ENUM_SINGLE_DECL(
1378         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1379         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1380
1381 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1382         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1383 /* MX-28 [3] */
1384 static const char * const rt5645_mono_adc_r2_src[] = {
1385         "Mono DAC MIXR", "DMIC"
1386 };
1387
1388 static SOC_ENUM_SINGLE_DECL(
1389         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1390         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1391
1392 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1393         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1394
1395 /* MX-77 [9:8] */
1396 static const char * const rt5645_if1_adc_in_src[] = {
1397         "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1398         "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1399 };
1400
1401 static SOC_ENUM_SINGLE_DECL(
1402         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1403         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1404
1405 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1406         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1407
1408 /* MX-78 [4:0] */
1409 static const char * const rt5650_if1_adc_in_src[] = {
1410         "IF_ADC1/IF_ADC2/DAC_REF/Null",
1411         "IF_ADC1/IF_ADC2/Null/DAC_REF",
1412         "IF_ADC1/DAC_REF/IF_ADC2/Null",
1413         "IF_ADC1/DAC_REF/Null/IF_ADC2",
1414         "IF_ADC1/Null/DAC_REF/IF_ADC2",
1415         "IF_ADC1/Null/IF_ADC2/DAC_REF",
1416
1417         "IF_ADC2/IF_ADC1/DAC_REF/Null",
1418         "IF_ADC2/IF_ADC1/Null/DAC_REF",
1419         "IF_ADC2/DAC_REF/IF_ADC1/Null",
1420         "IF_ADC2/DAC_REF/Null/IF_ADC1",
1421         "IF_ADC2/Null/DAC_REF/IF_ADC1",
1422         "IF_ADC2/Null/IF_ADC1/DAC_REF",
1423
1424         "DAC_REF/IF_ADC1/IF_ADC2/Null",
1425         "DAC_REF/IF_ADC1/Null/IF_ADC2",
1426         "DAC_REF/IF_ADC2/IF_ADC1/Null",
1427         "DAC_REF/IF_ADC2/Null/IF_ADC1",
1428         "DAC_REF/Null/IF_ADC1/IF_ADC2",
1429         "DAC_REF/Null/IF_ADC2/IF_ADC1",
1430
1431         "Null/IF_ADC1/IF_ADC2/DAC_REF",
1432         "Null/IF_ADC1/DAC_REF/IF_ADC2",
1433         "Null/IF_ADC2/IF_ADC1/DAC_REF",
1434         "Null/IF_ADC2/DAC_REF/IF_ADC1",
1435         "Null/DAC_REF/IF_ADC1/IF_ADC2",
1436         "Null/DAC_REF/IF_ADC2/IF_ADC1",
1437 };
1438
1439 static SOC_ENUM_SINGLE_DECL(
1440         rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1441         0, rt5650_if1_adc_in_src);
1442
1443 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1444         SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1445
1446 /* MX-78 [15:14][13:12][11:10] */
1447 static const char * const rt5645_tdm_adc_swap_select[] = {
1448         "L/R", "R/L", "L/L", "R/R"
1449 };
1450
1451 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1452         RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1453
1454 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1455         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1456
1457 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1458         RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1459
1460 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1461         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1462
1463 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1464         RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1465
1466 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1467         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1468
1469 /* MX-77 [7:6][5:4][3:2] */
1470 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1471         RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1472
1473 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1474         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1475
1476 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1477         RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1478
1479 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1480         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1481
1482 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1483         RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1484
1485 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1486         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1487
1488 /* MX-79 [14:12][10:8][6:4][2:0] */
1489 static const char * const rt5645_tdm_dac_swap_select[] = {
1490         "Slot0", "Slot1", "Slot2", "Slot3"
1491 };
1492
1493 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1494         RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1495
1496 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1497         SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1498
1499 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1500         RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1501
1502 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1503         SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1504
1505 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1506         RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1507
1508 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1509         SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1510
1511 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1512         RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1513
1514 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1515         SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1516
1517 /* MX-7a [14:12][10:8][6:4][2:0] */
1518 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1519         RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1520
1521 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1522         SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1523
1524 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1525         RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1526
1527 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1528         SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1529
1530 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1531         RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1532
1533 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1534         SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1535
1536 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1537         RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1538
1539 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1540         SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1541
1542 /* MX-2d [3] [2] */
1543 static const char * const rt5650_a_dac1_src[] = {
1544         "DAC1", "Stereo DAC Mixer"
1545 };
1546
1547 static SOC_ENUM_SINGLE_DECL(
1548         rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1549         RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1550
1551 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1552         SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1553
1554 static SOC_ENUM_SINGLE_DECL(
1555         rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1556         RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1557
1558 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1559         SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1560
1561 /* MX-2d [1] [0] */
1562 static const char * const rt5650_a_dac2_src[] = {
1563         "Stereo DAC Mixer", "Mono DAC Mixer"
1564 };
1565
1566 static SOC_ENUM_SINGLE_DECL(
1567         rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1568         RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1569
1570 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1571         SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1572
1573 static SOC_ENUM_SINGLE_DECL(
1574         rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1575         RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1576
1577 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1578         SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1579
1580 /* MX-2F [13:12] */
1581 static const char * const rt5645_if2_adc_in_src[] = {
1582         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1583 };
1584
1585 static SOC_ENUM_SINGLE_DECL(
1586         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1587         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1588
1589 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1590         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1591
1592 /* MX-31 [15] [13] [11] [9] */
1593 static const char * const rt5645_pdm_src[] = {
1594         "Mono DAC", "Stereo DAC"
1595 };
1596
1597 static SOC_ENUM_SINGLE_DECL(
1598         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1599         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1600
1601 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1602         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1603
1604 static SOC_ENUM_SINGLE_DECL(
1605         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1606         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1607
1608 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1609         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1610
1611 /* MX-9D [9:8] */
1612 static const char * const rt5645_vad_adc_src[] = {
1613         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1614 };
1615
1616 static SOC_ENUM_SINGLE_DECL(
1617         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1618         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1619
1620 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1621         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1622
1623 static const struct snd_kcontrol_new spk_l_vol_control =
1624         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1625                 RT5645_L_MUTE_SFT, 1, 1);
1626
1627 static const struct snd_kcontrol_new spk_r_vol_control =
1628         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1629                 RT5645_R_MUTE_SFT, 1, 1);
1630
1631 static const struct snd_kcontrol_new hp_l_vol_control =
1632         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1633                 RT5645_L_MUTE_SFT, 1, 1);
1634
1635 static const struct snd_kcontrol_new hp_r_vol_control =
1636         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1637                 RT5645_R_MUTE_SFT, 1, 1);
1638
1639 static const struct snd_kcontrol_new pdm1_l_vol_control =
1640         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1641                 RT5645_M_PDM1_L, 1, 1);
1642
1643 static const struct snd_kcontrol_new pdm1_r_vol_control =
1644         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1645                 RT5645_M_PDM1_R, 1, 1);
1646
1647 static void hp_amp_power(struct snd_soc_component *component, int on)
1648 {
1649         static int hp_amp_power_count;
1650         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1651
1652         if (on) {
1653                 if (hp_amp_power_count <= 0) {
1654                         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1655                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x3100);
1656                                 snd_soc_component_write(component, RT5645_CHARGE_PUMP,
1657                                         0x0e06);
1658                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1659                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1660                                         RT5645_HP_DCC_INT1, 0x9f01);
1661                                 msleep(20);
1662                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1663                                         RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1664                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1665                                         0x3e, 0x7400);
1666                                 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1667                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1668                                         RT5645_MAMP_INT_REG2, 0xfc00);
1669                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1670                                 msleep(90);
1671                                 rt5645->hp_on = true;
1672                         } else {
1673                                 /* depop parameters */
1674                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1675                                         RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1676                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1677                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1678                                         RT5645_HP_DCC_INT1, 0x9f01);
1679                                 mdelay(150);
1680                                 /* headphone amp power on */
1681                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1682                                         RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1683                                 snd_soc_component_update_bits(component, RT5645_PWR_VOL,
1684                                         RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1685                                         RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1686                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1687                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1688                                         RT5645_PWR_HA,
1689                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1690                                         RT5645_PWR_HA);
1691                                 mdelay(5);
1692                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1693                                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
1694                                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
1695
1696                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1697                                         RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1698                                         RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1699                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1700                                         0x14, 0x1aaa);
1701                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1702                                         0x24, 0x0430);
1703                         }
1704                 }
1705                 hp_amp_power_count++;
1706         } else {
1707                 hp_amp_power_count--;
1708                 if (hp_amp_power_count <= 0) {
1709                         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1710                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1711                                         0x3e, 0x7400);
1712                                 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1713                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1714                                         RT5645_MAMP_INT_REG2, 0xfc00);
1715                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1716                                 msleep(100);
1717                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0001);
1718
1719                         } else {
1720                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1721                                         RT5645_HP_SG_MASK |
1722                                         RT5645_HP_L_SMT_MASK |
1723                                         RT5645_HP_R_SMT_MASK,
1724                                         RT5645_HP_SG_DIS |
1725                                         RT5645_HP_L_SMT_DIS |
1726                                         RT5645_HP_R_SMT_DIS);
1727                                 /* headphone amp power down */
1728                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0000);
1729                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1730                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1731                                         RT5645_PWR_HA, 0);
1732                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1733                                         RT5645_DEPOP_MASK, 0);
1734                         }
1735                 }
1736         }
1737 }
1738
1739 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1740         struct snd_kcontrol *kcontrol, int event)
1741 {
1742         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1743         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1744
1745         switch (event) {
1746         case SND_SOC_DAPM_POST_PMU:
1747                 hp_amp_power(component, 1);
1748                 /* headphone unmute sequence */
1749                 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1750                         snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1751                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1752                                 RT5645_CP_FQ3_MASK,
1753                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1754                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1755                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1756                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1757                                 RT5645_MAMP_INT_REG2, 0xfc00);
1758                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1759                                 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1760                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1761                                 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1762                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1763                                 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1764                                 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1765                                 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1766                         msleep(40);
1767                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1768                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1769                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1770                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1771                 }
1772                 break;
1773
1774         case SND_SOC_DAPM_PRE_PMD:
1775                 /* headphone mute sequence */
1776                 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1777                         snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1778                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1779                                 RT5645_CP_FQ3_MASK,
1780                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1781                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1782                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1783                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1784                                 RT5645_MAMP_INT_REG2, 0xfc00);
1785                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1786                                 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1787                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1788                                 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1789                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1790                                 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1791                                 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1792                                 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1793                         msleep(30);
1794                 }
1795                 hp_amp_power(component, 0);
1796                 break;
1797
1798         default:
1799                 return 0;
1800         }
1801
1802         return 0;
1803 }
1804
1805 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1806         struct snd_kcontrol *kcontrol, int event)
1807 {
1808         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1809
1810         switch (event) {
1811         case SND_SOC_DAPM_POST_PMU:
1812                 rt5645_enable_hweq(component);
1813                 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1814                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1815                         RT5645_PWR_CLS_D_L,
1816                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1817                         RT5645_PWR_CLS_D_L);
1818                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1819                         RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
1820                 break;
1821
1822         case SND_SOC_DAPM_PRE_PMD:
1823                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1824                         RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
1825                 snd_soc_component_write(component, RT5645_EQ_CTRL2, 0);
1826                 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1827                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1828                         RT5645_PWR_CLS_D_L, 0);
1829                 break;
1830
1831         default:
1832                 return 0;
1833         }
1834
1835         return 0;
1836 }
1837
1838 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1839         struct snd_kcontrol *kcontrol, int event)
1840 {
1841         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1842
1843         switch (event) {
1844         case SND_SOC_DAPM_POST_PMU:
1845                 hp_amp_power(component, 1);
1846                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1847                         RT5645_PWR_LM, RT5645_PWR_LM);
1848                 snd_soc_component_update_bits(component, RT5645_LOUT1,
1849                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1850                 break;
1851
1852         case SND_SOC_DAPM_PRE_PMD:
1853                 snd_soc_component_update_bits(component, RT5645_LOUT1,
1854                         RT5645_L_MUTE | RT5645_R_MUTE,
1855                         RT5645_L_MUTE | RT5645_R_MUTE);
1856                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1857                         RT5645_PWR_LM, 0);
1858                 hp_amp_power(component, 0);
1859                 break;
1860
1861         default:
1862                 return 0;
1863         }
1864
1865         return 0;
1866 }
1867
1868 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1869         struct snd_kcontrol *kcontrol, int event)
1870 {
1871         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1872
1873         switch (event) {
1874         case SND_SOC_DAPM_POST_PMU:
1875                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1876                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1877                 break;
1878
1879         case SND_SOC_DAPM_PRE_PMD:
1880                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1881                         RT5645_PWR_BST2_P, 0);
1882                 break;
1883
1884         default:
1885                 return 0;
1886         }
1887
1888         return 0;
1889 }
1890
1891 static int rt5650_hp_event(struct snd_soc_dapm_widget *w,
1892                 struct snd_kcontrol *k, int  event)
1893 {
1894         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1895         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1896
1897         switch (event) {
1898         case SND_SOC_DAPM_POST_PMU:
1899                 if (rt5645->hp_on) {
1900                         msleep(100);
1901                         rt5645->hp_on = false;
1902                 }
1903                 break;
1904
1905         default:
1906                 return 0;
1907         }
1908
1909         return 0;
1910 }
1911
1912 static int rt5645_set_micbias1_event(struct snd_soc_dapm_widget *w,
1913                 struct snd_kcontrol *k, int  event)
1914 {
1915         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1916
1917         switch (event) {
1918         case SND_SOC_DAPM_PRE_PMU:
1919                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1920                         RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1921                         RT5645_MICBIAS1_POW_CTRL_SEL_M);
1922                 break;
1923
1924         case SND_SOC_DAPM_POST_PMD:
1925                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1926                         RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1927                         RT5645_MICBIAS1_POW_CTRL_SEL_A);
1928                 break;
1929
1930         default:
1931                 return 0;
1932         }
1933
1934         return 0;
1935 }
1936
1937 static int rt5645_set_micbias2_event(struct snd_soc_dapm_widget *w,
1938                 struct snd_kcontrol *k, int  event)
1939 {
1940         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1941
1942         switch (event) {
1943         case SND_SOC_DAPM_PRE_PMU:
1944                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1945                         RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1946                         RT5645_MICBIAS2_POW_CTRL_SEL_M);
1947                 break;
1948
1949         case SND_SOC_DAPM_POST_PMD:
1950                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1951                         RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1952                         RT5645_MICBIAS2_POW_CTRL_SEL_A);
1953                 break;
1954
1955         default:
1956                 return 0;
1957         }
1958
1959         return 0;
1960 }
1961
1962 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1963         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1964                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1965         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1966                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1967
1968         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1969                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1970         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1971                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1972
1973         /* ASRC */
1974         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1975                               11, 0, NULL, 0),
1976         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1977                               12, 0, NULL, 0),
1978         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1979                               10, 0, NULL, 0),
1980         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1981                               9, 0, NULL, 0),
1982         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1983                               8, 0, NULL, 0),
1984         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1985                               7, 0, NULL, 0),
1986         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1987                               5, 0, NULL, 0),
1988         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1989                               4, 0, NULL, 0),
1990         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1991                               3, 0, NULL, 0),
1992         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1993                               1, 0, NULL, 0),
1994         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1995                               0, 0, NULL, 0),
1996
1997         /* Input Side */
1998         /* micbias */
1999         SND_SOC_DAPM_SUPPLY("micbias1", RT5645_PWR_ANLG2,
2000                         RT5645_PWR_MB1_BIT, 0, rt5645_set_micbias1_event,
2001                         SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2002         SND_SOC_DAPM_SUPPLY("micbias2", RT5645_PWR_ANLG2,
2003                         RT5645_PWR_MB2_BIT, 0, rt5645_set_micbias2_event,
2004                         SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2005         /* Input Lines */
2006         SND_SOC_DAPM_INPUT("DMIC L1"),
2007         SND_SOC_DAPM_INPUT("DMIC R1"),
2008         SND_SOC_DAPM_INPUT("DMIC L2"),
2009         SND_SOC_DAPM_INPUT("DMIC R2"),
2010
2011         SND_SOC_DAPM_INPUT("IN1P"),
2012         SND_SOC_DAPM_INPUT("IN1N"),
2013         SND_SOC_DAPM_INPUT("IN2P"),
2014         SND_SOC_DAPM_INPUT("IN2N"),
2015
2016         SND_SOC_DAPM_INPUT("Haptic Generator"),
2017
2018         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2019         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2020         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2021                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2022         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
2023                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
2024         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
2025                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
2026         /* Boost */
2027         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
2028                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
2029         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
2030                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
2031                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2032         /* Input Volume */
2033         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
2034                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
2035         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
2036                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
2037         /* REC Mixer */
2038         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
2039                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
2040         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
2041                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
2042         /* ADCs */
2043         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
2044         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
2045
2046         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
2047                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
2048         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
2049                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
2050
2051         /* ADC Mux */
2052         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2053                 &rt5645_sto1_dmic_mux),
2054         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2055                 &rt5645_sto_adc2_mux),
2056         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2057                 &rt5645_sto_adc2_mux),
2058         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2059                 &rt5645_sto_adc1_mux),
2060         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2061                 &rt5645_sto_adc1_mux),
2062         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2063                 &rt5645_mono_dmic_l_mux),
2064         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2065                 &rt5645_mono_dmic_r_mux),
2066         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2067                 &rt5645_mono_adc_l2_mux),
2068         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2069                 &rt5645_mono_adc_l1_mux),
2070         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2071                 &rt5645_mono_adc_r1_mux),
2072         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2073                 &rt5645_mono_adc_r2_mux),
2074         /* ADC Mixer */
2075
2076         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
2077                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
2078         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2079                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
2080                 NULL, 0),
2081         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2082                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
2083                 NULL, 0),
2084         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
2085                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2086         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2087                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
2088                 NULL, 0),
2089         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
2090                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2091         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2092                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
2093                 NULL, 0),
2094
2095         /* ADC PGA */
2096         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2097         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2098         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2099         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2100         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2101         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2102         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2103         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2104         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2105         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2106
2107         /* IF1 2 Mux */
2108         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
2109                 0, 0, &rt5645_if2_adc_in_mux),
2110
2111         /* Digital Interface */
2112         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
2113                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
2114         SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
2115         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2116         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2117         SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2118         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2119         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2120         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2121         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
2122                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
2123         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2124         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2125         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2126         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2127
2128         /* Digital Interface Select */
2129         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
2130                 0, 0, &rt5645_vad_adc_mux),
2131
2132         /* Audio Interface */
2133         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2134         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2135         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2136         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2137
2138         /* Output Side */
2139         /* DAC mixer before sound effect  */
2140         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2141                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
2142         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2143                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
2144
2145         /* DAC2 channel Mux */
2146         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
2147         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
2148         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
2149                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
2150         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
2151                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
2152
2153         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
2154         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
2155
2156         /* DAC Mixer */
2157         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
2158                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
2159         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
2160                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2161         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
2162                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2163         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2164                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
2165         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2166                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
2167         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2168                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
2169         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2170                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
2171         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2172                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
2173         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2174                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
2175
2176         /* DACs */
2177         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
2178                 0),
2179         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
2180                 0),
2181         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
2182                 0),
2183         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
2184                 0),
2185         /* OUT Mixer */
2186         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
2187                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
2188         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
2189                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
2190         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
2191                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
2192         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
2193                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
2194         /* Ouput Volume */
2195         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
2196                 &spk_l_vol_control),
2197         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
2198                 &spk_r_vol_control),
2199         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
2200                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
2201         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
2202                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
2203         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
2204                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
2205         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
2206                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
2207         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
2208         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
2209         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
2210         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
2211         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
2212
2213         /* HPO/LOUT/Mono Mixer */
2214         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
2215                 ARRAY_SIZE(rt5645_spo_l_mix)),
2216         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
2217                 ARRAY_SIZE(rt5645_spo_r_mix)),
2218         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
2219                 ARRAY_SIZE(rt5645_hpo_mix)),
2220         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
2221                 ARRAY_SIZE(rt5645_lout_mix)),
2222
2223         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
2224                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2225         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
2226                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2227         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
2228                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2229
2230         /* PDM */
2231         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
2232                 0, NULL, 0),
2233         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
2234         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
2235
2236         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
2237         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
2238
2239         /* Output Lines */
2240         SND_SOC_DAPM_OUTPUT("HPOL"),
2241         SND_SOC_DAPM_OUTPUT("HPOR"),
2242         SND_SOC_DAPM_OUTPUT("LOUTL"),
2243         SND_SOC_DAPM_OUTPUT("LOUTR"),
2244         SND_SOC_DAPM_OUTPUT("PDM1L"),
2245         SND_SOC_DAPM_OUTPUT("PDM1R"),
2246         SND_SOC_DAPM_OUTPUT("SPOL"),
2247         SND_SOC_DAPM_OUTPUT("SPOR"),
2248         SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event),
2249 };
2250
2251 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
2252         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2253                 &rt5645_if1_dac0_tdm_sel_mux),
2254         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2255                 &rt5645_if1_dac1_tdm_sel_mux),
2256         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2257                 &rt5645_if1_dac2_tdm_sel_mux),
2258         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2259                 &rt5645_if1_dac3_tdm_sel_mux),
2260         SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
2261                 0, 0, &rt5645_if1_adc_in_mux),
2262         SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2263                 0, 0, &rt5645_if1_adc1_in_mux),
2264         SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2265                 0, 0, &rt5645_if1_adc2_in_mux),
2266         SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2267                 0, 0, &rt5645_if1_adc3_in_mux),
2268 };
2269
2270 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
2271         SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
2272                 0, 0, &rt5650_a_dac1_l_mux),
2273         SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
2274                 0, 0, &rt5650_a_dac1_r_mux),
2275         SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
2276                 0, 0, &rt5650_a_dac2_l_mux),
2277         SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
2278                 0, 0, &rt5650_a_dac2_r_mux),
2279
2280         SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2281                 0, 0, &rt5650_if1_adc1_in_mux),
2282         SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2283                 0, 0, &rt5650_if1_adc2_in_mux),
2284         SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2285                 0, 0, &rt5650_if1_adc3_in_mux),
2286         SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
2287                 0, 0, &rt5650_if1_adc_in_mux),
2288
2289         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2290                 &rt5650_if1_dac0_tdm_sel_mux),
2291         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2292                 &rt5650_if1_dac1_tdm_sel_mux),
2293         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2294                 &rt5650_if1_dac2_tdm_sel_mux),
2295         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2296                 &rt5650_if1_dac3_tdm_sel_mux),
2297 };
2298
2299 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
2300         { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2301         { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
2302         { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
2303         { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
2304         { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
2305         { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
2306
2307         { "I2S1", NULL, "I2S1 ASRC" },
2308         { "I2S2", NULL, "I2S2 ASRC" },
2309
2310         { "IN1P", NULL, "LDO2" },
2311         { "IN2P", NULL, "LDO2" },
2312
2313         { "DMIC1", NULL, "DMIC L1" },
2314         { "DMIC1", NULL, "DMIC R1" },
2315         { "DMIC2", NULL, "DMIC L2" },
2316         { "DMIC2", NULL, "DMIC R2" },
2317
2318         { "BST1", NULL, "IN1P" },
2319         { "BST1", NULL, "IN1N" },
2320         { "BST1", NULL, "JD Power" },
2321         { "BST1", NULL, "Mic Det Power" },
2322         { "BST2", NULL, "IN2P" },
2323         { "BST2", NULL, "IN2N" },
2324
2325         { "INL VOL", NULL, "IN2P" },
2326         { "INR VOL", NULL, "IN2N" },
2327
2328         { "RECMIXL", "HPOL Switch", "HPOL" },
2329         { "RECMIXL", "INL Switch", "INL VOL" },
2330         { "RECMIXL", "BST2 Switch", "BST2" },
2331         { "RECMIXL", "BST1 Switch", "BST1" },
2332         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2333
2334         { "RECMIXR", "HPOR Switch", "HPOR" },
2335         { "RECMIXR", "INR Switch", "INR VOL" },
2336         { "RECMIXR", "BST2 Switch", "BST2" },
2337         { "RECMIXR", "BST1 Switch", "BST1" },
2338         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2339
2340         { "ADC L", NULL, "RECMIXL" },
2341         { "ADC L", NULL, "ADC L power" },
2342         { "ADC R", NULL, "RECMIXR" },
2343         { "ADC R", NULL, "ADC R power" },
2344
2345         {"DMIC L1", NULL, "DMIC CLK"},
2346         {"DMIC L1", NULL, "DMIC1 Power"},
2347         {"DMIC R1", NULL, "DMIC CLK"},
2348         {"DMIC R1", NULL, "DMIC1 Power"},
2349         {"DMIC L2", NULL, "DMIC CLK"},
2350         {"DMIC L2", NULL, "DMIC2 Power"},
2351         {"DMIC R2", NULL, "DMIC CLK"},
2352         {"DMIC R2", NULL, "DMIC2 Power"},
2353
2354         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2355         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2356         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2357
2358         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2359         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2360         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2361
2362         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2363         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2364         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2365
2366         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2367         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2368         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2369         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2370
2371         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2372         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2373         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2374         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2375
2376         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2377         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2378         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2379         { "Mono ADC L1 Mux", "ADC", "ADC L" },
2380
2381         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2382         { "Mono ADC R1 Mux", "ADC", "ADC R" },
2383         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2384         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2385
2386         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2387         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2388         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2389         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2390
2391         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2392         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2393         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2394
2395         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2396         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2397         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2398
2399         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2400         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2401         { "Mono ADC MIXL", NULL, "adc mono left filter" },
2402         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2403
2404         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2405         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2406         { "Mono ADC MIXR", NULL, "adc mono right filter" },
2407         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2408
2409         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2410         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2411         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2412
2413         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2414         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2415         { "IF_ADC2", NULL, "Mono ADC MIXL" },
2416         { "IF_ADC2", NULL, "Mono ADC MIXR" },
2417         { "VAD_ADC", NULL, "VAD ADC Mux" },
2418
2419         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2420         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2421         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2422
2423         { "IF1 ADC", NULL, "I2S1" },
2424         { "IF2 ADC", NULL, "I2S2" },
2425         { "IF2 ADC", NULL, "IF2 ADC Mux" },
2426
2427         { "AIF2TX", NULL, "IF2 ADC" },
2428
2429         { "IF1 DAC0", NULL, "AIF1RX" },
2430         { "IF1 DAC1", NULL, "AIF1RX" },
2431         { "IF1 DAC2", NULL, "AIF1RX" },
2432         { "IF1 DAC3", NULL, "AIF1RX" },
2433         { "IF2 DAC", NULL, "AIF2RX" },
2434
2435         { "IF1 DAC0", NULL, "I2S1" },
2436         { "IF1 DAC1", NULL, "I2S1" },
2437         { "IF1 DAC2", NULL, "I2S1" },
2438         { "IF1 DAC3", NULL, "I2S1" },
2439         { "IF2 DAC", NULL, "I2S2" },
2440
2441         { "IF2 DAC L", NULL, "IF2 DAC" },
2442         { "IF2 DAC R", NULL, "IF2 DAC" },
2443
2444         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2445         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2446
2447         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2448         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2449         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2450         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2451         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2452         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2453
2454         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2455         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2456         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2457         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2458         { "DAC L2 Volume", NULL, "dac mono left filter" },
2459
2460         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2461         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2462         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2463         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2464         { "DAC R2 Volume", NULL, "dac mono right filter" },
2465
2466         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2467         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2468         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2469         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2470         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2471         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2472         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2473         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2474
2475         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2476         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2477         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2478         { "Mono DAC MIXL", NULL, "dac mono left filter" },
2479         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2480         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2481         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2482         { "Mono DAC MIXR", NULL, "dac mono right filter" },
2483
2484         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2485         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2486         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2487         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2488         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2489         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2490
2491         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2492         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2493         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2494         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2495
2496         { "SPK MIXL", "BST1 Switch", "BST1" },
2497         { "SPK MIXL", "INL Switch", "INL VOL" },
2498         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2499         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2500         { "SPK MIXR", "BST2 Switch", "BST2" },
2501         { "SPK MIXR", "INR Switch", "INR VOL" },
2502         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2503         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2504
2505         { "OUT MIXL", "BST1 Switch", "BST1" },
2506         { "OUT MIXL", "INL Switch", "INL VOL" },
2507         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2508         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2509
2510         { "OUT MIXR", "BST2 Switch", "BST2" },
2511         { "OUT MIXR", "INR Switch", "INR VOL" },
2512         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2513         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2514
2515         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2516         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2517         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2518         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2519         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2520         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2521         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2522         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2523         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2524         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2525
2526         { "DAC 2", NULL, "DAC L2" },
2527         { "DAC 2", NULL, "DAC R2" },
2528         { "DAC 1", NULL, "DAC L1" },
2529         { "DAC 1", NULL, "DAC R1" },
2530         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2531         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2532         { "HPOVOL", NULL, "HPOVOL L" },
2533         { "HPOVOL", NULL, "HPOVOL R" },
2534         { "HPO MIX", "DAC1 Switch", "DAC 1" },
2535         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2536
2537         { "SPKVOL L", "Switch", "SPK MIXL" },
2538         { "SPKVOL R", "Switch", "SPK MIXR" },
2539
2540         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2541         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2542         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2543         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2544
2545         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2546         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2547         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2548         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2549
2550         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2551         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2552         { "PDM1 L Mux", NULL, "PDM1 Power" },
2553         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2554         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2555         { "PDM1 R Mux", NULL, "PDM1 Power" },
2556
2557         { "HP amp", NULL, "HPO MIX" },
2558         { "HP amp", NULL, "JD Power" },
2559         { "HP amp", NULL, "Mic Det Power" },
2560         { "HP amp", NULL, "LDO2" },
2561         { "HPOL", NULL, "HP amp" },
2562         { "HPOR", NULL, "HP amp" },
2563
2564         { "LOUT amp", NULL, "LOUT MIX" },
2565         { "LOUTL", NULL, "LOUT amp" },
2566         { "LOUTR", NULL, "LOUT amp" },
2567
2568         { "PDM1 L", "Switch", "PDM1 L Mux" },
2569         { "PDM1 R", "Switch", "PDM1 R Mux" },
2570
2571         { "PDM1L", NULL, "PDM1 L" },
2572         { "PDM1R", NULL, "PDM1 R" },
2573
2574         { "SPK amp", NULL, "SPOL MIX" },
2575         { "SPK amp", NULL, "SPOR MIX" },
2576         { "SPOL", NULL, "SPK amp" },
2577         { "SPOR", NULL, "SPK amp" },
2578 };
2579
2580 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2581         { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2582         { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2583         { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2584         { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2585
2586         { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2587         { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2588         { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2589         { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2590
2591         { "DAC L1", NULL, "A DAC1 L Mux" },
2592         { "DAC R1", NULL, "A DAC1 R Mux" },
2593         { "DAC L2", NULL, "A DAC2 L Mux" },
2594         { "DAC R2", NULL, "A DAC2 R Mux" },
2595
2596         { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2597         { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2598         { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2599         { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2600
2601         { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2602         { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2603         { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2604         { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2605
2606         { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2607         { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2608         { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2609         { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2610
2611         { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2612         { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2613         { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2614
2615         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2616         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2617         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2618         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2619         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2620         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2621
2622         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2623         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2624         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2625         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2626         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2627         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2628
2629         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2630         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2631         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2632         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2633         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2634         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2635
2636         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2637         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2638         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2639         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2640         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2641         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2642         { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2643
2644         { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2645         { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2646         { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2647         { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2648
2649         { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2650         { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2651         { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2652         { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2653
2654         { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2655         { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2656         { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2657         { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2658
2659         { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2660         { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2661         { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2662         { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2663
2664         { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2665         { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2666
2667         { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2668         { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2669 };
2670
2671 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2672         { "DAC L1", NULL, "Stereo DAC MIXL" },
2673         { "DAC R1", NULL, "Stereo DAC MIXR" },
2674         { "DAC L2", NULL, "Mono DAC MIXL" },
2675         { "DAC R2", NULL, "Mono DAC MIXR" },
2676
2677         { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2678         { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2679         { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2680         { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2681
2682         { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2683         { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2684         { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2685         { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2686
2687         { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2688         { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2689         { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2690         { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2691
2692         { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2693         { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2694         { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2695
2696         { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2697         { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2698         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2699         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2700         { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2701
2702         { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2703         { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2704         { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2705         { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2706
2707         { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2708         { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2709         { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2710         { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2711
2712         { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2713         { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2714         { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2715         { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2716
2717         { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2718         { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2719         { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2720         { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2721
2722         { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2723         { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2724
2725         { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2726         { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2727 };
2728
2729 static const struct snd_soc_dapm_route rt5645_old_dapm_routes[] = {
2730         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2731         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2732 };
2733
2734 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2735         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2736 {
2737         struct snd_soc_component *component = dai->component;
2738         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2739         unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2740         int pre_div, bclk_ms, frame_size;
2741
2742         rt5645->lrck[dai->id] = params_rate(params);
2743         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2744         if (pre_div < 0) {
2745                 dev_err(component->dev, "Unsupported clock setting\n");
2746                 return -EINVAL;
2747         }
2748         frame_size = snd_soc_params_to_frame_size(params);
2749         if (frame_size < 0) {
2750                 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2751                 return -EINVAL;
2752         }
2753
2754         switch (rt5645->codec_type) {
2755         case CODEC_TYPE_RT5650:
2756                 dl_sft = 4;
2757                 break;
2758         default:
2759                 dl_sft = 2;
2760                 break;
2761         }
2762
2763         bclk_ms = frame_size > 32;
2764         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2765
2766         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2767                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2768         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2769                                 bclk_ms, pre_div, dai->id);
2770
2771         switch (params_width(params)) {
2772         case 16:
2773                 break;
2774         case 20:
2775                 val_len = 0x1;
2776                 break;
2777         case 24:
2778                 val_len = 0x2;
2779                 break;
2780         case 8:
2781                 val_len = 0x3;
2782                 break;
2783         default:
2784                 return -EINVAL;
2785         }
2786
2787         switch (dai->id) {
2788         case RT5645_AIF1:
2789                 mask_clk = RT5645_I2S_PD1_MASK;
2790                 val_clk = pre_div << RT5645_I2S_PD1_SFT;
2791                 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2792                         (0x3 << dl_sft), (val_len << dl_sft));
2793                 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2794                 break;
2795         case  RT5645_AIF2:
2796                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2797                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2798                         pre_div << RT5645_I2S_PD2_SFT;
2799                 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2800                         (0x3 << dl_sft), (val_len << dl_sft));
2801                 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2802                 break;
2803         default:
2804                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2805                 return -EINVAL;
2806         }
2807
2808         return 0;
2809 }
2810
2811 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2812 {
2813         struct snd_soc_component *component = dai->component;
2814         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2815         unsigned int reg_val = 0, pol_sft;
2816
2817         switch (rt5645->codec_type) {
2818         case CODEC_TYPE_RT5650:
2819                 pol_sft = 8;
2820                 break;
2821         default:
2822                 pol_sft = 7;
2823                 break;
2824         }
2825
2826         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2827         case SND_SOC_DAIFMT_CBM_CFM:
2828                 rt5645->master[dai->id] = 1;
2829                 break;
2830         case SND_SOC_DAIFMT_CBS_CFS:
2831                 reg_val |= RT5645_I2S_MS_S;
2832                 rt5645->master[dai->id] = 0;
2833                 break;
2834         default:
2835                 return -EINVAL;
2836         }
2837
2838         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2839         case SND_SOC_DAIFMT_NB_NF:
2840                 break;
2841         case SND_SOC_DAIFMT_IB_NF:
2842                 reg_val |= (1 << pol_sft);
2843                 break;
2844         default:
2845                 return -EINVAL;
2846         }
2847
2848         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2849         case SND_SOC_DAIFMT_I2S:
2850                 break;
2851         case SND_SOC_DAIFMT_LEFT_J:
2852                 reg_val |= RT5645_I2S_DF_LEFT;
2853                 break;
2854         case SND_SOC_DAIFMT_DSP_A:
2855                 reg_val |= RT5645_I2S_DF_PCM_A;
2856                 break;
2857         case SND_SOC_DAIFMT_DSP_B:
2858                 reg_val |= RT5645_I2S_DF_PCM_B;
2859                 break;
2860         default:
2861                 return -EINVAL;
2862         }
2863         switch (dai->id) {
2864         case RT5645_AIF1:
2865                 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2866                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2867                         RT5645_I2S_DF_MASK, reg_val);
2868                 break;
2869         case RT5645_AIF2:
2870                 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2871                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2872                         RT5645_I2S_DF_MASK, reg_val);
2873                 break;
2874         default:
2875                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2876                 return -EINVAL;
2877         }
2878         return 0;
2879 }
2880
2881 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2882                 int clk_id, unsigned int freq, int dir)
2883 {
2884         struct snd_soc_component *component = dai->component;
2885         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2886         unsigned int reg_val = 0;
2887
2888         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2889                 return 0;
2890
2891         switch (clk_id) {
2892         case RT5645_SCLK_S_MCLK:
2893                 reg_val |= RT5645_SCLK_SRC_MCLK;
2894                 break;
2895         case RT5645_SCLK_S_PLL1:
2896                 reg_val |= RT5645_SCLK_SRC_PLL1;
2897                 break;
2898         case RT5645_SCLK_S_RCCLK:
2899                 reg_val |= RT5645_SCLK_SRC_RCCLK;
2900                 break;
2901         default:
2902                 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2903                 return -EINVAL;
2904         }
2905         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2906                 RT5645_SCLK_SRC_MASK, reg_val);
2907         rt5645->sysclk = freq;
2908         rt5645->sysclk_src = clk_id;
2909
2910         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2911
2912         return 0;
2913 }
2914
2915 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2916                         unsigned int freq_in, unsigned int freq_out)
2917 {
2918         struct snd_soc_component *component = dai->component;
2919         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2920         struct rl6231_pll_code pll_code;
2921         int ret;
2922
2923         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2924             freq_out == rt5645->pll_out)
2925                 return 0;
2926
2927         if (!freq_in || !freq_out) {
2928                 dev_dbg(component->dev, "PLL disabled\n");
2929
2930                 rt5645->pll_in = 0;
2931                 rt5645->pll_out = 0;
2932                 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2933                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2934                 return 0;
2935         }
2936
2937         switch (source) {
2938         case RT5645_PLL1_S_MCLK:
2939                 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2940                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2941                 break;
2942         case RT5645_PLL1_S_BCLK1:
2943         case RT5645_PLL1_S_BCLK2:
2944                 switch (dai->id) {
2945                 case RT5645_AIF1:
2946                         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2947                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2948                         break;
2949                 case  RT5645_AIF2:
2950                         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2951                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2952                         break;
2953                 default:
2954                         dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2955                         return -EINVAL;
2956                 }
2957                 break;
2958         default:
2959                 dev_err(component->dev, "Unknown PLL source %d\n", source);
2960                 return -EINVAL;
2961         }
2962
2963         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2964         if (ret < 0) {
2965                 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
2966                 return ret;
2967         }
2968
2969         dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2970                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2971                 pll_code.n_code, pll_code.k_code);
2972
2973         snd_soc_component_write(component, RT5645_PLL_CTRL1,
2974                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2975         snd_soc_component_write(component, RT5645_PLL_CTRL2,
2976                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2977                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2978
2979         rt5645->pll_in = freq_in;
2980         rt5645->pll_out = freq_out;
2981         rt5645->pll_src = source;
2982
2983         return 0;
2984 }
2985
2986 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2987                         unsigned int rx_mask, int slots, int slot_width)
2988 {
2989         struct snd_soc_component *component = dai->component;
2990         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2991         unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2992         unsigned int mask, val = 0;
2993
2994         switch (rt5645->codec_type) {
2995         case CODEC_TYPE_RT5650:
2996                 en_sft = 15;
2997                 i_slot_sft = 10;
2998                 o_slot_sft = 8;
2999                 i_width_sht = 6;
3000                 o_width_sht = 4;
3001                 mask = 0x8ff0;
3002                 break;
3003         default:
3004                 en_sft = 14;
3005                 i_slot_sft = o_slot_sft = 12;
3006                 i_width_sht = o_width_sht = 10;
3007                 mask = 0x7c00;
3008                 break;
3009         }
3010         if (rx_mask || tx_mask) {
3011                 val |= (1 << en_sft);
3012                 if (rt5645->codec_type == CODEC_TYPE_RT5645)
3013                         snd_soc_component_update_bits(component, RT5645_BASS_BACK,
3014                                 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
3015         }
3016
3017         switch (slots) {
3018         case 4:
3019                 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
3020                 break;
3021         case 6:
3022                 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
3023                 break;
3024         case 8:
3025                 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
3026                 break;
3027         case 2:
3028         default:
3029                 break;
3030         }
3031
3032         switch (slot_width) {
3033         case 20:
3034                 val |= (1 << i_width_sht) | (1 << o_width_sht);
3035                 break;
3036         case 24:
3037                 val |= (2 << i_width_sht) | (2 << o_width_sht);
3038                 break;
3039         case 32:
3040                 val |= (3 << i_width_sht) | (3 << o_width_sht);
3041                 break;
3042         case 16:
3043         default:
3044                 break;
3045         }
3046
3047         snd_soc_component_update_bits(component, RT5645_TDM_CTRL_1, mask, val);
3048
3049         return 0;
3050 }
3051
3052 static int rt5645_set_bias_level(struct snd_soc_component *component,
3053                         enum snd_soc_bias_level level)
3054 {
3055         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3056
3057         switch (level) {
3058         case SND_SOC_BIAS_PREPARE:
3059                 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
3060                         snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3061                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3062                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
3063                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3064                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
3065                         mdelay(10);
3066                         snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3067                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
3068                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
3069                         snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3070                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3071                 }
3072                 break;
3073
3074         case SND_SOC_BIAS_STANDBY:
3075                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3076                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
3077                         RT5645_PWR_BG | RT5645_PWR_VREF2,
3078                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
3079                         RT5645_PWR_BG | RT5645_PWR_VREF2);
3080                 mdelay(10);
3081                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3082                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
3083                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
3084                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
3085                         snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
3086                         msleep(40);
3087                         if (rt5645->en_button_func)
3088                                 queue_delayed_work(system_power_efficient_wq,
3089                                         &rt5645->jack_detect_work,
3090                                         msecs_to_jiffies(0));
3091                 }
3092                 break;
3093
3094         case SND_SOC_BIAS_OFF:
3095                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1100);
3096                 if (!rt5645->en_button_func)
3097                         snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3098                                         RT5645_DIG_GATE_CTRL, 0);
3099                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3100                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3101                                 RT5645_PWR_BG | RT5645_PWR_VREF2 |
3102                                 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
3103                 break;
3104
3105         default:
3106                 break;
3107         }
3108
3109         return 0;
3110 }
3111
3112 static void rt5645_enable_push_button_irq(struct snd_soc_component *component,
3113         bool enable)
3114 {
3115         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3116
3117         if (enable) {
3118                 snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
3119                 snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
3120                 snd_soc_dapm_sync(dapm);
3121
3122                 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
3123                 snd_soc_component_update_bits(component,
3124                                         RT5645_INT_IRQ_ST, 0x8, 0x8);
3125                 snd_soc_component_update_bits(component,
3126                                         RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
3127                 snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1);
3128                 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
3129                         snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1));
3130         } else {
3131                 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
3132                 snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);
3133
3134                 snd_soc_dapm_disable_pin(dapm, "ADC L power");
3135                 snd_soc_dapm_disable_pin(dapm, "ADC R power");
3136                 snd_soc_dapm_sync(dapm);
3137         }
3138 }
3139
3140 static int rt5645_jack_detect(struct snd_soc_component *component, int jack_insert)
3141 {
3142         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3143         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3144         unsigned int val;
3145
3146         if (jack_insert) {
3147                 regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0e06);
3148
3149                 /* for jack type detect */
3150                 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3151                 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
3152                 snd_soc_dapm_sync(dapm);
3153                 if (!dapm->card->instantiated) {
3154                         /* Power up necessary bits for JD if dapm is
3155                            not ready yet */
3156                         regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
3157                                 RT5645_PWR_MB | RT5645_PWR_VREF2,
3158                                 RT5645_PWR_MB | RT5645_PWR_VREF2);
3159                         regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
3160                                 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
3161                         regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
3162                                 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
3163                 }
3164
3165                 regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
3166                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3167                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3168                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3169                         RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3170                 msleep(100);
3171                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3172                         RT5645_CBJ_MN_JD, 0);
3173
3174                 msleep(600);
3175                 regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3176                 val &= 0x7;
3177                 dev_dbg(component->dev, "val = %d\n", val);
3178
3179                 if (val == 1 || val == 2) {
3180                         rt5645->jack_type = SND_JACK_HEADSET;
3181                         if (rt5645->en_button_func) {
3182                                 rt5645_enable_push_button_irq(component, true);
3183                         }
3184                 } else {
3185                         snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3186                         snd_soc_dapm_sync(dapm);
3187                         rt5645->jack_type = SND_JACK_HEADPHONE;
3188                 }
3189                 if (rt5645->pdata.level_trigger_irq)
3190                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3191                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR);
3192         } else { /* jack out */
3193                 rt5645->jack_type = 0;
3194
3195                 regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
3196                         RT5645_L_MUTE | RT5645_R_MUTE,
3197                         RT5645_L_MUTE | RT5645_R_MUTE);
3198                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3199                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3200                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3201                         RT5645_CBJ_BST1_EN, 0);
3202
3203                 if (rt5645->en_button_func)
3204                         rt5645_enable_push_button_irq(component, false);
3205
3206                 if (rt5645->pdata.jd_mode == 0)
3207                         snd_soc_dapm_disable_pin(dapm, "LDO2");
3208                 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3209                 snd_soc_dapm_sync(dapm);
3210                 if (rt5645->pdata.level_trigger_irq)
3211                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3212                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3213         }
3214
3215         return rt5645->jack_type;
3216 }
3217
3218 static int rt5645_button_detect(struct snd_soc_component *component)
3219 {
3220         int btn_type, val;
3221
3222         val = snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1);
3223         pr_debug("val=0x%x\n", val);
3224         btn_type = val & 0xfff0;
3225         snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, val);
3226
3227         return btn_type;
3228 }
3229
3230 static irqreturn_t rt5645_irq(int irq, void *data);
3231
3232 int rt5645_set_jack_detect(struct snd_soc_component *component,
3233         struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
3234         struct snd_soc_jack *btn_jack)
3235 {
3236         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3237
3238         rt5645->hp_jack = hp_jack;
3239         rt5645->mic_jack = mic_jack;
3240         rt5645->btn_jack = btn_jack;
3241         if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
3242                 rt5645->en_button_func = true;
3243                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3244                                 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3245                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
3246                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3247         }
3248         rt5645_irq(0, rt5645);
3249
3250         return 0;
3251 }
3252 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
3253
3254 static void rt5645_jack_detect_work(struct work_struct *work)
3255 {
3256         struct rt5645_priv *rt5645 =
3257                 container_of(work, struct rt5645_priv, jack_detect_work.work);
3258         int val, btn_type, gpio_state = 0, report = 0;
3259
3260         if (!rt5645->component)
3261                 return;
3262
3263         switch (rt5645->pdata.jd_mode) {
3264         case 0: /* Not using rt5645 JD */
3265                 if (rt5645->gpiod_hp_det) {
3266                         gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
3267                         dev_dbg(rt5645->component->dev, "gpio_state = %d\n",
3268                                 gpio_state);
3269                         report = rt5645_jack_detect(rt5645->component, gpio_state);
3270                 }
3271                 snd_soc_jack_report(rt5645->hp_jack,
3272                                     report, SND_JACK_HEADPHONE);
3273                 snd_soc_jack_report(rt5645->mic_jack,
3274                                     report, SND_JACK_MICROPHONE);
3275                 return;
3276         default: /* read rt5645 jd1_1 status */
3277                 val = snd_soc_component_read32(rt5645->component, RT5645_INT_IRQ_ST) & 0x1000;
3278                 break;
3279
3280         }
3281
3282         if (!val && (rt5645->jack_type == 0)) { /* jack in */
3283                 report = rt5645_jack_detect(rt5645->component, 1);
3284         } else if (!val && rt5645->jack_type != 0) {
3285                 /* for push button and jack out */
3286                 btn_type = 0;
3287                 if (snd_soc_component_read32(rt5645->component, RT5645_INT_IRQ_ST) & 0x4) {
3288                         /* button pressed */
3289                         report = SND_JACK_HEADSET;
3290                         btn_type = rt5645_button_detect(rt5645->component);
3291                         /* rt5650 can report three kinds of button behavior,
3292                            one click, double click and hold. However,
3293                            currently we will report button pressed/released
3294                            event. So all the three button behaviors are
3295                            treated as button pressed. */
3296                         switch (btn_type) {
3297                         case 0x8000:
3298                         case 0x4000:
3299                         case 0x2000:
3300                                 report |= SND_JACK_BTN_0;
3301                                 break;
3302                         case 0x1000:
3303                         case 0x0800:
3304                         case 0x0400:
3305                                 report |= SND_JACK_BTN_1;
3306                                 break;
3307                         case 0x0200:
3308                         case 0x0100:
3309                         case 0x0080:
3310                                 report |= SND_JACK_BTN_2;
3311                                 break;
3312                         case 0x0040:
3313                         case 0x0020:
3314                         case 0x0010:
3315                                 report |= SND_JACK_BTN_3;
3316                                 break;
3317                         case 0x0000: /* unpressed */
3318                                 break;
3319                         default:
3320                                 dev_err(rt5645->component->dev,
3321                                         "Unexpected button code 0x%04x\n",
3322                                         btn_type);
3323                                 break;
3324                         }
3325                 }
3326                 if (btn_type == 0)/* button release */
3327                         report =  rt5645->jack_type;
3328                 else {
3329                         mod_timer(&rt5645->btn_check_timer,
3330                                 msecs_to_jiffies(100));
3331                 }
3332         } else {
3333                 /* jack out */
3334                 report = 0;
3335                 snd_soc_component_update_bits(rt5645->component,
3336                                     RT5645_INT_IRQ_ST, 0x1, 0x0);
3337                 rt5645_jack_detect(rt5645->component, 0);
3338         }
3339
3340         snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
3341         snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
3342         if (rt5645->en_button_func)
3343                 snd_soc_jack_report(rt5645->btn_jack,
3344                         report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3345                                 SND_JACK_BTN_2 | SND_JACK_BTN_3);
3346 }
3347
3348 static void rt5645_rcclock_work(struct work_struct *work)
3349 {
3350         struct rt5645_priv *rt5645 =
3351                 container_of(work, struct rt5645_priv, rcclock_work.work);
3352
3353         regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3354                 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PD);
3355 }
3356
3357 static irqreturn_t rt5645_irq(int irq, void *data)
3358 {
3359         struct rt5645_priv *rt5645 = data;
3360
3361         queue_delayed_work(system_power_efficient_wq,
3362                            &rt5645->jack_detect_work, msecs_to_jiffies(250));
3363
3364         return IRQ_HANDLED;
3365 }
3366
3367 static void rt5645_btn_check_callback(struct timer_list *t)
3368 {
3369         struct rt5645_priv *rt5645 = from_timer(rt5645, t, btn_check_timer);
3370
3371         queue_delayed_work(system_power_efficient_wq,
3372                    &rt5645->jack_detect_work, msecs_to_jiffies(5));
3373 }
3374
3375 static int rt5645_probe(struct snd_soc_component *component)
3376 {
3377         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3378         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3379
3380         rt5645->component = component;
3381
3382         switch (rt5645->codec_type) {
3383         case CODEC_TYPE_RT5645:
3384                 snd_soc_dapm_new_controls(dapm,
3385                         rt5645_specific_dapm_widgets,
3386                         ARRAY_SIZE(rt5645_specific_dapm_widgets));
3387                 snd_soc_dapm_add_routes(dapm,
3388                         rt5645_specific_dapm_routes,
3389                         ARRAY_SIZE(rt5645_specific_dapm_routes));
3390                 if (rt5645->v_id < 3) {
3391                         snd_soc_dapm_add_routes(dapm,
3392                                 rt5645_old_dapm_routes,
3393                                 ARRAY_SIZE(rt5645_old_dapm_routes));
3394                 }
3395                 break;
3396         case CODEC_TYPE_RT5650:
3397                 snd_soc_dapm_new_controls(dapm,
3398                         rt5650_specific_dapm_widgets,
3399                         ARRAY_SIZE(rt5650_specific_dapm_widgets));
3400                 snd_soc_dapm_add_routes(dapm,
3401                         rt5650_specific_dapm_routes,
3402                         ARRAY_SIZE(rt5650_specific_dapm_routes));
3403                 break;
3404         }
3405
3406         snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
3407
3408         /* for JD function */
3409         if (rt5645->pdata.jd_mode) {
3410                 snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3411                 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3412                 snd_soc_dapm_sync(dapm);
3413         }
3414
3415         if (rt5645->pdata.long_name)
3416                 component->card->long_name = rt5645->pdata.long_name;
3417
3418         rt5645->eq_param = devm_kcalloc(component->dev,
3419                 RT5645_HWEQ_NUM, sizeof(struct rt5645_eq_param_s),
3420                 GFP_KERNEL);
3421
3422         if (!rt5645->eq_param)
3423                 return -ENOMEM;
3424
3425         return 0;
3426 }
3427
3428 static void rt5645_remove(struct snd_soc_component *component)
3429 {
3430         rt5645_reset(component);
3431 }
3432
3433 #ifdef CONFIG_PM
3434 static int rt5645_suspend(struct snd_soc_component *component)
3435 {
3436         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3437
3438         regcache_cache_only(rt5645->regmap, true);
3439         regcache_mark_dirty(rt5645->regmap);
3440
3441         return 0;
3442 }
3443
3444 static int rt5645_resume(struct snd_soc_component *component)
3445 {
3446         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3447
3448         regcache_cache_only(rt5645->regmap, false);
3449         regcache_sync(rt5645->regmap);
3450
3451         return 0;
3452 }
3453 #else
3454 #define rt5645_suspend NULL
3455 #define rt5645_resume NULL
3456 #endif
3457
3458 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3459 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3460                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3461
3462 static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3463         .hw_params = rt5645_hw_params,
3464         .set_fmt = rt5645_set_dai_fmt,
3465         .set_sysclk = rt5645_set_dai_sysclk,
3466         .set_tdm_slot = rt5645_set_tdm_slot,
3467         .set_pll = rt5645_set_dai_pll,
3468 };
3469
3470 static struct snd_soc_dai_driver rt5645_dai[] = {
3471         {
3472                 .name = "rt5645-aif1",
3473                 .id = RT5645_AIF1,
3474                 .playback = {
3475                         .stream_name = "AIF1 Playback",
3476                         .channels_min = 1,
3477                         .channels_max = 2,
3478                         .rates = RT5645_STEREO_RATES,
3479                         .formats = RT5645_FORMATS,
3480                 },
3481                 .capture = {
3482                         .stream_name = "AIF1 Capture",
3483                         .channels_min = 1,
3484                         .channels_max = 4,
3485                         .rates = RT5645_STEREO_RATES,
3486                         .formats = RT5645_FORMATS,
3487                 },
3488                 .ops = &rt5645_aif_dai_ops,
3489         },
3490         {
3491                 .name = "rt5645-aif2",
3492                 .id = RT5645_AIF2,
3493                 .playback = {
3494                         .stream_name = "AIF2 Playback",
3495                         .channels_min = 1,
3496                         .channels_max = 2,
3497                         .rates = RT5645_STEREO_RATES,
3498                         .formats = RT5645_FORMATS,
3499                 },
3500                 .capture = {
3501                         .stream_name = "AIF2 Capture",
3502                         .channels_min = 1,
3503                         .channels_max = 2,
3504                         .rates = RT5645_STEREO_RATES,
3505                         .formats = RT5645_FORMATS,
3506                 },
3507                 .ops = &rt5645_aif_dai_ops,
3508         },
3509 };
3510
3511 static const struct snd_soc_component_driver soc_component_dev_rt5645 = {
3512         .probe                  = rt5645_probe,
3513         .remove                 = rt5645_remove,
3514         .suspend                = rt5645_suspend,
3515         .resume                 = rt5645_resume,
3516         .set_bias_level         = rt5645_set_bias_level,
3517         .controls               = rt5645_snd_controls,
3518         .num_controls           = ARRAY_SIZE(rt5645_snd_controls),
3519         .dapm_widgets           = rt5645_dapm_widgets,
3520         .num_dapm_widgets       = ARRAY_SIZE(rt5645_dapm_widgets),
3521         .dapm_routes            = rt5645_dapm_routes,
3522         .num_dapm_routes        = ARRAY_SIZE(rt5645_dapm_routes),
3523         .use_pmdown_time        = 1,
3524         .endianness             = 1,
3525         .non_legacy_dai_naming  = 1,
3526 };
3527
3528 static const struct regmap_config rt5645_regmap = {
3529         .reg_bits = 8,
3530         .val_bits = 16,
3531         .use_single_read = true,
3532         .use_single_write = true,
3533         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3534                                                RT5645_PR_SPACING),
3535         .volatile_reg = rt5645_volatile_register,
3536         .readable_reg = rt5645_readable_register,
3537
3538         .cache_type = REGCACHE_RBTREE,
3539         .reg_defaults = rt5645_reg,
3540         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3541         .ranges = rt5645_ranges,
3542         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3543 };
3544
3545 static const struct regmap_config rt5650_regmap = {
3546         .reg_bits = 8,
3547         .val_bits = 16,
3548         .use_single_read = true,
3549         .use_single_write = true,
3550         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3551                                                RT5645_PR_SPACING),
3552         .volatile_reg = rt5645_volatile_register,
3553         .readable_reg = rt5645_readable_register,
3554
3555         .cache_type = REGCACHE_RBTREE,
3556         .reg_defaults = rt5650_reg,
3557         .num_reg_defaults = ARRAY_SIZE(rt5650_reg),
3558         .ranges = rt5645_ranges,
3559         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3560 };
3561
3562 static const struct regmap_config temp_regmap = {
3563         .name="nocache",
3564         .reg_bits = 8,
3565         .val_bits = 16,
3566         .use_single_read = true,
3567         .use_single_write = true,
3568         .max_register = RT5645_VENDOR_ID2 + 1,
3569         .cache_type = REGCACHE_NONE,
3570 };
3571
3572 static const struct i2c_device_id rt5645_i2c_id[] = {
3573         { "rt5645", 0 },
3574         { "rt5650", 0 },
3575         { }
3576 };
3577 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3578
3579 #ifdef CONFIG_OF
3580 static const struct of_device_id rt5645_of_match[] = {
3581         { .compatible = "realtek,rt5645", },
3582         { .compatible = "realtek,rt5650", },
3583         { }
3584 };
3585 MODULE_DEVICE_TABLE(of, rt5645_of_match);
3586 #endif
3587
3588 #ifdef CONFIG_ACPI
3589 static const struct acpi_device_id rt5645_acpi_match[] = {
3590         { "10EC5645", 0 },
3591         { "10EC5648", 0 },
3592         { "10EC5650", 0 },
3593         { "10EC5640", 0 },
3594         { "10EC3270", 0 },
3595         {},
3596 };
3597 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3598 #endif
3599
3600 static const struct rt5645_platform_data intel_braswell_platform_data = {
3601         .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3602         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3603         .jd_mode = 3,
3604 };
3605
3606 static const struct rt5645_platform_data buddy_platform_data = {
3607         .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3608         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3609         .jd_mode = 3,
3610         .level_trigger_irq = true,
3611 };
3612
3613 static const struct rt5645_platform_data gpd_win_platform_data = {
3614         .jd_mode = 3,
3615         .inv_jd1_1 = true,
3616         .long_name = "gpd-win-pocket-rt5645",
3617         /* The GPD pocket has a diff. mic, for the win this does not matter. */
3618         .in2_diff = true,
3619 };
3620
3621 static const struct rt5645_platform_data asus_t100ha_platform_data = {
3622         .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3623         .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3624         .jd_mode = 3,
3625         .inv_jd1_1 = true,
3626 };
3627
3628 static const struct rt5645_platform_data lenovo_ideapad_miix_310_pdata = {
3629         .jd_mode = 3,
3630         .in2_diff = true,
3631 };
3632
3633 static const struct rt5645_platform_data jd_mode3_platform_data = {
3634         .jd_mode = 3,
3635 };
3636
3637 static const struct rt5645_platform_data lattepanda_board_platform_data = {
3638         .jd_mode = 2,
3639         .inv_jd1_1 = true
3640 };
3641
3642 static const struct dmi_system_id dmi_platform_data[] = {
3643         {
3644                 .ident = "Chrome Buddy",
3645                 .matches = {
3646                         DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"),
3647                 },
3648                 .driver_data = (void *)&buddy_platform_data,
3649         },
3650         {
3651                 .ident = "Intel Strago",
3652                 .matches = {
3653                         DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3654                 },
3655                 .driver_data = (void *)&intel_braswell_platform_data,
3656         },
3657         {
3658                 .ident = "Google Chrome",
3659                 .matches = {
3660                         DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
3661                 },
3662                 .driver_data = (void *)&intel_braswell_platform_data,
3663         },
3664         {
3665                 .ident = "Google Setzer",
3666                 .matches = {
3667                         DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
3668                 },
3669                 .driver_data = (void *)&intel_braswell_platform_data,
3670         },
3671         {
3672                 .ident = "Microsoft Surface 3",
3673                 .matches = {
3674                         DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
3675                 },
3676                 .driver_data = (void *)&intel_braswell_platform_data,
3677         },
3678         {
3679                 /*
3680                  * Match for the GPDwin which unfortunately uses somewhat
3681                  * generic dmi strings, which is why we test for 4 strings.
3682                  * Comparing against 23 other byt/cht boards, board_vendor
3683                  * and board_name are unique to the GPDwin, where as only one
3684                  * other board has the same board_serial and 3 others have
3685                  * the same default product_name. Also the GPDwin is the
3686                  * only device to have both board_ and product_name not set.
3687                  */
3688                 .ident = "GPD Win / Pocket",
3689                 .matches = {
3690                         DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3691                         DMI_MATCH(DMI_BOARD_NAME, "Default string"),
3692                         DMI_MATCH(DMI_BOARD_SERIAL, "Default string"),
3693                         DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3694                 },
3695                 .driver_data = (void *)&gpd_win_platform_data,
3696         },
3697         {
3698                 .ident = "ASUS T100HAN",
3699                 .matches = {
3700                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3701                         DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
3702                 },
3703                 .driver_data = (void *)&asus_t100ha_platform_data,
3704         },
3705         {
3706                 .ident = "MINIX Z83-4",
3707                 .matches = {
3708                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"),
3709                         DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),
3710                 },
3711                 .driver_data = (void *)&jd_mode3_platform_data,
3712         },
3713         {
3714                 .ident = "Teclast X80 Pro",
3715                 .matches = {
3716                         DMI_MATCH(DMI_SYS_VENDOR, "TECLAST"),
3717                         DMI_MATCH(DMI_PRODUCT_NAME, "X80 Pro"),
3718                 },
3719                 .driver_data = (void *)&jd_mode3_platform_data,
3720         },
3721         {
3722                 .ident = "Lenovo Ideapad Miix 310",
3723                 .matches = {
3724                   DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3725                   DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80SG"),
3726                   DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "MIIX 310-10ICR"),
3727                 },
3728                 .driver_data = (void *)&lenovo_ideapad_miix_310_pdata,
3729         },
3730         {
3731                 .ident = "Lenovo Ideapad Miix 320",
3732                 .matches = {
3733                   DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3734                   DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80XF"),
3735                   DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
3736                 },
3737                 .driver_data = (void *)&intel_braswell_platform_data,
3738         },
3739         {
3740                 .ident = "LattePanda board",
3741                 .matches = {
3742                   DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3743                   DMI_EXACT_MATCH(DMI_BOARD_NAME, "Cherry Trail CR"),
3744                   DMI_EXACT_MATCH(DMI_BOARD_VERSION, "Default string"),
3745                 },
3746                 .driver_data = (void *)&lattepanda_board_platform_data,
3747         },
3748         { }
3749 };
3750
3751 static bool rt5645_check_dp(struct device *dev)
3752 {
3753         if (device_property_present(dev, "realtek,in2-differential") ||
3754             device_property_present(dev, "realtek,dmic1-data-pin") ||
3755             device_property_present(dev, "realtek,dmic2-data-pin") ||
3756             device_property_present(dev, "realtek,jd-mode"))
3757                 return true;
3758
3759         return false;
3760 }
3761
3762 static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3763 {
3764         rt5645->pdata.in2_diff = device_property_read_bool(dev,
3765                 "realtek,in2-differential");
3766         device_property_read_u32(dev,
3767                 "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3768         device_property_read_u32(dev,
3769                 "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3770         device_property_read_u32(dev,
3771                 "realtek,jd-mode", &rt5645->pdata.jd_mode);
3772
3773         return 0;
3774 }
3775
3776 static int rt5645_i2c_probe(struct i2c_client *i2c,
3777                     const struct i2c_device_id *id)
3778 {
3779         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
3780         const struct dmi_system_id *dmi_data;
3781         struct rt5645_priv *rt5645;
3782         int ret, i;
3783         unsigned int val;
3784         struct regmap *regmap;
3785
3786         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3787                                 GFP_KERNEL);
3788         if (rt5645 == NULL)
3789                 return -ENOMEM;
3790
3791         rt5645->i2c = i2c;
3792         i2c_set_clientdata(i2c, rt5645);
3793
3794         dmi_data = dmi_first_match(dmi_platform_data);
3795         if (dmi_data) {
3796                 dev_info(&i2c->dev, "Detected %s platform\n", dmi_data->ident);
3797                 pdata = dmi_data->driver_data;
3798         }
3799
3800         if (pdata)
3801                 rt5645->pdata = *pdata;
3802         else if (rt5645_check_dp(&i2c->dev))
3803                 rt5645_parse_dt(rt5645, &i2c->dev);
3804         else
3805                 rt5645->pdata = jd_mode3_platform_data;
3806
3807         if (quirk != -1) {
3808                 rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
3809                 rt5645->pdata.level_trigger_irq = QUIRK_LEVEL_IRQ(quirk);
3810                 rt5645->pdata.inv_jd1_1 = QUIRK_INV_JD1_1(quirk);
3811                 rt5645->pdata.jd_mode = QUIRK_JD_MODE(quirk);
3812                 rt5645->pdata.dmic1_data_pin = QUIRK_DMIC1_DATA_PIN(quirk);
3813                 rt5645->pdata.dmic2_data_pin = QUIRK_DMIC2_DATA_PIN(quirk);
3814         }
3815
3816         rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3817                                                        GPIOD_IN);
3818
3819         if (IS_ERR(rt5645->gpiod_hp_det)) {
3820                 dev_info(&i2c->dev, "failed to initialize gpiod\n");
3821                 ret = PTR_ERR(rt5645->gpiod_hp_det);
3822                 /*
3823                  * Continue if optional gpiod is missing, bail for all other
3824                  * errors, including -EPROBE_DEFER
3825                  */
3826                 if (ret != -ENOENT)
3827                         return ret;
3828         }
3829
3830         for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3831                 rt5645->supplies[i].supply = rt5645_supply_names[i];
3832
3833         ret = devm_regulator_bulk_get(&i2c->dev,
3834                                       ARRAY_SIZE(rt5645->supplies),
3835                                       rt5645->supplies);
3836         if (ret) {
3837                 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3838                 return ret;
3839         }
3840
3841         ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3842                                     rt5645->supplies);
3843         if (ret) {
3844                 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3845                 return ret;
3846         }
3847
3848         regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
3849         if (IS_ERR(regmap)) {
3850                 ret = PTR_ERR(regmap);
3851                 dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n",
3852                         ret);
3853                 return ret;
3854         }
3855
3856         /*
3857          * Read after 400msec, as it is the interval required between
3858          * read and power On.
3859          */
3860         msleep(TIME_TO_POWER_MS);
3861         regmap_read(regmap, RT5645_VENDOR_ID2, &val);
3862
3863         switch (val) {
3864         case RT5645_DEVICE_ID:
3865                 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3866                 rt5645->codec_type = CODEC_TYPE_RT5645;
3867                 break;
3868         case RT5650_DEVICE_ID:
3869                 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5650_regmap);
3870                 rt5645->codec_type = CODEC_TYPE_RT5650;
3871                 break;
3872         default:
3873                 dev_err(&i2c->dev,
3874                         "Device with ID register %#x is not rt5645 or rt5650\n",
3875                         val);
3876                 ret = -ENODEV;
3877                 goto err_enable;
3878         }
3879
3880         if (IS_ERR(rt5645->regmap)) {
3881                 ret = PTR_ERR(rt5645->regmap);
3882                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3883                         ret);
3884                 return ret;
3885         }
3886
3887         regmap_write(rt5645->regmap, RT5645_RESET, 0);
3888
3889         regmap_read(regmap, RT5645_VENDOR_ID, &val);
3890         rt5645->v_id = val & 0xff;
3891
3892         regmap_write(rt5645->regmap, RT5645_AD_DA_MIXER, 0x8080);
3893
3894         ret = regmap_register_patch(rt5645->regmap, init_list,
3895                                     ARRAY_SIZE(init_list));
3896         if (ret != 0)
3897                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3898
3899         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3900                 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3901                                     ARRAY_SIZE(rt5650_init_list));
3902                 if (ret != 0)
3903                         dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
3904                                            ret);
3905         }
3906
3907         regmap_update_bits(rt5645->regmap, RT5645_CLSD_OUT_CTRL, 0xc0, 0xc0);
3908
3909         if (rt5645->pdata.in2_diff)
3910                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
3911                                         RT5645_IN_DF2, RT5645_IN_DF2);
3912
3913         if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
3914                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3915                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
3916         }
3917         switch (rt5645->pdata.dmic1_data_pin) {
3918         case RT5645_DMIC_DATA_IN2N:
3919                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3920                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
3921                 break;
3922
3923         case RT5645_DMIC_DATA_GPIO5:
3924                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3925                         RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
3926                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3927                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3928                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3929                         RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
3930                 break;
3931
3932         case RT5645_DMIC_DATA_GPIO11:
3933                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3934                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
3935                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3936                         RT5645_GP11_PIN_MASK,
3937                         RT5645_GP11_PIN_DMIC1_SDA);
3938                 break;
3939
3940         default:
3941                 break;
3942         }
3943
3944         switch (rt5645->pdata.dmic2_data_pin) {
3945         case RT5645_DMIC_DATA_IN2P:
3946                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3947                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3948                 break;
3949
3950         case RT5645_DMIC_DATA_GPIO6:
3951                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3952                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3953                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3954                         RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3955                 break;
3956
3957         case RT5645_DMIC_DATA_GPIO10:
3958                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3959                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3960                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3961                         RT5645_GP10_PIN_MASK,
3962                         RT5645_GP10_PIN_DMIC2_SDA);
3963                 break;
3964
3965         case RT5645_DMIC_DATA_GPIO12:
3966                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3967                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
3968                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3969                         RT5645_GP12_PIN_MASK,
3970                         RT5645_GP12_PIN_DMIC2_SDA);
3971                 break;
3972
3973         default:
3974                 break;
3975         }
3976
3977         if (rt5645->pdata.jd_mode) {
3978                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3979                                    RT5645_IRQ_CLK_GATE_CTRL,
3980                                    RT5645_IRQ_CLK_GATE_CTRL);
3981                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3982                                    RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
3983                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3984                                    RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
3985                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3986                                    RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
3987                 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
3988                                    RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
3989                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3990                                    RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
3991                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3992                                    RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3993                 switch (rt5645->pdata.jd_mode) {
3994                 case 1:
3995                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3996                                            RT5645_JD1_MODE_MASK,
3997                                            RT5645_JD1_MODE_0);
3998                         break;
3999                 case 2:
4000                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4001                                            RT5645_JD1_MODE_MASK,
4002                                            RT5645_JD1_MODE_1);
4003                         break;
4004                 case 3:
4005                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4006                                            RT5645_JD1_MODE_MASK,
4007                                            RT5645_JD1_MODE_2);
4008                         break;
4009                 default:
4010                         break;
4011                 }
4012                 if (rt5645->pdata.inv_jd1_1) {
4013                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4014                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4015                 }
4016         }
4017
4018         regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
4019                 RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
4020
4021         if (rt5645->pdata.level_trigger_irq) {
4022                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4023                         RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4024         }
4025         timer_setup(&rt5645->btn_check_timer, rt5645_btn_check_callback, 0);
4026
4027         INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
4028         INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);
4029
4030         if (rt5645->i2c->irq) {
4031                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
4032                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4033                         | IRQF_ONESHOT, "rt5645", rt5645);
4034                 if (ret) {
4035                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4036                         goto err_enable;
4037                 }
4038         }
4039
4040         ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5645,
4041                                      rt5645_dai, ARRAY_SIZE(rt5645_dai));
4042         if (ret)
4043                 goto err_irq;
4044
4045         return 0;
4046
4047 err_irq:
4048         if (rt5645->i2c->irq)
4049                 free_irq(rt5645->i2c->irq, rt5645);
4050 err_enable:
4051         regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4052         return ret;
4053 }
4054
4055 static int rt5645_i2c_remove(struct i2c_client *i2c)
4056 {
4057         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4058
4059         if (i2c->irq)
4060                 free_irq(i2c->irq, rt5645);
4061
4062         cancel_delayed_work_sync(&rt5645->jack_detect_work);
4063         cancel_delayed_work_sync(&rt5645->rcclock_work);
4064         del_timer_sync(&rt5645->btn_check_timer);
4065
4066         regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4067
4068         return 0;
4069 }
4070
4071 static void rt5645_i2c_shutdown(struct i2c_client *i2c)
4072 {
4073         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4074
4075         regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4076                 RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
4077         regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
4078                 RT5645_CBJ_MN_JD);
4079         regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
4080                 0);
4081         msleep(20);
4082         regmap_write(rt5645->regmap, RT5645_RESET, 0);
4083 }
4084
4085 static struct i2c_driver rt5645_i2c_driver = {
4086         .driver = {
4087                 .name = "rt5645",
4088                 .of_match_table = of_match_ptr(rt5645_of_match),
4089                 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
4090         },
4091         .probe = rt5645_i2c_probe,
4092         .remove = rt5645_i2c_remove,
4093         .shutdown = rt5645_i2c_shutdown,
4094         .id_table = rt5645_i2c_id,
4095 };
4096 module_i2c_driver(rt5645_i2c_driver);
4097
4098 MODULE_DESCRIPTION("ASoC RT5645 driver");
4099 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4100 MODULE_LICENSE("GPL v2");