2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/acpi.h>
23 #include <linux/dmi.h>
24 #include <linux/regulator/consumer.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/jack.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
37 #define QUIRK_INV_JD1_1(q) ((q) & 1)
38 #define QUIRK_LEVEL_IRQ(q) (((q) >> 1) & 1)
39 #define QUIRK_IN2_DIFF(q) (((q) >> 2) & 1)
40 #define QUIRK_JD_MODE(q) (((q) >> 4) & 7)
41 #define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
42 #define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
44 static unsigned int quirk = -1;
45 module_param(quirk, uint, 0444);
46 MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
48 #define RT5645_DEVICE_ID 0x6308
49 #define RT5650_DEVICE_ID 0x6419
51 #define RT5645_PR_RANGE_BASE (0xff + 1)
52 #define RT5645_PR_SPACING 0x100
54 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
56 #define RT5645_HWEQ_NUM 57
58 #define TIME_TO_POWER_MS 400
60 static const struct regmap_range_cfg rt5645_ranges[] = {
63 .range_min = RT5645_PR_BASE,
64 .range_max = RT5645_PR_BASE + 0xf8,
65 .selector_reg = RT5645_PRIV_INDEX,
66 .selector_mask = 0xff,
67 .selector_shift = 0x0,
68 .window_start = RT5645_PRIV_DATA,
73 static const struct reg_sequence init_list[] = {
74 {RT5645_PR_BASE + 0x3d, 0x3600},
75 {RT5645_PR_BASE + 0x1c, 0xfd70},
76 {RT5645_PR_BASE + 0x20, 0x611f},
77 {RT5645_PR_BASE + 0x21, 0x4040},
78 {RT5645_PR_BASE + 0x23, 0x0004},
79 {RT5645_ASRC_4, 0x0120},
82 static const struct reg_sequence rt5650_init_list[] = {
86 static const struct reg_default rt5645_reg[] = {
242 static const struct reg_default rt5650_reg[] = {
399 struct rt5645_eq_param_s {
404 struct rt5645_eq_param_s_be16 {
409 static const char *const rt5645_supply_names[] = {
415 struct snd_soc_component *component;
416 struct rt5645_platform_data pdata;
417 struct regmap *regmap;
418 struct i2c_client *i2c;
419 struct gpio_desc *gpiod_hp_det;
420 struct snd_soc_jack *hp_jack;
421 struct snd_soc_jack *mic_jack;
422 struct snd_soc_jack *btn_jack;
423 struct delayed_work jack_detect_work, rcclock_work;
424 struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
425 struct rt5645_eq_param_s *eq_param;
426 struct timer_list btn_check_timer;
431 int lrck[RT5645_AIFS];
432 int bclk[RT5645_AIFS];
433 int master[RT5645_AIFS];
445 static int rt5645_reset(struct snd_soc_component *component)
447 return snd_soc_component_write(component, RT5645_RESET, 0);
450 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
454 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
455 if (reg >= rt5645_ranges[i].range_min &&
456 reg <= rt5645_ranges[i].range_max) {
463 case RT5645_PRIV_INDEX:
464 case RT5645_PRIV_DATA:
465 case RT5645_IN1_CTRL1:
466 case RT5645_IN1_CTRL2:
467 case RT5645_IN1_CTRL3:
468 case RT5645_A_JD_CTRL1:
469 case RT5645_ADC_EQ_CTRL1:
470 case RT5645_EQ_CTRL1:
471 case RT5645_ALC_CTRL_1:
472 case RT5645_IRQ_CTRL2:
473 case RT5645_IRQ_CTRL3:
474 case RT5645_INT_IRQ_ST:
476 case RT5650_4BTN_IL_CMD1:
477 case RT5645_VENDOR_ID:
478 case RT5645_VENDOR_ID1:
479 case RT5645_VENDOR_ID2:
486 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
490 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
491 if (reg >= rt5645_ranges[i].range_min &&
492 reg <= rt5645_ranges[i].range_max) {
502 case RT5645_IN1_CTRL1:
503 case RT5645_IN1_CTRL2:
504 case RT5645_IN1_CTRL3:
505 case RT5645_IN2_CTRL:
506 case RT5645_INL1_INR1_VOL:
507 case RT5645_SPK_FUNC_LIM:
508 case RT5645_ADJ_HPF_CTRL:
509 case RT5645_DAC1_DIG_VOL:
510 case RT5645_DAC2_DIG_VOL:
511 case RT5645_DAC_CTRL:
512 case RT5645_STO1_ADC_DIG_VOL:
513 case RT5645_MONO_ADC_DIG_VOL:
514 case RT5645_ADC_BST_VOL1:
515 case RT5645_ADC_BST_VOL2:
516 case RT5645_STO1_ADC_MIXER:
517 case RT5645_MONO_ADC_MIXER:
518 case RT5645_AD_DA_MIXER:
519 case RT5645_STO_DAC_MIXER:
520 case RT5645_MONO_DAC_MIXER:
521 case RT5645_DIG_MIXER:
522 case RT5650_A_DAC_SOUR:
523 case RT5645_DIG_INF1_DATA:
524 case RT5645_PDM_OUT_CTRL:
525 case RT5645_REC_L1_MIXER:
526 case RT5645_REC_L2_MIXER:
527 case RT5645_REC_R1_MIXER:
528 case RT5645_REC_R2_MIXER:
529 case RT5645_HPMIXL_CTRL:
530 case RT5645_HPOMIXL_CTRL:
531 case RT5645_HPMIXR_CTRL:
532 case RT5645_HPOMIXR_CTRL:
533 case RT5645_HPO_MIXER:
534 case RT5645_SPK_L_MIXER:
535 case RT5645_SPK_R_MIXER:
536 case RT5645_SPO_MIXER:
537 case RT5645_SPO_CLSD_RATIO:
538 case RT5645_OUT_L1_MIXER:
539 case RT5645_OUT_R1_MIXER:
540 case RT5645_OUT_L_GAIN1:
541 case RT5645_OUT_L_GAIN2:
542 case RT5645_OUT_R_GAIN1:
543 case RT5645_OUT_R_GAIN2:
544 case RT5645_LOUT_MIXER:
545 case RT5645_HAPTIC_CTRL1:
546 case RT5645_HAPTIC_CTRL2:
547 case RT5645_HAPTIC_CTRL3:
548 case RT5645_HAPTIC_CTRL4:
549 case RT5645_HAPTIC_CTRL5:
550 case RT5645_HAPTIC_CTRL6:
551 case RT5645_HAPTIC_CTRL7:
552 case RT5645_HAPTIC_CTRL8:
553 case RT5645_HAPTIC_CTRL9:
554 case RT5645_HAPTIC_CTRL10:
555 case RT5645_PWR_DIG1:
556 case RT5645_PWR_DIG2:
557 case RT5645_PWR_ANLG1:
558 case RT5645_PWR_ANLG2:
559 case RT5645_PWR_MIXER:
561 case RT5645_PRIV_INDEX:
562 case RT5645_PRIV_DATA:
563 case RT5645_I2S1_SDP:
564 case RT5645_I2S2_SDP:
565 case RT5645_ADDA_CLK1:
566 case RT5645_ADDA_CLK2:
567 case RT5645_DMIC_CTRL1:
568 case RT5645_DMIC_CTRL2:
569 case RT5645_TDM_CTRL_1:
570 case RT5645_TDM_CTRL_2:
571 case RT5645_TDM_CTRL_3:
572 case RT5650_TDM_CTRL_4:
574 case RT5645_PLL_CTRL1:
575 case RT5645_PLL_CTRL2:
580 case RT5645_DEPOP_M1:
581 case RT5645_DEPOP_M2:
582 case RT5645_DEPOP_M3:
583 case RT5645_CHARGE_PUMP:
585 case RT5645_A_JD_CTRL1:
586 case RT5645_VAD_CTRL4:
587 case RT5645_CLSD_OUT_CTRL:
588 case RT5645_ADC_EQ_CTRL1:
589 case RT5645_ADC_EQ_CTRL2:
590 case RT5645_EQ_CTRL1:
591 case RT5645_EQ_CTRL2:
592 case RT5645_ALC_CTRL_1:
593 case RT5645_ALC_CTRL_2:
594 case RT5645_ALC_CTRL_3:
595 case RT5645_ALC_CTRL_4:
596 case RT5645_ALC_CTRL_5:
598 case RT5645_IRQ_CTRL1:
599 case RT5645_IRQ_CTRL2:
600 case RT5645_IRQ_CTRL3:
601 case RT5645_INT_IRQ_ST:
602 case RT5645_GPIO_CTRL1:
603 case RT5645_GPIO_CTRL2:
604 case RT5645_GPIO_CTRL3:
605 case RT5645_BASS_BACK:
606 case RT5645_MP3_PLUS1:
607 case RT5645_MP3_PLUS2:
608 case RT5645_ADJ_HPF1:
609 case RT5645_ADJ_HPF2:
610 case RT5645_HP_CALIB_AMP_DET:
616 case RT5650_4BTN_IL_CMD1:
617 case RT5650_4BTN_IL_CMD2:
618 case RT5645_DRC1_HL_CTRL1:
619 case RT5645_DRC2_HL_CTRL1:
620 case RT5645_ADC_MONO_HP_CTRL1:
621 case RT5645_ADC_MONO_HP_CTRL2:
622 case RT5645_DRC2_CTRL1:
623 case RT5645_DRC2_CTRL2:
624 case RT5645_DRC2_CTRL3:
625 case RT5645_DRC2_CTRL4:
626 case RT5645_DRC2_CTRL5:
627 case RT5645_JD_CTRL3:
628 case RT5645_JD_CTRL4:
629 case RT5645_GEN_CTRL1:
630 case RT5645_GEN_CTRL2:
631 case RT5645_GEN_CTRL3:
632 case RT5645_VENDOR_ID:
633 case RT5645_VENDOR_ID1:
634 case RT5645_VENDOR_ID2:
641 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
642 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
643 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
644 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
645 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
647 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
648 static const DECLARE_TLV_DB_RANGE(bst_tlv,
649 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
650 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
651 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
652 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
653 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
654 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
655 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
658 /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
659 static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
660 0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
661 5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
662 6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
663 7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
666 static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
667 struct snd_ctl_elem_info *uinfo)
669 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
670 uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
675 static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
676 struct snd_ctl_elem_value *ucontrol)
678 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
679 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
680 struct rt5645_eq_param_s_be16 *eq_param =
681 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
684 for (i = 0; i < RT5645_HWEQ_NUM; i++) {
685 eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
686 eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
692 static bool rt5645_validate_hweq(unsigned short reg)
694 if ((reg >= 0x1a4 && reg <= 0x1cd) | (reg >= 0x1e5 && reg <= 0x1f8) |
695 (reg == RT5645_EQ_CTRL2))
701 static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
702 struct snd_ctl_elem_value *ucontrol)
704 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
705 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
706 struct rt5645_eq_param_s_be16 *eq_param =
707 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
710 for (i = 0; i < RT5645_HWEQ_NUM; i++) {
711 rt5645->eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
712 rt5645->eq_param[i].val = be16_to_cpu(eq_param[i].val);
715 /* The final setting of the table should be RT5645_EQ_CTRL2 */
716 for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
717 if (rt5645->eq_param[i].reg == 0)
719 else if (rt5645->eq_param[i].reg != RT5645_EQ_CTRL2)
725 for (i = 0; i < RT5645_HWEQ_NUM; i++) {
726 if (!rt5645_validate_hweq(rt5645->eq_param[i].reg) &&
727 rt5645->eq_param[i].reg != 0)
729 else if (rt5645->eq_param[i].reg == 0)
736 #define RT5645_HWEQ(xname) \
737 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
738 .info = rt5645_hweq_info, \
739 .get = rt5645_hweq_get, \
740 .put = rt5645_hweq_put \
743 static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
744 struct snd_ctl_elem_value *ucontrol)
746 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
747 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
750 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
751 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
753 ret = snd_soc_put_volsw(kcontrol, ucontrol);
755 mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
756 msecs_to_jiffies(200));
761 static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
762 "immediately", "zero crossing", "soft ramp"
765 static SOC_ENUM_SINGLE_DECL(
766 rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
767 RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
769 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
770 /* Speaker Output Volume */
771 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
772 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
773 SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
774 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
775 rt5645_spk_put_volsw, out_vol_tlv),
777 /* ClassD modulator Speaker Gain Ratio */
778 SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
779 RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
781 /* Headphone Output Volume */
782 SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
783 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
784 SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
785 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
788 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
789 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
790 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
791 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
792 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
793 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
795 /* DAC Digital Volume */
796 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
797 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
798 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
799 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
800 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
801 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
803 /* IN1/IN2 Control */
804 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
805 RT5645_BST_SFT1, 12, 0, bst_tlv),
806 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
807 RT5645_BST_SFT2, 8, 0, bst_tlv),
809 /* INL/INR Volume Control */
810 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
811 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
813 /* ADC Digital Volume Control */
814 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
815 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
816 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
817 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
818 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
819 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
820 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
821 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
823 /* ADC Boost Volume Control */
824 SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
825 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
827 SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
828 RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
831 /* I2S2 function select */
832 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
834 RT5645_HWEQ("Speaker HWEQ"),
836 /* Digital Soft Volume Control */
837 SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
841 * set_dmic_clk - Set parameter of dmic.
844 * @kcontrol: The kcontrol of this widget.
848 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
849 struct snd_kcontrol *kcontrol, int event)
851 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
852 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
855 rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
856 RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
857 idx = rl6231_calc_dmic_clk(rate);
859 dev_err(component->dev, "Failed to set DMIC clock\n");
861 snd_soc_component_update_bits(component, RT5645_DMIC_CTRL1,
862 RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
866 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
867 struct snd_soc_dapm_widget *sink)
869 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
872 val = snd_soc_component_read32(component, RT5645_GLB_CLK);
873 val &= RT5645_SCLK_SRC_MASK;
874 if (val == RT5645_SCLK_SRC_PLL1)
880 static int is_using_asrc(struct snd_soc_dapm_widget *source,
881 struct snd_soc_dapm_widget *sink)
883 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
884 unsigned int reg, shift, val;
886 switch (source->shift) {
915 val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
928 static int rt5645_enable_hweq(struct snd_soc_component *component)
930 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
933 for (i = 0; i < RT5645_HWEQ_NUM; i++) {
934 if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
935 regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
936 rt5645->eq_param[i].val);
945 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
946 * @component: SoC audio component device.
947 * @filter_mask: mask of filters.
948 * @clk_src: clock source
950 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
951 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
952 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
953 * ASRC function will track i2s clock and generate a corresponding system clock
954 * for codec. This function provides an API to select the clock source for a
955 * set of filters specified by the mask. And the codec driver will turn on ASRC
956 * for these filters if ASRC is selected as their clock source.
958 int rt5645_sel_asrc_clk_src(struct snd_soc_component *component,
959 unsigned int filter_mask, unsigned int clk_src)
961 unsigned int asrc2_mask = 0;
962 unsigned int asrc2_value = 0;
963 unsigned int asrc3_mask = 0;
964 unsigned int asrc3_value = 0;
967 case RT5645_CLK_SEL_SYS:
968 case RT5645_CLK_SEL_I2S1_ASRC:
969 case RT5645_CLK_SEL_I2S2_ASRC:
970 case RT5645_CLK_SEL_SYS2:
977 if (filter_mask & RT5645_DA_STEREO_FILTER) {
978 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
979 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
980 | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
983 if (filter_mask & RT5645_DA_MONO_L_FILTER) {
984 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
985 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
986 | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
989 if (filter_mask & RT5645_DA_MONO_R_FILTER) {
990 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
991 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
992 | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
995 if (filter_mask & RT5645_AD_STEREO_FILTER) {
996 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
997 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
998 | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
1001 if (filter_mask & RT5645_AD_MONO_L_FILTER) {
1002 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
1003 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
1004 | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
1007 if (filter_mask & RT5645_AD_MONO_R_FILTER) {
1008 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
1009 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
1010 | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
1014 snd_soc_component_update_bits(component, RT5645_ASRC_2,
1015 asrc2_mask, asrc2_value);
1018 snd_soc_component_update_bits(component, RT5645_ASRC_3,
1019 asrc3_mask, asrc3_value);
1023 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
1026 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
1027 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1028 RT5645_M_ADC_L1_SFT, 1, 1),
1029 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1030 RT5645_M_ADC_L2_SFT, 1, 1),
1033 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
1034 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1035 RT5645_M_ADC_R1_SFT, 1, 1),
1036 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1037 RT5645_M_ADC_R2_SFT, 1, 1),
1040 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
1041 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1042 RT5645_M_MONO_ADC_L1_SFT, 1, 1),
1043 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1044 RT5645_M_MONO_ADC_L2_SFT, 1, 1),
1047 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
1048 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1049 RT5645_M_MONO_ADC_R1_SFT, 1, 1),
1050 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1051 RT5645_M_MONO_ADC_R2_SFT, 1, 1),
1054 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
1055 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1056 RT5645_M_ADCMIX_L_SFT, 1, 1),
1057 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1058 RT5645_M_DAC1_L_SFT, 1, 1),
1061 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
1062 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1063 RT5645_M_ADCMIX_R_SFT, 1, 1),
1064 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1065 RT5645_M_DAC1_R_SFT, 1, 1),
1068 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
1069 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1070 RT5645_M_DAC_L1_SFT, 1, 1),
1071 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
1072 RT5645_M_DAC_L2_SFT, 1, 1),
1073 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1074 RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
1077 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
1078 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1079 RT5645_M_DAC_R1_SFT, 1, 1),
1080 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
1081 RT5645_M_DAC_R2_SFT, 1, 1),
1082 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1083 RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
1086 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
1087 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
1088 RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
1089 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1090 RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
1091 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1092 RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
1095 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
1096 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
1097 RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
1098 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1099 RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
1100 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1101 RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
1104 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
1105 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
1106 RT5645_M_STO_L_DAC_L_SFT, 1, 1),
1107 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1108 RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
1109 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1110 RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
1113 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
1114 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
1115 RT5645_M_STO_R_DAC_R_SFT, 1, 1),
1116 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1117 RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
1118 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1119 RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
1122 /* Analog Input Mixer */
1123 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
1124 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
1125 RT5645_M_HP_L_RM_L_SFT, 1, 1),
1126 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
1127 RT5645_M_IN_L_RM_L_SFT, 1, 1),
1128 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
1129 RT5645_M_BST2_RM_L_SFT, 1, 1),
1130 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
1131 RT5645_M_BST1_RM_L_SFT, 1, 1),
1132 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
1133 RT5645_M_OM_L_RM_L_SFT, 1, 1),
1136 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
1137 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
1138 RT5645_M_HP_R_RM_R_SFT, 1, 1),
1139 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
1140 RT5645_M_IN_R_RM_R_SFT, 1, 1),
1141 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
1142 RT5645_M_BST2_RM_R_SFT, 1, 1),
1143 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
1144 RT5645_M_BST1_RM_R_SFT, 1, 1),
1145 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
1146 RT5645_M_OM_R_RM_R_SFT, 1, 1),
1149 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
1150 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
1151 RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
1152 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
1153 RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
1154 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
1155 RT5645_M_IN_L_SM_L_SFT, 1, 1),
1156 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
1157 RT5645_M_BST1_L_SM_L_SFT, 1, 1),
1160 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
1161 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
1162 RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
1163 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
1164 RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
1165 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
1166 RT5645_M_IN_R_SM_R_SFT, 1, 1),
1167 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
1168 RT5645_M_BST2_R_SM_R_SFT, 1, 1),
1171 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
1172 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
1173 RT5645_M_BST1_OM_L_SFT, 1, 1),
1174 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
1175 RT5645_M_IN_L_OM_L_SFT, 1, 1),
1176 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
1177 RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
1178 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
1179 RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
1182 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
1183 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
1184 RT5645_M_BST2_OM_R_SFT, 1, 1),
1185 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
1186 RT5645_M_IN_R_OM_R_SFT, 1, 1),
1187 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
1188 RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
1189 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
1190 RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
1193 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
1194 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1195 RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
1196 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
1197 RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
1198 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1199 RT5645_M_SV_R_SPM_L_SFT, 1, 1),
1200 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
1201 RT5645_M_SV_L_SPM_L_SFT, 1, 1),
1204 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
1205 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1206 RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
1207 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1208 RT5645_M_SV_R_SPM_R_SFT, 1, 1),
1211 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
1212 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
1213 RT5645_M_DAC1_HM_SFT, 1, 1),
1214 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
1215 RT5645_M_HPVOL_HM_SFT, 1, 1),
1218 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
1219 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
1220 RT5645_M_DAC1_HV_SFT, 1, 1),
1221 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
1222 RT5645_M_DAC2_HV_SFT, 1, 1),
1223 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
1224 RT5645_M_IN_HV_SFT, 1, 1),
1225 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
1226 RT5645_M_BST1_HV_SFT, 1, 1),
1229 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
1230 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
1231 RT5645_M_DAC1_HV_SFT, 1, 1),
1232 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
1233 RT5645_M_DAC2_HV_SFT, 1, 1),
1234 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
1235 RT5645_M_IN_HV_SFT, 1, 1),
1236 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
1237 RT5645_M_BST2_HV_SFT, 1, 1),
1240 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
1241 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
1242 RT5645_M_DAC_L1_LM_SFT, 1, 1),
1243 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
1244 RT5645_M_DAC_R1_LM_SFT, 1, 1),
1245 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
1246 RT5645_M_OV_L_LM_SFT, 1, 1),
1247 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
1248 RT5645_M_OV_R_LM_SFT, 1, 1),
1251 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1252 static const char * const rt5645_dac1_src[] = {
1253 "IF1 DAC", "IF2 DAC", "IF3 DAC"
1256 static SOC_ENUM_SINGLE_DECL(
1257 rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
1258 RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
1260 static const struct snd_kcontrol_new rt5645_dac1l_mux =
1261 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
1263 static SOC_ENUM_SINGLE_DECL(
1264 rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
1265 RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
1267 static const struct snd_kcontrol_new rt5645_dac1r_mux =
1268 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
1270 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1271 static const char * const rt5645_dac12_src[] = {
1272 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1275 static SOC_ENUM_SINGLE_DECL(
1276 rt5645_dac2l_enum, RT5645_DAC_CTRL,
1277 RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
1279 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
1280 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
1282 static const char * const rt5645_dacr2_src[] = {
1283 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1286 static SOC_ENUM_SINGLE_DECL(
1287 rt5645_dac2r_enum, RT5645_DAC_CTRL,
1288 RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
1290 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
1291 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
1293 /* Stereo1 ADC source */
1295 static const char * const rt5645_stereo_adc1_src[] = {
1299 static SOC_ENUM_SINGLE_DECL(
1300 rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1301 RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1303 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1304 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1307 static const char * const rt5645_stereo_adc2_src[] = {
1311 static SOC_ENUM_SINGLE_DECL(
1312 rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1313 RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1315 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1316 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1319 static const char * const rt5645_stereo_dmic_src[] = {
1323 static SOC_ENUM_SINGLE_DECL(
1324 rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1325 RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1327 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1328 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1330 /* Mono ADC source */
1332 static const char * const rt5645_mono_adc_l1_src[] = {
1333 "Mono DAC MIXL", "ADC"
1336 static SOC_ENUM_SINGLE_DECL(
1337 rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1338 RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1340 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1341 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1343 static const char * const rt5645_mono_adc_l2_src[] = {
1344 "Mono DAC MIXL", "DMIC"
1347 static SOC_ENUM_SINGLE_DECL(
1348 rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1349 RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1351 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1352 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1355 static const char * const rt5645_mono_dmic_src[] = {
1359 static SOC_ENUM_SINGLE_DECL(
1360 rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1361 RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1363 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1364 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1366 static SOC_ENUM_SINGLE_DECL(
1367 rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1368 RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1370 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1371 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1373 static const char * const rt5645_mono_adc_r1_src[] = {
1374 "Mono DAC MIXR", "ADC"
1377 static SOC_ENUM_SINGLE_DECL(
1378 rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1379 RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1381 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1382 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1384 static const char * const rt5645_mono_adc_r2_src[] = {
1385 "Mono DAC MIXR", "DMIC"
1388 static SOC_ENUM_SINGLE_DECL(
1389 rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1390 RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1392 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1393 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1396 static const char * const rt5645_if1_adc_in_src[] = {
1397 "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1398 "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1401 static SOC_ENUM_SINGLE_DECL(
1402 rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1403 RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1405 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1406 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1409 static const char * const rt5650_if1_adc_in_src[] = {
1410 "IF_ADC1/IF_ADC2/DAC_REF/Null",
1411 "IF_ADC1/IF_ADC2/Null/DAC_REF",
1412 "IF_ADC1/DAC_REF/IF_ADC2/Null",
1413 "IF_ADC1/DAC_REF/Null/IF_ADC2",
1414 "IF_ADC1/Null/DAC_REF/IF_ADC2",
1415 "IF_ADC1/Null/IF_ADC2/DAC_REF",
1417 "IF_ADC2/IF_ADC1/DAC_REF/Null",
1418 "IF_ADC2/IF_ADC1/Null/DAC_REF",
1419 "IF_ADC2/DAC_REF/IF_ADC1/Null",
1420 "IF_ADC2/DAC_REF/Null/IF_ADC1",
1421 "IF_ADC2/Null/DAC_REF/IF_ADC1",
1422 "IF_ADC2/Null/IF_ADC1/DAC_REF",
1424 "DAC_REF/IF_ADC1/IF_ADC2/Null",
1425 "DAC_REF/IF_ADC1/Null/IF_ADC2",
1426 "DAC_REF/IF_ADC2/IF_ADC1/Null",
1427 "DAC_REF/IF_ADC2/Null/IF_ADC1",
1428 "DAC_REF/Null/IF_ADC1/IF_ADC2",
1429 "DAC_REF/Null/IF_ADC2/IF_ADC1",
1431 "Null/IF_ADC1/IF_ADC2/DAC_REF",
1432 "Null/IF_ADC1/DAC_REF/IF_ADC2",
1433 "Null/IF_ADC2/IF_ADC1/DAC_REF",
1434 "Null/IF_ADC2/DAC_REF/IF_ADC1",
1435 "Null/DAC_REF/IF_ADC1/IF_ADC2",
1436 "Null/DAC_REF/IF_ADC2/IF_ADC1",
1439 static SOC_ENUM_SINGLE_DECL(
1440 rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1441 0, rt5650_if1_adc_in_src);
1443 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1444 SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1446 /* MX-78 [15:14][13:12][11:10] */
1447 static const char * const rt5645_tdm_adc_swap_select[] = {
1448 "L/R", "R/L", "L/L", "R/R"
1451 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1452 RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1454 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1455 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1457 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1458 RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1460 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1461 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1463 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1464 RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1466 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1467 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1469 /* MX-77 [7:6][5:4][3:2] */
1470 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1471 RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1473 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1474 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1476 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1477 RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1479 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1480 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1482 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1483 RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1485 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1486 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1488 /* MX-79 [14:12][10:8][6:4][2:0] */
1489 static const char * const rt5645_tdm_dac_swap_select[] = {
1490 "Slot0", "Slot1", "Slot2", "Slot3"
1493 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1494 RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1496 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1497 SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1499 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1500 RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1502 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1503 SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1505 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1506 RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1508 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1509 SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1511 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1512 RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1514 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1515 SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1517 /* MX-7a [14:12][10:8][6:4][2:0] */
1518 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1519 RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1521 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1522 SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1524 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1525 RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1527 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1528 SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1530 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1531 RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1533 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1534 SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1536 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1537 RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1539 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1540 SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1543 static const char * const rt5650_a_dac1_src[] = {
1544 "DAC1", "Stereo DAC Mixer"
1547 static SOC_ENUM_SINGLE_DECL(
1548 rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1549 RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1551 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1552 SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1554 static SOC_ENUM_SINGLE_DECL(
1555 rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1556 RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1558 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1559 SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1562 static const char * const rt5650_a_dac2_src[] = {
1563 "Stereo DAC Mixer", "Mono DAC Mixer"
1566 static SOC_ENUM_SINGLE_DECL(
1567 rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1568 RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1570 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1571 SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1573 static SOC_ENUM_SINGLE_DECL(
1574 rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1575 RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1577 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1578 SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1581 static const char * const rt5645_if2_adc_in_src[] = {
1582 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1585 static SOC_ENUM_SINGLE_DECL(
1586 rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1587 RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1589 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1590 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1592 /* MX-31 [15] [13] [11] [9] */
1593 static const char * const rt5645_pdm_src[] = {
1594 "Mono DAC", "Stereo DAC"
1597 static SOC_ENUM_SINGLE_DECL(
1598 rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1599 RT5645_PDM1_L_SFT, rt5645_pdm_src);
1601 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1602 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1604 static SOC_ENUM_SINGLE_DECL(
1605 rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1606 RT5645_PDM1_R_SFT, rt5645_pdm_src);
1608 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1609 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1612 static const char * const rt5645_vad_adc_src[] = {
1613 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1616 static SOC_ENUM_SINGLE_DECL(
1617 rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1618 RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1620 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1621 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1623 static const struct snd_kcontrol_new spk_l_vol_control =
1624 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1625 RT5645_L_MUTE_SFT, 1, 1);
1627 static const struct snd_kcontrol_new spk_r_vol_control =
1628 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1629 RT5645_R_MUTE_SFT, 1, 1);
1631 static const struct snd_kcontrol_new hp_l_vol_control =
1632 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1633 RT5645_L_MUTE_SFT, 1, 1);
1635 static const struct snd_kcontrol_new hp_r_vol_control =
1636 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1637 RT5645_R_MUTE_SFT, 1, 1);
1639 static const struct snd_kcontrol_new pdm1_l_vol_control =
1640 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1641 RT5645_M_PDM1_L, 1, 1);
1643 static const struct snd_kcontrol_new pdm1_r_vol_control =
1644 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1645 RT5645_M_PDM1_R, 1, 1);
1647 static void hp_amp_power(struct snd_soc_component *component, int on)
1649 static int hp_amp_power_count;
1650 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1653 if (hp_amp_power_count <= 0) {
1654 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1655 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x3100);
1656 snd_soc_component_write(component, RT5645_CHARGE_PUMP,
1658 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1659 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1660 RT5645_HP_DCC_INT1, 0x9f01);
1662 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1663 RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1664 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1666 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1667 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1668 RT5645_MAMP_INT_REG2, 0xfc00);
1669 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1671 rt5645->hp_on = true;
1673 /* depop parameters */
1674 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1675 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1676 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1677 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1678 RT5645_HP_DCC_INT1, 0x9f01);
1680 /* headphone amp power on */
1681 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1682 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1683 snd_soc_component_update_bits(component, RT5645_PWR_VOL,
1684 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1685 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1686 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1687 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1689 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1692 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1693 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1694 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1696 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1697 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1698 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1699 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1701 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1705 hp_amp_power_count++;
1707 hp_amp_power_count--;
1708 if (hp_amp_power_count <= 0) {
1709 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1710 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1712 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1713 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1714 RT5645_MAMP_INT_REG2, 0xfc00);
1715 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1717 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0001);
1720 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1722 RT5645_HP_L_SMT_MASK |
1723 RT5645_HP_R_SMT_MASK,
1725 RT5645_HP_L_SMT_DIS |
1726 RT5645_HP_R_SMT_DIS);
1727 /* headphone amp power down */
1728 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0000);
1729 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1730 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1732 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1733 RT5645_DEPOP_MASK, 0);
1739 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1740 struct snd_kcontrol *kcontrol, int event)
1742 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1743 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1746 case SND_SOC_DAPM_POST_PMU:
1747 hp_amp_power(component, 1);
1748 /* headphone unmute sequence */
1749 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1750 snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1751 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1753 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1754 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1755 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1756 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1757 RT5645_MAMP_INT_REG2, 0xfc00);
1758 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1759 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1760 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1761 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1762 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1763 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1764 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1765 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1767 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1768 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1769 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1770 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1774 case SND_SOC_DAPM_PRE_PMD:
1775 /* headphone mute sequence */
1776 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1777 snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1778 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1780 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1781 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1782 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1783 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1784 RT5645_MAMP_INT_REG2, 0xfc00);
1785 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1786 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1787 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1788 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1789 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1790 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1791 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1792 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1795 hp_amp_power(component, 0);
1805 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1806 struct snd_kcontrol *kcontrol, int event)
1808 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1811 case SND_SOC_DAPM_POST_PMU:
1812 rt5645_enable_hweq(component);
1813 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1814 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1816 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1817 RT5645_PWR_CLS_D_L);
1818 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1819 RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
1822 case SND_SOC_DAPM_PRE_PMD:
1823 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1824 RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
1825 snd_soc_component_write(component, RT5645_EQ_CTRL2, 0);
1826 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1827 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1828 RT5645_PWR_CLS_D_L, 0);
1838 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1839 struct snd_kcontrol *kcontrol, int event)
1841 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1844 case SND_SOC_DAPM_POST_PMU:
1845 hp_amp_power(component, 1);
1846 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1847 RT5645_PWR_LM, RT5645_PWR_LM);
1848 snd_soc_component_update_bits(component, RT5645_LOUT1,
1849 RT5645_L_MUTE | RT5645_R_MUTE, 0);
1852 case SND_SOC_DAPM_PRE_PMD:
1853 snd_soc_component_update_bits(component, RT5645_LOUT1,
1854 RT5645_L_MUTE | RT5645_R_MUTE,
1855 RT5645_L_MUTE | RT5645_R_MUTE);
1856 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1858 hp_amp_power(component, 0);
1868 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1869 struct snd_kcontrol *kcontrol, int event)
1871 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1874 case SND_SOC_DAPM_POST_PMU:
1875 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1876 RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1879 case SND_SOC_DAPM_PRE_PMD:
1880 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1881 RT5645_PWR_BST2_P, 0);
1891 static int rt5650_hp_event(struct snd_soc_dapm_widget *w,
1892 struct snd_kcontrol *k, int event)
1894 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1895 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1898 case SND_SOC_DAPM_POST_PMU:
1899 if (rt5645->hp_on) {
1901 rt5645->hp_on = false;
1912 static int rt5645_set_micbias1_event(struct snd_soc_dapm_widget *w,
1913 struct snd_kcontrol *k, int event)
1915 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1918 case SND_SOC_DAPM_PRE_PMU:
1919 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1920 RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1921 RT5645_MICBIAS1_POW_CTRL_SEL_M);
1924 case SND_SOC_DAPM_POST_PMD:
1925 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1926 RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1927 RT5645_MICBIAS1_POW_CTRL_SEL_A);
1937 static int rt5645_set_micbias2_event(struct snd_soc_dapm_widget *w,
1938 struct snd_kcontrol *k, int event)
1940 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1943 case SND_SOC_DAPM_PRE_PMU:
1944 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1945 RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1946 RT5645_MICBIAS2_POW_CTRL_SEL_M);
1949 case SND_SOC_DAPM_POST_PMD:
1950 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1951 RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1952 RT5645_MICBIAS2_POW_CTRL_SEL_A);
1962 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1963 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1964 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1965 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1966 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1968 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1969 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1970 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1971 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1974 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1976 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1978 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1980 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1982 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1984 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1986 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1988 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1990 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1992 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1994 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1999 SND_SOC_DAPM_SUPPLY("micbias1", RT5645_PWR_ANLG2,
2000 RT5645_PWR_MB1_BIT, 0, rt5645_set_micbias1_event,
2001 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2002 SND_SOC_DAPM_SUPPLY("micbias2", RT5645_PWR_ANLG2,
2003 RT5645_PWR_MB2_BIT, 0, rt5645_set_micbias2_event,
2004 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2006 SND_SOC_DAPM_INPUT("DMIC L1"),
2007 SND_SOC_DAPM_INPUT("DMIC R1"),
2008 SND_SOC_DAPM_INPUT("DMIC L2"),
2009 SND_SOC_DAPM_INPUT("DMIC R2"),
2011 SND_SOC_DAPM_INPUT("IN1P"),
2012 SND_SOC_DAPM_INPUT("IN1N"),
2013 SND_SOC_DAPM_INPUT("IN2P"),
2014 SND_SOC_DAPM_INPUT("IN2N"),
2016 SND_SOC_DAPM_INPUT("Haptic Generator"),
2018 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2019 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2020 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2021 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2022 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
2023 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
2024 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
2025 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
2027 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
2028 RT5645_PWR_BST1_BIT, 0, NULL, 0),
2029 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
2030 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
2031 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2033 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
2034 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
2035 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
2036 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
2038 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
2039 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
2040 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
2041 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
2043 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
2044 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
2046 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
2047 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
2048 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
2049 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
2052 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2053 &rt5645_sto1_dmic_mux),
2054 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2055 &rt5645_sto_adc2_mux),
2056 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2057 &rt5645_sto_adc2_mux),
2058 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2059 &rt5645_sto_adc1_mux),
2060 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2061 &rt5645_sto_adc1_mux),
2062 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2063 &rt5645_mono_dmic_l_mux),
2064 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2065 &rt5645_mono_dmic_r_mux),
2066 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2067 &rt5645_mono_adc_l2_mux),
2068 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2069 &rt5645_mono_adc_l1_mux),
2070 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2071 &rt5645_mono_adc_r1_mux),
2072 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2073 &rt5645_mono_adc_r2_mux),
2076 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
2077 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
2078 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2079 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
2081 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2082 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
2084 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
2085 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2086 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2087 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
2089 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
2090 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2091 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2092 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
2096 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2097 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2098 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2099 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2100 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2101 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2102 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2103 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2104 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2105 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2108 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
2109 0, 0, &rt5645_if2_adc_in_mux),
2111 /* Digital Interface */
2112 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
2113 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
2114 SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
2115 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2116 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2117 SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2118 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2119 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2120 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2121 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
2122 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
2123 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2124 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2125 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2126 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2128 /* Digital Interface Select */
2129 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
2130 0, 0, &rt5645_vad_adc_mux),
2132 /* Audio Interface */
2133 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2134 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2135 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2136 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2139 /* DAC mixer before sound effect */
2140 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2141 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
2142 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2143 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
2145 /* DAC2 channel Mux */
2146 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
2147 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
2148 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
2149 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
2150 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
2151 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
2153 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
2154 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
2157 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
2158 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
2159 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
2160 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2161 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
2162 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2163 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2164 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
2165 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2166 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
2167 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2168 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
2169 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2170 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
2171 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2172 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
2173 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2174 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
2177 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
2179 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
2181 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
2183 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
2186 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
2187 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
2188 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
2189 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
2190 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
2191 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
2192 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
2193 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
2195 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
2196 &spk_l_vol_control),
2197 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
2198 &spk_r_vol_control),
2199 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
2200 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
2201 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
2202 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
2203 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
2204 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
2205 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
2206 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
2207 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
2208 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
2209 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
2210 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
2211 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
2213 /* HPO/LOUT/Mono Mixer */
2214 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
2215 ARRAY_SIZE(rt5645_spo_l_mix)),
2216 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
2217 ARRAY_SIZE(rt5645_spo_r_mix)),
2218 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
2219 ARRAY_SIZE(rt5645_hpo_mix)),
2220 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
2221 ARRAY_SIZE(rt5645_lout_mix)),
2223 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
2224 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2225 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
2226 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2227 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
2228 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2231 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
2233 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
2234 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
2236 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
2237 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
2240 SND_SOC_DAPM_OUTPUT("HPOL"),
2241 SND_SOC_DAPM_OUTPUT("HPOR"),
2242 SND_SOC_DAPM_OUTPUT("LOUTL"),
2243 SND_SOC_DAPM_OUTPUT("LOUTR"),
2244 SND_SOC_DAPM_OUTPUT("PDM1L"),
2245 SND_SOC_DAPM_OUTPUT("PDM1R"),
2246 SND_SOC_DAPM_OUTPUT("SPOL"),
2247 SND_SOC_DAPM_OUTPUT("SPOR"),
2248 SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event),
2251 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
2252 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2253 &rt5645_if1_dac0_tdm_sel_mux),
2254 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2255 &rt5645_if1_dac1_tdm_sel_mux),
2256 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2257 &rt5645_if1_dac2_tdm_sel_mux),
2258 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2259 &rt5645_if1_dac3_tdm_sel_mux),
2260 SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
2261 0, 0, &rt5645_if1_adc_in_mux),
2262 SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2263 0, 0, &rt5645_if1_adc1_in_mux),
2264 SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2265 0, 0, &rt5645_if1_adc2_in_mux),
2266 SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2267 0, 0, &rt5645_if1_adc3_in_mux),
2270 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
2271 SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
2272 0, 0, &rt5650_a_dac1_l_mux),
2273 SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
2274 0, 0, &rt5650_a_dac1_r_mux),
2275 SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
2276 0, 0, &rt5650_a_dac2_l_mux),
2277 SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
2278 0, 0, &rt5650_a_dac2_r_mux),
2280 SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2281 0, 0, &rt5650_if1_adc1_in_mux),
2282 SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2283 0, 0, &rt5650_if1_adc2_in_mux),
2284 SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2285 0, 0, &rt5650_if1_adc3_in_mux),
2286 SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
2287 0, 0, &rt5650_if1_adc_in_mux),
2289 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2290 &rt5650_if1_dac0_tdm_sel_mux),
2291 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2292 &rt5650_if1_dac1_tdm_sel_mux),
2293 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2294 &rt5650_if1_dac2_tdm_sel_mux),
2295 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2296 &rt5650_if1_dac3_tdm_sel_mux),
2299 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
2300 { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2301 { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
2302 { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
2303 { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
2304 { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
2305 { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
2307 { "I2S1", NULL, "I2S1 ASRC" },
2308 { "I2S2", NULL, "I2S2 ASRC" },
2310 { "IN1P", NULL, "LDO2" },
2311 { "IN2P", NULL, "LDO2" },
2313 { "DMIC1", NULL, "DMIC L1" },
2314 { "DMIC1", NULL, "DMIC R1" },
2315 { "DMIC2", NULL, "DMIC L2" },
2316 { "DMIC2", NULL, "DMIC R2" },
2318 { "BST1", NULL, "IN1P" },
2319 { "BST1", NULL, "IN1N" },
2320 { "BST1", NULL, "JD Power" },
2321 { "BST1", NULL, "Mic Det Power" },
2322 { "BST2", NULL, "IN2P" },
2323 { "BST2", NULL, "IN2N" },
2325 { "INL VOL", NULL, "IN2P" },
2326 { "INR VOL", NULL, "IN2N" },
2328 { "RECMIXL", "HPOL Switch", "HPOL" },
2329 { "RECMIXL", "INL Switch", "INL VOL" },
2330 { "RECMIXL", "BST2 Switch", "BST2" },
2331 { "RECMIXL", "BST1 Switch", "BST1" },
2332 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2334 { "RECMIXR", "HPOR Switch", "HPOR" },
2335 { "RECMIXR", "INR Switch", "INR VOL" },
2336 { "RECMIXR", "BST2 Switch", "BST2" },
2337 { "RECMIXR", "BST1 Switch", "BST1" },
2338 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2340 { "ADC L", NULL, "RECMIXL" },
2341 { "ADC L", NULL, "ADC L power" },
2342 { "ADC R", NULL, "RECMIXR" },
2343 { "ADC R", NULL, "ADC R power" },
2345 {"DMIC L1", NULL, "DMIC CLK"},
2346 {"DMIC L1", NULL, "DMIC1 Power"},
2347 {"DMIC R1", NULL, "DMIC CLK"},
2348 {"DMIC R1", NULL, "DMIC1 Power"},
2349 {"DMIC L2", NULL, "DMIC CLK"},
2350 {"DMIC L2", NULL, "DMIC2 Power"},
2351 {"DMIC R2", NULL, "DMIC CLK"},
2352 {"DMIC R2", NULL, "DMIC2 Power"},
2354 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2355 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2356 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2358 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2359 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2360 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2362 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2363 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2364 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2366 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2367 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2368 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2369 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2371 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2372 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2373 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2374 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2376 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2377 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2378 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2379 { "Mono ADC L1 Mux", "ADC", "ADC L" },
2381 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2382 { "Mono ADC R1 Mux", "ADC", "ADC R" },
2383 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2384 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2386 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2387 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2388 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2389 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2391 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2392 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2393 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2395 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2396 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2397 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2399 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2400 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2401 { "Mono ADC MIXL", NULL, "adc mono left filter" },
2402 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2404 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2405 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2406 { "Mono ADC MIXR", NULL, "adc mono right filter" },
2407 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2409 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2410 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2411 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2413 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2414 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2415 { "IF_ADC2", NULL, "Mono ADC MIXL" },
2416 { "IF_ADC2", NULL, "Mono ADC MIXR" },
2417 { "VAD_ADC", NULL, "VAD ADC Mux" },
2419 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2420 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2421 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2423 { "IF1 ADC", NULL, "I2S1" },
2424 { "IF2 ADC", NULL, "I2S2" },
2425 { "IF2 ADC", NULL, "IF2 ADC Mux" },
2427 { "AIF2TX", NULL, "IF2 ADC" },
2429 { "IF1 DAC0", NULL, "AIF1RX" },
2430 { "IF1 DAC1", NULL, "AIF1RX" },
2431 { "IF1 DAC2", NULL, "AIF1RX" },
2432 { "IF1 DAC3", NULL, "AIF1RX" },
2433 { "IF2 DAC", NULL, "AIF2RX" },
2435 { "IF1 DAC0", NULL, "I2S1" },
2436 { "IF1 DAC1", NULL, "I2S1" },
2437 { "IF1 DAC2", NULL, "I2S1" },
2438 { "IF1 DAC3", NULL, "I2S1" },
2439 { "IF2 DAC", NULL, "I2S2" },
2441 { "IF2 DAC L", NULL, "IF2 DAC" },
2442 { "IF2 DAC R", NULL, "IF2 DAC" },
2444 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2445 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2447 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2448 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2449 { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2450 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2451 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2452 { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2454 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2455 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2456 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2457 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2458 { "DAC L2 Volume", NULL, "dac mono left filter" },
2460 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2461 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2462 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2463 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2464 { "DAC R2 Volume", NULL, "dac mono right filter" },
2466 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2467 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2468 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2469 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2470 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2471 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2472 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2473 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2475 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2476 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2477 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2478 { "Mono DAC MIXL", NULL, "dac mono left filter" },
2479 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2480 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2481 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2482 { "Mono DAC MIXR", NULL, "dac mono right filter" },
2484 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2485 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2486 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2487 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2488 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2489 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2491 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2492 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2493 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2494 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2496 { "SPK MIXL", "BST1 Switch", "BST1" },
2497 { "SPK MIXL", "INL Switch", "INL VOL" },
2498 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2499 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2500 { "SPK MIXR", "BST2 Switch", "BST2" },
2501 { "SPK MIXR", "INR Switch", "INR VOL" },
2502 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2503 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2505 { "OUT MIXL", "BST1 Switch", "BST1" },
2506 { "OUT MIXL", "INL Switch", "INL VOL" },
2507 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2508 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2510 { "OUT MIXR", "BST2 Switch", "BST2" },
2511 { "OUT MIXR", "INR Switch", "INR VOL" },
2512 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2513 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2515 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2516 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2517 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2518 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2519 { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2520 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2521 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2522 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2523 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2524 { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2526 { "DAC 2", NULL, "DAC L2" },
2527 { "DAC 2", NULL, "DAC R2" },
2528 { "DAC 1", NULL, "DAC L1" },
2529 { "DAC 1", NULL, "DAC R1" },
2530 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2531 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2532 { "HPOVOL", NULL, "HPOVOL L" },
2533 { "HPOVOL", NULL, "HPOVOL R" },
2534 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2535 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2537 { "SPKVOL L", "Switch", "SPK MIXL" },
2538 { "SPKVOL R", "Switch", "SPK MIXR" },
2540 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2541 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2542 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2543 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2545 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2546 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2547 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2548 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2550 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2551 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2552 { "PDM1 L Mux", NULL, "PDM1 Power" },
2553 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2554 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2555 { "PDM1 R Mux", NULL, "PDM1 Power" },
2557 { "HP amp", NULL, "HPO MIX" },
2558 { "HP amp", NULL, "JD Power" },
2559 { "HP amp", NULL, "Mic Det Power" },
2560 { "HP amp", NULL, "LDO2" },
2561 { "HPOL", NULL, "HP amp" },
2562 { "HPOR", NULL, "HP amp" },
2564 { "LOUT amp", NULL, "LOUT MIX" },
2565 { "LOUTL", NULL, "LOUT amp" },
2566 { "LOUTR", NULL, "LOUT amp" },
2568 { "PDM1 L", "Switch", "PDM1 L Mux" },
2569 { "PDM1 R", "Switch", "PDM1 R Mux" },
2571 { "PDM1L", NULL, "PDM1 L" },
2572 { "PDM1R", NULL, "PDM1 R" },
2574 { "SPK amp", NULL, "SPOL MIX" },
2575 { "SPK amp", NULL, "SPOR MIX" },
2576 { "SPOL", NULL, "SPK amp" },
2577 { "SPOR", NULL, "SPK amp" },
2580 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2581 { "A DAC1 L Mux", "DAC1", "DAC1 MIXL"},
2582 { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2583 { "A DAC1 R Mux", "DAC1", "DAC1 MIXR"},
2584 { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2586 { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2587 { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2588 { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2589 { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2591 { "DAC L1", NULL, "A DAC1 L Mux" },
2592 { "DAC R1", NULL, "A DAC1 R Mux" },
2593 { "DAC L2", NULL, "A DAC2 L Mux" },
2594 { "DAC R2", NULL, "A DAC2 R Mux" },
2596 { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2597 { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2598 { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2599 { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2601 { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2602 { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2603 { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2604 { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2606 { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2607 { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2608 { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2609 { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2611 { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2612 { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2613 { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2615 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2616 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2617 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2618 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2619 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2620 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2622 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2623 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2624 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2625 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2626 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2627 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2629 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2630 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2631 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2632 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2633 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2634 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2636 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2637 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2638 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2639 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2640 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2641 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2642 { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2644 { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2645 { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2646 { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2647 { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2649 { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2650 { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2651 { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2652 { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2654 { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2655 { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2656 { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2657 { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2659 { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2660 { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2661 { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2662 { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2664 { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2665 { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2667 { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2668 { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2671 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2672 { "DAC L1", NULL, "Stereo DAC MIXL" },
2673 { "DAC R1", NULL, "Stereo DAC MIXR" },
2674 { "DAC L2", NULL, "Mono DAC MIXL" },
2675 { "DAC R2", NULL, "Mono DAC MIXR" },
2677 { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2678 { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2679 { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2680 { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2682 { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2683 { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2684 { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2685 { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2687 { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2688 { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2689 { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2690 { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2692 { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2693 { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2694 { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2696 { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2697 { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2698 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2699 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2700 { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2702 { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2703 { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2704 { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2705 { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2707 { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2708 { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2709 { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2710 { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2712 { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2713 { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2714 { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2715 { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2717 { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2718 { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2719 { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2720 { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2722 { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2723 { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2725 { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2726 { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2729 static const struct snd_soc_dapm_route rt5645_old_dapm_routes[] = {
2730 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2731 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2734 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2735 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2737 struct snd_soc_component *component = dai->component;
2738 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2739 unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2740 int pre_div, bclk_ms, frame_size;
2742 rt5645->lrck[dai->id] = params_rate(params);
2743 pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2745 dev_err(component->dev, "Unsupported clock setting\n");
2748 frame_size = snd_soc_params_to_frame_size(params);
2749 if (frame_size < 0) {
2750 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2754 switch (rt5645->codec_type) {
2755 case CODEC_TYPE_RT5650:
2763 bclk_ms = frame_size > 32;
2764 rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2766 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2767 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2768 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2769 bclk_ms, pre_div, dai->id);
2771 switch (params_width(params)) {
2789 mask_clk = RT5645_I2S_PD1_MASK;
2790 val_clk = pre_div << RT5645_I2S_PD1_SFT;
2791 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2792 (0x3 << dl_sft), (val_len << dl_sft));
2793 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2796 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2797 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2798 pre_div << RT5645_I2S_PD2_SFT;
2799 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2800 (0x3 << dl_sft), (val_len << dl_sft));
2801 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2804 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2811 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2813 struct snd_soc_component *component = dai->component;
2814 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2815 unsigned int reg_val = 0, pol_sft;
2817 switch (rt5645->codec_type) {
2818 case CODEC_TYPE_RT5650:
2826 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2827 case SND_SOC_DAIFMT_CBM_CFM:
2828 rt5645->master[dai->id] = 1;
2830 case SND_SOC_DAIFMT_CBS_CFS:
2831 reg_val |= RT5645_I2S_MS_S;
2832 rt5645->master[dai->id] = 0;
2838 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2839 case SND_SOC_DAIFMT_NB_NF:
2841 case SND_SOC_DAIFMT_IB_NF:
2842 reg_val |= (1 << pol_sft);
2848 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2849 case SND_SOC_DAIFMT_I2S:
2851 case SND_SOC_DAIFMT_LEFT_J:
2852 reg_val |= RT5645_I2S_DF_LEFT;
2854 case SND_SOC_DAIFMT_DSP_A:
2855 reg_val |= RT5645_I2S_DF_PCM_A;
2857 case SND_SOC_DAIFMT_DSP_B:
2858 reg_val |= RT5645_I2S_DF_PCM_B;
2865 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2866 RT5645_I2S_MS_MASK | (1 << pol_sft) |
2867 RT5645_I2S_DF_MASK, reg_val);
2870 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2871 RT5645_I2S_MS_MASK | (1 << pol_sft) |
2872 RT5645_I2S_DF_MASK, reg_val);
2875 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2881 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2882 int clk_id, unsigned int freq, int dir)
2884 struct snd_soc_component *component = dai->component;
2885 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2886 unsigned int reg_val = 0;
2888 if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2892 case RT5645_SCLK_S_MCLK:
2893 reg_val |= RT5645_SCLK_SRC_MCLK;
2895 case RT5645_SCLK_S_PLL1:
2896 reg_val |= RT5645_SCLK_SRC_PLL1;
2898 case RT5645_SCLK_S_RCCLK:
2899 reg_val |= RT5645_SCLK_SRC_RCCLK;
2902 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2905 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2906 RT5645_SCLK_SRC_MASK, reg_val);
2907 rt5645->sysclk = freq;
2908 rt5645->sysclk_src = clk_id;
2910 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2915 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2916 unsigned int freq_in, unsigned int freq_out)
2918 struct snd_soc_component *component = dai->component;
2919 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2920 struct rl6231_pll_code pll_code;
2923 if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2924 freq_out == rt5645->pll_out)
2927 if (!freq_in || !freq_out) {
2928 dev_dbg(component->dev, "PLL disabled\n");
2931 rt5645->pll_out = 0;
2932 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2933 RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2938 case RT5645_PLL1_S_MCLK:
2939 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2940 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2942 case RT5645_PLL1_S_BCLK1:
2943 case RT5645_PLL1_S_BCLK2:
2946 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2947 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2950 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2951 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2954 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2959 dev_err(component->dev, "Unknown PLL source %d\n", source);
2963 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2965 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
2969 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2970 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2971 pll_code.n_code, pll_code.k_code);
2973 snd_soc_component_write(component, RT5645_PLL_CTRL1,
2974 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2975 snd_soc_component_write(component, RT5645_PLL_CTRL2,
2976 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2977 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2979 rt5645->pll_in = freq_in;
2980 rt5645->pll_out = freq_out;
2981 rt5645->pll_src = source;
2986 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2987 unsigned int rx_mask, int slots, int slot_width)
2989 struct snd_soc_component *component = dai->component;
2990 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2991 unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2992 unsigned int mask, val = 0;
2994 switch (rt5645->codec_type) {
2995 case CODEC_TYPE_RT5650:
3005 i_slot_sft = o_slot_sft = 12;
3006 i_width_sht = o_width_sht = 10;
3010 if (rx_mask || tx_mask) {
3011 val |= (1 << en_sft);
3012 if (rt5645->codec_type == CODEC_TYPE_RT5645)
3013 snd_soc_component_update_bits(component, RT5645_BASS_BACK,
3014 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
3019 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
3022 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
3025 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
3032 switch (slot_width) {
3034 val |= (1 << i_width_sht) | (1 << o_width_sht);
3037 val |= (2 << i_width_sht) | (2 << o_width_sht);
3040 val |= (3 << i_width_sht) | (3 << o_width_sht);
3047 snd_soc_component_update_bits(component, RT5645_TDM_CTRL_1, mask, val);
3052 static int rt5645_set_bias_level(struct snd_soc_component *component,
3053 enum snd_soc_bias_level level)
3055 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3058 case SND_SOC_BIAS_PREPARE:
3059 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
3060 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3061 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3062 RT5645_PWR_BG | RT5645_PWR_VREF2,
3063 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3064 RT5645_PWR_BG | RT5645_PWR_VREF2);
3066 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3067 RT5645_PWR_FV1 | RT5645_PWR_FV2,
3068 RT5645_PWR_FV1 | RT5645_PWR_FV2);
3069 snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3070 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3074 case SND_SOC_BIAS_STANDBY:
3075 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3076 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3077 RT5645_PWR_BG | RT5645_PWR_VREF2,
3078 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3079 RT5645_PWR_BG | RT5645_PWR_VREF2);
3081 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3082 RT5645_PWR_FV1 | RT5645_PWR_FV2,
3083 RT5645_PWR_FV1 | RT5645_PWR_FV2);
3084 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
3085 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
3087 if (rt5645->en_button_func)
3088 queue_delayed_work(system_power_efficient_wq,
3089 &rt5645->jack_detect_work,
3090 msecs_to_jiffies(0));
3094 case SND_SOC_BIAS_OFF:
3095 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1100);
3096 if (!rt5645->en_button_func)
3097 snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3098 RT5645_DIG_GATE_CTRL, 0);
3099 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3100 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3101 RT5645_PWR_BG | RT5645_PWR_VREF2 |
3102 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
3112 static void rt5645_enable_push_button_irq(struct snd_soc_component *component,
3115 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3118 snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
3119 snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
3120 snd_soc_dapm_sync(dapm);
3122 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
3123 snd_soc_component_update_bits(component,
3124 RT5645_INT_IRQ_ST, 0x8, 0x8);
3125 snd_soc_component_update_bits(component,
3126 RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
3127 snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1);
3128 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
3129 snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1));
3131 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
3132 snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);
3134 snd_soc_dapm_disable_pin(dapm, "ADC L power");
3135 snd_soc_dapm_disable_pin(dapm, "ADC R power");
3136 snd_soc_dapm_sync(dapm);
3140 static int rt5645_jack_detect(struct snd_soc_component *component, int jack_insert)
3142 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3143 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3147 regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0e06);
3149 /* for jack type detect */
3150 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3151 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
3152 snd_soc_dapm_sync(dapm);
3153 if (!dapm->card->instantiated) {
3154 /* Power up necessary bits for JD if dapm is
3156 regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
3157 RT5645_PWR_MB | RT5645_PWR_VREF2,
3158 RT5645_PWR_MB | RT5645_PWR_VREF2);
3159 regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
3160 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
3161 regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
3162 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
3165 regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
3166 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3167 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3168 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3169 RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3171 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3172 RT5645_CBJ_MN_JD, 0);
3175 regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3177 dev_dbg(component->dev, "val = %d\n", val);
3179 if (val == 1 || val == 2) {
3180 rt5645->jack_type = SND_JACK_HEADSET;
3181 if (rt5645->en_button_func) {
3182 rt5645_enable_push_button_irq(component, true);
3185 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3186 snd_soc_dapm_sync(dapm);
3187 rt5645->jack_type = SND_JACK_HEADPHONE;
3189 if (rt5645->pdata.level_trigger_irq)
3190 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3191 RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR);
3192 } else { /* jack out */
3193 rt5645->jack_type = 0;
3195 regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
3196 RT5645_L_MUTE | RT5645_R_MUTE,
3197 RT5645_L_MUTE | RT5645_R_MUTE);
3198 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3199 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3200 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3201 RT5645_CBJ_BST1_EN, 0);
3203 if (rt5645->en_button_func)
3204 rt5645_enable_push_button_irq(component, false);
3206 if (rt5645->pdata.jd_mode == 0)
3207 snd_soc_dapm_disable_pin(dapm, "LDO2");
3208 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3209 snd_soc_dapm_sync(dapm);
3210 if (rt5645->pdata.level_trigger_irq)
3211 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3212 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3215 return rt5645->jack_type;
3218 static int rt5645_button_detect(struct snd_soc_component *component)
3222 val = snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1);
3223 pr_debug("val=0x%x\n", val);
3224 btn_type = val & 0xfff0;
3225 snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, val);
3230 static irqreturn_t rt5645_irq(int irq, void *data);
3232 int rt5645_set_jack_detect(struct snd_soc_component *component,
3233 struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
3234 struct snd_soc_jack *btn_jack)
3236 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3238 rt5645->hp_jack = hp_jack;
3239 rt5645->mic_jack = mic_jack;
3240 rt5645->btn_jack = btn_jack;
3241 if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
3242 rt5645->en_button_func = true;
3243 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3244 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3245 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
3246 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3248 rt5645_irq(0, rt5645);
3252 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
3254 static void rt5645_jack_detect_work(struct work_struct *work)
3256 struct rt5645_priv *rt5645 =
3257 container_of(work, struct rt5645_priv, jack_detect_work.work);
3258 int val, btn_type, gpio_state = 0, report = 0;
3260 if (!rt5645->component)
3263 switch (rt5645->pdata.jd_mode) {
3264 case 0: /* Not using rt5645 JD */
3265 if (rt5645->gpiod_hp_det) {
3266 gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
3267 dev_dbg(rt5645->component->dev, "gpio_state = %d\n",
3269 report = rt5645_jack_detect(rt5645->component, gpio_state);
3271 snd_soc_jack_report(rt5645->hp_jack,
3272 report, SND_JACK_HEADPHONE);
3273 snd_soc_jack_report(rt5645->mic_jack,
3274 report, SND_JACK_MICROPHONE);
3276 default: /* read rt5645 jd1_1 status */
3277 val = snd_soc_component_read32(rt5645->component, RT5645_INT_IRQ_ST) & 0x1000;
3282 if (!val && (rt5645->jack_type == 0)) { /* jack in */
3283 report = rt5645_jack_detect(rt5645->component, 1);
3284 } else if (!val && rt5645->jack_type != 0) {
3285 /* for push button and jack out */
3287 if (snd_soc_component_read32(rt5645->component, RT5645_INT_IRQ_ST) & 0x4) {
3288 /* button pressed */
3289 report = SND_JACK_HEADSET;
3290 btn_type = rt5645_button_detect(rt5645->component);
3291 /* rt5650 can report three kinds of button behavior,
3292 one click, double click and hold. However,
3293 currently we will report button pressed/released
3294 event. So all the three button behaviors are
3295 treated as button pressed. */
3300 report |= SND_JACK_BTN_0;
3305 report |= SND_JACK_BTN_1;
3310 report |= SND_JACK_BTN_2;
3315 report |= SND_JACK_BTN_3;
3317 case 0x0000: /* unpressed */
3320 dev_err(rt5645->component->dev,
3321 "Unexpected button code 0x%04x\n",
3326 if (btn_type == 0)/* button release */
3327 report = rt5645->jack_type;
3329 mod_timer(&rt5645->btn_check_timer,
3330 msecs_to_jiffies(100));
3335 snd_soc_component_update_bits(rt5645->component,
3336 RT5645_INT_IRQ_ST, 0x1, 0x0);
3337 rt5645_jack_detect(rt5645->component, 0);
3340 snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
3341 snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
3342 if (rt5645->en_button_func)
3343 snd_soc_jack_report(rt5645->btn_jack,
3344 report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3345 SND_JACK_BTN_2 | SND_JACK_BTN_3);
3348 static void rt5645_rcclock_work(struct work_struct *work)
3350 struct rt5645_priv *rt5645 =
3351 container_of(work, struct rt5645_priv, rcclock_work.work);
3353 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3354 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PD);
3357 static irqreturn_t rt5645_irq(int irq, void *data)
3359 struct rt5645_priv *rt5645 = data;
3361 queue_delayed_work(system_power_efficient_wq,
3362 &rt5645->jack_detect_work, msecs_to_jiffies(250));
3367 static void rt5645_btn_check_callback(struct timer_list *t)
3369 struct rt5645_priv *rt5645 = from_timer(rt5645, t, btn_check_timer);
3371 queue_delayed_work(system_power_efficient_wq,
3372 &rt5645->jack_detect_work, msecs_to_jiffies(5));
3375 static int rt5645_probe(struct snd_soc_component *component)
3377 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3378 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3380 rt5645->component = component;
3382 switch (rt5645->codec_type) {
3383 case CODEC_TYPE_RT5645:
3384 snd_soc_dapm_new_controls(dapm,
3385 rt5645_specific_dapm_widgets,
3386 ARRAY_SIZE(rt5645_specific_dapm_widgets));
3387 snd_soc_dapm_add_routes(dapm,
3388 rt5645_specific_dapm_routes,
3389 ARRAY_SIZE(rt5645_specific_dapm_routes));
3390 if (rt5645->v_id < 3) {
3391 snd_soc_dapm_add_routes(dapm,
3392 rt5645_old_dapm_routes,
3393 ARRAY_SIZE(rt5645_old_dapm_routes));
3396 case CODEC_TYPE_RT5650:
3397 snd_soc_dapm_new_controls(dapm,
3398 rt5650_specific_dapm_widgets,
3399 ARRAY_SIZE(rt5650_specific_dapm_widgets));
3400 snd_soc_dapm_add_routes(dapm,
3401 rt5650_specific_dapm_routes,
3402 ARRAY_SIZE(rt5650_specific_dapm_routes));
3406 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
3408 /* for JD function */
3409 if (rt5645->pdata.jd_mode) {
3410 snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3411 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3412 snd_soc_dapm_sync(dapm);
3415 if (rt5645->pdata.long_name)
3416 component->card->long_name = rt5645->pdata.long_name;
3418 rt5645->eq_param = devm_kcalloc(component->dev,
3419 RT5645_HWEQ_NUM, sizeof(struct rt5645_eq_param_s),
3425 static void rt5645_remove(struct snd_soc_component *component)
3427 rt5645_reset(component);
3431 static int rt5645_suspend(struct snd_soc_component *component)
3433 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3435 regcache_cache_only(rt5645->regmap, true);
3436 regcache_mark_dirty(rt5645->regmap);
3441 static int rt5645_resume(struct snd_soc_component *component)
3443 struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3445 regcache_cache_only(rt5645->regmap, false);
3446 regcache_sync(rt5645->regmap);
3451 #define rt5645_suspend NULL
3452 #define rt5645_resume NULL
3455 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3456 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3457 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3459 static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3460 .hw_params = rt5645_hw_params,
3461 .set_fmt = rt5645_set_dai_fmt,
3462 .set_sysclk = rt5645_set_dai_sysclk,
3463 .set_tdm_slot = rt5645_set_tdm_slot,
3464 .set_pll = rt5645_set_dai_pll,
3467 static struct snd_soc_dai_driver rt5645_dai[] = {
3469 .name = "rt5645-aif1",
3472 .stream_name = "AIF1 Playback",
3475 .rates = RT5645_STEREO_RATES,
3476 .formats = RT5645_FORMATS,
3479 .stream_name = "AIF1 Capture",
3482 .rates = RT5645_STEREO_RATES,
3483 .formats = RT5645_FORMATS,
3485 .ops = &rt5645_aif_dai_ops,
3488 .name = "rt5645-aif2",
3491 .stream_name = "AIF2 Playback",
3494 .rates = RT5645_STEREO_RATES,
3495 .formats = RT5645_FORMATS,
3498 .stream_name = "AIF2 Capture",
3501 .rates = RT5645_STEREO_RATES,
3502 .formats = RT5645_FORMATS,
3504 .ops = &rt5645_aif_dai_ops,
3508 static const struct snd_soc_component_driver soc_component_dev_rt5645 = {
3509 .probe = rt5645_probe,
3510 .remove = rt5645_remove,
3511 .suspend = rt5645_suspend,
3512 .resume = rt5645_resume,
3513 .set_bias_level = rt5645_set_bias_level,
3514 .controls = rt5645_snd_controls,
3515 .num_controls = ARRAY_SIZE(rt5645_snd_controls),
3516 .dapm_widgets = rt5645_dapm_widgets,
3517 .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
3518 .dapm_routes = rt5645_dapm_routes,
3519 .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
3520 .use_pmdown_time = 1,
3522 .non_legacy_dai_naming = 1,
3525 static const struct regmap_config rt5645_regmap = {
3528 .use_single_read = true,
3529 .use_single_write = true,
3530 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3532 .volatile_reg = rt5645_volatile_register,
3533 .readable_reg = rt5645_readable_register,
3535 .cache_type = REGCACHE_RBTREE,
3536 .reg_defaults = rt5645_reg,
3537 .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3538 .ranges = rt5645_ranges,
3539 .num_ranges = ARRAY_SIZE(rt5645_ranges),
3542 static const struct regmap_config rt5650_regmap = {
3545 .use_single_read = true,
3546 .use_single_write = true,
3547 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3549 .volatile_reg = rt5645_volatile_register,
3550 .readable_reg = rt5645_readable_register,
3552 .cache_type = REGCACHE_RBTREE,
3553 .reg_defaults = rt5650_reg,
3554 .num_reg_defaults = ARRAY_SIZE(rt5650_reg),
3555 .ranges = rt5645_ranges,
3556 .num_ranges = ARRAY_SIZE(rt5645_ranges),
3559 static const struct regmap_config temp_regmap = {
3563 .use_single_read = true,
3564 .use_single_write = true,
3565 .max_register = RT5645_VENDOR_ID2 + 1,
3566 .cache_type = REGCACHE_NONE,
3569 static const struct i2c_device_id rt5645_i2c_id[] = {
3574 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3577 static const struct of_device_id rt5645_of_match[] = {
3578 { .compatible = "realtek,rt5645", },
3579 { .compatible = "realtek,rt5650", },
3582 MODULE_DEVICE_TABLE(of, rt5645_of_match);
3586 static const struct acpi_device_id rt5645_acpi_match[] = {
3594 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3597 static const struct rt5645_platform_data intel_braswell_platform_data = {
3598 .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3599 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3603 static const struct rt5645_platform_data buddy_platform_data = {
3604 .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3605 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3607 .level_trigger_irq = true,
3610 static const struct rt5645_platform_data gpd_win_platform_data = {
3613 .long_name = "gpd-win-pocket-rt5645",
3614 /* The GPD pocket has a diff. mic, for the win this does not matter. */
3618 static const struct rt5645_platform_data asus_t100ha_platform_data = {
3619 .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3620 .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3625 static const struct rt5645_platform_data lenovo_ideapad_miix_310_pdata = {
3630 static const struct rt5645_platform_data jd_mode3_platform_data = {
3634 static const struct dmi_system_id dmi_platform_data[] = {
3636 .ident = "Chrome Buddy",
3638 DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"),
3640 .driver_data = (void *)&buddy_platform_data,
3643 .ident = "Intel Strago",
3645 DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3647 .driver_data = (void *)&intel_braswell_platform_data,
3650 .ident = "Google Chrome",
3652 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
3654 .driver_data = (void *)&intel_braswell_platform_data,
3657 .ident = "Google Setzer",
3659 DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
3661 .driver_data = (void *)&intel_braswell_platform_data,
3664 .ident = "Microsoft Surface 3",
3666 DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
3668 .driver_data = (void *)&intel_braswell_platform_data,
3672 * Match for the GPDwin which unfortunately uses somewhat
3673 * generic dmi strings, which is why we test for 4 strings.
3674 * Comparing against 23 other byt/cht boards, board_vendor
3675 * and board_name are unique to the GPDwin, where as only one
3676 * other board has the same board_serial and 3 others have
3677 * the same default product_name. Also the GPDwin is the
3678 * only device to have both board_ and product_name not set.
3680 .ident = "GPD Win / Pocket",
3682 DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3683 DMI_MATCH(DMI_BOARD_NAME, "Default string"),
3684 DMI_MATCH(DMI_BOARD_SERIAL, "Default string"),
3685 DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3687 .driver_data = (void *)&gpd_win_platform_data,
3690 .ident = "ASUS T100HAN",
3692 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3693 DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
3695 .driver_data = (void *)&asus_t100ha_platform_data,
3698 .ident = "MINIX Z83-4",
3700 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"),
3701 DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),
3703 .driver_data = (void *)&jd_mode3_platform_data,
3706 .ident = "Teclast X80 Pro",
3708 DMI_MATCH(DMI_SYS_VENDOR, "TECLAST"),
3709 DMI_MATCH(DMI_PRODUCT_NAME, "X80 Pro"),
3711 .driver_data = (void *)&jd_mode3_platform_data,
3714 .ident = "Lenovo Ideapad Miix 310",
3716 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3717 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80SG"),
3718 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "MIIX 310-10ICR"),
3720 .driver_data = (void *)&lenovo_ideapad_miix_310_pdata,
3723 .ident = "Lenovo Ideapad Miix 320",
3725 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3726 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80XF"),
3727 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
3729 .driver_data = (void *)&intel_braswell_platform_data,
3734 static bool rt5645_check_dp(struct device *dev)
3736 if (device_property_present(dev, "realtek,in2-differential") ||
3737 device_property_present(dev, "realtek,dmic1-data-pin") ||
3738 device_property_present(dev, "realtek,dmic2-data-pin") ||
3739 device_property_present(dev, "realtek,jd-mode"))
3745 static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3747 rt5645->pdata.in2_diff = device_property_read_bool(dev,
3748 "realtek,in2-differential");
3749 device_property_read_u32(dev,
3750 "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3751 device_property_read_u32(dev,
3752 "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3753 device_property_read_u32(dev,
3754 "realtek,jd-mode", &rt5645->pdata.jd_mode);
3759 static int rt5645_i2c_probe(struct i2c_client *i2c,
3760 const struct i2c_device_id *id)
3762 struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
3763 const struct dmi_system_id *dmi_data;
3764 struct rt5645_priv *rt5645;
3767 struct regmap *regmap;
3769 rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3775 i2c_set_clientdata(i2c, rt5645);
3777 dmi_data = dmi_first_match(dmi_platform_data);
3779 dev_info(&i2c->dev, "Detected %s platform\n", dmi_data->ident);
3780 pdata = dmi_data->driver_data;
3784 rt5645->pdata = *pdata;
3785 else if (rt5645_check_dp(&i2c->dev))
3786 rt5645_parse_dt(rt5645, &i2c->dev);
3788 rt5645->pdata = jd_mode3_platform_data;
3791 rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
3792 rt5645->pdata.level_trigger_irq = QUIRK_LEVEL_IRQ(quirk);
3793 rt5645->pdata.inv_jd1_1 = QUIRK_INV_JD1_1(quirk);
3794 rt5645->pdata.jd_mode = QUIRK_JD_MODE(quirk);
3795 rt5645->pdata.dmic1_data_pin = QUIRK_DMIC1_DATA_PIN(quirk);
3796 rt5645->pdata.dmic2_data_pin = QUIRK_DMIC2_DATA_PIN(quirk);
3799 rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3802 if (IS_ERR(rt5645->gpiod_hp_det)) {
3803 dev_info(&i2c->dev, "failed to initialize gpiod\n");
3804 ret = PTR_ERR(rt5645->gpiod_hp_det);
3806 * Continue if optional gpiod is missing, bail for all other
3807 * errors, including -EPROBE_DEFER
3813 for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3814 rt5645->supplies[i].supply = rt5645_supply_names[i];
3816 ret = devm_regulator_bulk_get(&i2c->dev,
3817 ARRAY_SIZE(rt5645->supplies),
3820 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3824 ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3827 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3831 regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
3832 if (IS_ERR(regmap)) {
3833 ret = PTR_ERR(regmap);
3834 dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n",
3840 * Read after 400msec, as it is the interval required between
3841 * read and power On.
3843 msleep(TIME_TO_POWER_MS);
3844 regmap_read(regmap, RT5645_VENDOR_ID2, &val);
3847 case RT5645_DEVICE_ID:
3848 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3849 rt5645->codec_type = CODEC_TYPE_RT5645;
3851 case RT5650_DEVICE_ID:
3852 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5650_regmap);
3853 rt5645->codec_type = CODEC_TYPE_RT5650;
3857 "Device with ID register %#x is not rt5645 or rt5650\n",
3863 if (IS_ERR(rt5645->regmap)) {
3864 ret = PTR_ERR(rt5645->regmap);
3865 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3870 regmap_write(rt5645->regmap, RT5645_RESET, 0);
3872 regmap_read(regmap, RT5645_VENDOR_ID, &val);
3873 rt5645->v_id = val & 0xff;
3875 regmap_write(rt5645->regmap, RT5645_AD_DA_MIXER, 0x8080);
3877 ret = regmap_register_patch(rt5645->regmap, init_list,
3878 ARRAY_SIZE(init_list));
3880 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3882 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3883 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3884 ARRAY_SIZE(rt5650_init_list));
3886 dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
3890 regmap_update_bits(rt5645->regmap, RT5645_CLSD_OUT_CTRL, 0xc0, 0xc0);
3892 if (rt5645->pdata.in2_diff)
3893 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
3894 RT5645_IN_DF2, RT5645_IN_DF2);
3896 if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
3897 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3898 RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
3900 switch (rt5645->pdata.dmic1_data_pin) {
3901 case RT5645_DMIC_DATA_IN2N:
3902 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3903 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
3906 case RT5645_DMIC_DATA_GPIO5:
3907 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3908 RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
3909 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3910 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3911 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3912 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
3915 case RT5645_DMIC_DATA_GPIO11:
3916 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3917 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
3918 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3919 RT5645_GP11_PIN_MASK,
3920 RT5645_GP11_PIN_DMIC1_SDA);
3927 switch (rt5645->pdata.dmic2_data_pin) {
3928 case RT5645_DMIC_DATA_IN2P:
3929 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3930 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3933 case RT5645_DMIC_DATA_GPIO6:
3934 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3935 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3936 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3937 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3940 case RT5645_DMIC_DATA_GPIO10:
3941 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3942 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3943 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3944 RT5645_GP10_PIN_MASK,
3945 RT5645_GP10_PIN_DMIC2_SDA);
3948 case RT5645_DMIC_DATA_GPIO12:
3949 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3950 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
3951 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3952 RT5645_GP12_PIN_MASK,
3953 RT5645_GP12_PIN_DMIC2_SDA);
3960 if (rt5645->pdata.jd_mode) {
3961 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3962 RT5645_IRQ_CLK_GATE_CTRL,
3963 RT5645_IRQ_CLK_GATE_CTRL);
3964 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3965 RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
3966 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3967 RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
3968 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3969 RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
3970 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
3971 RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
3972 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3973 RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
3974 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3975 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3976 switch (rt5645->pdata.jd_mode) {
3978 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3979 RT5645_JD1_MODE_MASK,
3983 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3984 RT5645_JD1_MODE_MASK,
3988 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3989 RT5645_JD1_MODE_MASK,
3995 if (rt5645->pdata.inv_jd1_1) {
3996 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3997 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4001 regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
4002 RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
4004 if (rt5645->pdata.level_trigger_irq) {
4005 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4006 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4008 timer_setup(&rt5645->btn_check_timer, rt5645_btn_check_callback, 0);
4010 INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
4011 INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);
4013 if (rt5645->i2c->irq) {
4014 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
4015 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4016 | IRQF_ONESHOT, "rt5645", rt5645);
4018 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4023 ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5645,
4024 rt5645_dai, ARRAY_SIZE(rt5645_dai));
4031 if (rt5645->i2c->irq)
4032 free_irq(rt5645->i2c->irq, rt5645);
4034 regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4038 static int rt5645_i2c_remove(struct i2c_client *i2c)
4040 struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4043 free_irq(i2c->irq, rt5645);
4045 cancel_delayed_work_sync(&rt5645->jack_detect_work);
4046 cancel_delayed_work_sync(&rt5645->rcclock_work);
4047 del_timer_sync(&rt5645->btn_check_timer);
4049 regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4054 static void rt5645_i2c_shutdown(struct i2c_client *i2c)
4056 struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4058 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4059 RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
4060 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
4062 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
4065 regmap_write(rt5645->regmap, RT5645_RESET, 0);
4068 static struct i2c_driver rt5645_i2c_driver = {
4071 .of_match_table = of_match_ptr(rt5645_of_match),
4072 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
4074 .probe = rt5645_i2c_probe,
4075 .remove = rt5645_i2c_remove,
4076 .shutdown = rt5645_i2c_shutdown,
4077 .id_table = rt5645_i2c_id,
4079 module_i2c_driver(rt5645_i2c_driver);
4081 MODULE_DESCRIPTION("ASoC RT5645 driver");
4082 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4083 MODULE_LICENSE("GPL v2");