1 // SPDX-License-Identifier: GPL-2.0
3 * rt1011.c -- rt1011 ALSA SoC amplifier component driver
5 * Copyright(c) 2019 Realtek Semiconductor Corp.
7 * Author: Shuming Fan <shumingf@realtek.com>
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
16 #include <linux/gpio.h>
17 #include <linux/i2c.h>
18 #include <linux/acpi.h>
19 #include <linux/regmap.h>
20 #include <linux/of_gpio.h>
21 #include <linux/platform_device.h>
22 #include <linux/firmware.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 #include <sound/tlv.h>
34 static int rt1011_calibrate(struct rt1011_priv *rt1011,
35 unsigned char cali_flag);
37 static const struct reg_sequence init_list[] = {
39 { RT1011_POWER_9, 0xa840 },
41 { RT1011_ADC_SET_5, 0x0a20 },
42 { RT1011_DAC_SET_2, 0xa032 },
43 { RT1011_ADC_SET_1, 0x2925 },
45 { RT1011_SPK_PRO_DC_DET_1, 0xb00c },
46 { RT1011_SPK_PRO_DC_DET_2, 0xcccc },
48 { RT1011_A_TIMING_1, 0x6054 },
50 { RT1011_POWER_7, 0x3e55 },
51 { RT1011_POWER_8, 0x0520 },
52 { RT1011_BOOST_CON_1, 0xe188 },
53 { RT1011_POWER_4, 0x16f2 },
55 { RT1011_CROSS_BQ_SET_1, 0x0004 },
56 { RT1011_SIL_DET, 0xc313 },
57 { RT1011_SINE_GEN_REG_1, 0x0707 },
59 { RT1011_DC_CALIB_CLASSD_3, 0xcb00 },
61 { RT1011_DAC_SET_1, 0xe702 },
62 { RT1011_DAC_SET_3, 0x2004 },
65 static const struct reg_default rt1011_reg[] = {
682 static int rt1011_reg_init(struct snd_soc_component *component)
684 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
686 regmap_multi_reg_write(rt1011->regmap,
687 init_list, ARRAY_SIZE(init_list));
691 static bool rt1011_volatile_register(struct device *dev, unsigned int reg)
698 case RT1011_VERSION_ID:
699 case RT1011_VENDOR_ID:
700 case RT1011_DEVICE_ID:
702 case RT1011_DAC_SET_3:
704 case RT1011_SPK_VOL_TEST_OUT:
705 case RT1011_VBAT_VOL_DET_1:
706 case RT1011_VBAT_TEST_OUT_1:
707 case RT1011_VBAT_TEST_OUT_2:
708 case RT1011_VBAT_PROTECTION:
709 case RT1011_VBAT_DET:
710 case RT1011_BOOST_CON_1:
711 case RT1011_SHORT_CIRCUIT_DET_1:
712 case RT1011_SPK_TEMP_PROTECT_3:
713 case RT1011_SPK_TEMP_PROTECT_6:
714 case RT1011_SPK_PRO_DC_DET_3:
715 case RT1011_SPK_PRO_DC_DET_7:
716 case RT1011_SPK_PRO_DC_DET_8:
719 case RT1011_EXCUR_PROTECT_1:
720 case RT1011_CROSS_BQ_SET_1:
721 case RT1011_CROSS_BQ_SET_2:
722 case RT1011_BQ_SET_0:
723 case RT1011_BQ_SET_1:
724 case RT1011_BQ_SET_2:
725 case RT1011_TEST_PAD_STATUS:
726 case RT1011_DC_CALIB_CLASSD_1:
727 case RT1011_DC_CALIB_CLASSD_5:
728 case RT1011_DC_CALIB_CLASSD_6:
729 case RT1011_DC_CALIB_CLASSD_7:
730 case RT1011_DC_CALIB_CLASSD_8:
731 case RT1011_SINE_GEN_REG_2:
732 case RT1011_STP_CALIB_RS_TEMP:
733 case RT1011_SPK_RESISTANCE_1:
734 case RT1011_SPK_RESISTANCE_2:
735 case RT1011_SPK_THERMAL:
736 case RT1011_ALC_BK_GAIN_O:
737 case RT1011_ALC_BK_GAIN_O_PRE:
738 case RT1011_SPK_DC_O_23_16:
739 case RT1011_SPK_DC_O_15_0:
740 case RT1011_INIT_RECIPROCAL_SYN_24_16:
741 case RT1011_INIT_RECIPROCAL_SYN_15_0:
742 case RT1011_SPK_EXCURSION_23_16:
743 case RT1011_SPK_EXCURSION_15_0:
744 case RT1011_SEP_MAIN_OUT_23_16:
745 case RT1011_SEP_MAIN_OUT_15_0:
746 case RT1011_ALC_DRC_HB_INTERNAL_5:
747 case RT1011_ALC_DRC_HB_INTERNAL_6:
748 case RT1011_ALC_DRC_HB_INTERNAL_7:
749 case RT1011_ALC_DRC_BB_INTERNAL_5:
750 case RT1011_ALC_DRC_BB_INTERNAL_6:
751 case RT1011_ALC_DRC_BB_INTERNAL_7:
752 case RT1011_ALC_DRC_POS_INTERNAL_5:
753 case RT1011_ALC_DRC_POS_INTERNAL_6:
754 case RT1011_ALC_DRC_POS_INTERNAL_7:
755 case RT1011_ALC_DRC_POS_INTERNAL_8:
756 case RT1011_ALC_DRC_POS_INTERNAL_9:
757 case RT1011_ALC_DRC_POS_INTERNAL_10:
758 case RT1011_ALC_DRC_POS_INTERNAL_11:
760 case RT1011_EFUSE_CONTROL_1:
761 case RT1011_EFUSE_CONTROL_2:
762 case RT1011_EFUSE_MATCH_DONE ... RT1011_EFUSE_READ_R0_3_15_0:
770 static bool rt1011_readable_register(struct device *dev, unsigned int reg)
785 case RT1011_PRIV_INDEX:
786 case RT1011_PRIV_DATA:
787 case RT1011_CUSTOMER_ID:
789 case RT1011_VERSION_ID:
790 case RT1011_VENDOR_ID:
791 case RT1011_DEVICE_ID:
792 case RT1011_DUM_RW_0:
794 case RT1011_DUM_RW_1:
796 case RT1011_MAN_I2C_DEV:
797 case RT1011_DAC_SET_1:
798 case RT1011_DAC_SET_2:
799 case RT1011_DAC_SET_3:
801 case RT1011_ADC_SET_1:
802 case RT1011_ADC_SET_2:
803 case RT1011_ADC_SET_3:
804 case RT1011_ADC_SET_4:
805 case RT1011_ADC_SET_5:
806 case RT1011_TDM_TOTAL_SET:
807 case RT1011_TDM1_SET_TCON:
808 case RT1011_TDM1_SET_1:
809 case RT1011_TDM1_SET_2:
810 case RT1011_TDM1_SET_3:
811 case RT1011_TDM1_SET_4:
812 case RT1011_TDM1_SET_5:
813 case RT1011_TDM2_SET_1:
814 case RT1011_TDM2_SET_2:
815 case RT1011_TDM2_SET_3:
816 case RT1011_TDM2_SET_4:
817 case RT1011_TDM2_SET_5:
821 case RT1011_ADRC_LIMIT:
823 case RT1011_A_TIMING_1:
824 case RT1011_A_TIMING_2:
825 case RT1011_A_TEMP_SEN:
826 case RT1011_SPK_VOL_DET_1:
827 case RT1011_SPK_VOL_DET_2:
828 case RT1011_SPK_VOL_TEST_OUT:
829 case RT1011_VBAT_VOL_DET_1:
830 case RT1011_VBAT_VOL_DET_2:
831 case RT1011_VBAT_TEST_OUT_1:
832 case RT1011_VBAT_TEST_OUT_2:
833 case RT1011_VBAT_PROTECTION:
834 case RT1011_VBAT_DET:
844 case RT1011_CLASS_D_POS:
845 case RT1011_BOOST_CON_1:
846 case RT1011_BOOST_CON_2:
847 case RT1011_ANALOG_CTRL:
848 case RT1011_POWER_SEQ:
849 case RT1011_SHORT_CIRCUIT_DET_1:
850 case RT1011_SHORT_CIRCUIT_DET_2:
851 case RT1011_SPK_TEMP_PROTECT_0:
852 case RT1011_SPK_TEMP_PROTECT_1:
853 case RT1011_SPK_TEMP_PROTECT_2:
854 case RT1011_SPK_TEMP_PROTECT_3:
855 case RT1011_SPK_TEMP_PROTECT_4:
856 case RT1011_SPK_TEMP_PROTECT_5:
857 case RT1011_SPK_TEMP_PROTECT_6:
858 case RT1011_SPK_TEMP_PROTECT_7:
859 case RT1011_SPK_TEMP_PROTECT_8:
860 case RT1011_SPK_TEMP_PROTECT_9:
861 case RT1011_SPK_PRO_DC_DET_1:
862 case RT1011_SPK_PRO_DC_DET_2:
863 case RT1011_SPK_PRO_DC_DET_3:
864 case RT1011_SPK_PRO_DC_DET_4:
865 case RT1011_SPK_PRO_DC_DET_5:
866 case RT1011_SPK_PRO_DC_DET_6:
867 case RT1011_SPK_PRO_DC_DET_7:
868 case RT1011_SPK_PRO_DC_DET_8:
873 case RT1011_THER_FOLD_BACK_1:
874 case RT1011_THER_FOLD_BACK_2:
875 case RT1011_EXCUR_PROTECT_1:
876 case RT1011_EXCUR_PROTECT_2:
877 case RT1011_EXCUR_PROTECT_3:
878 case RT1011_EXCUR_PROTECT_4:
879 case RT1011_BAT_GAIN_1:
880 case RT1011_BAT_GAIN_2:
881 case RT1011_BAT_GAIN_3:
882 case RT1011_BAT_GAIN_4:
883 case RT1011_BAT_GAIN_5:
884 case RT1011_BAT_GAIN_6:
885 case RT1011_BAT_GAIN_7:
886 case RT1011_BAT_GAIN_8:
887 case RT1011_BAT_GAIN_9:
888 case RT1011_BAT_GAIN_10:
889 case RT1011_BAT_GAIN_11:
890 case RT1011_BAT_RT_THMAX_1:
891 case RT1011_BAT_RT_THMAX_2:
892 case RT1011_BAT_RT_THMAX_3:
893 case RT1011_BAT_RT_THMAX_4:
894 case RT1011_BAT_RT_THMAX_5:
895 case RT1011_BAT_RT_THMAX_6:
896 case RT1011_BAT_RT_THMAX_7:
897 case RT1011_BAT_RT_THMAX_8:
898 case RT1011_BAT_RT_THMAX_9:
899 case RT1011_BAT_RT_THMAX_10:
900 case RT1011_BAT_RT_THMAX_11:
901 case RT1011_BAT_RT_THMAX_12:
902 case RT1011_SPREAD_SPECTURM:
903 case RT1011_PRO_GAIN_MODE:
904 case RT1011_RT_DRC_CROSS:
905 case RT1011_RT_DRC_HB_1:
906 case RT1011_RT_DRC_HB_2:
907 case RT1011_RT_DRC_HB_3:
908 case RT1011_RT_DRC_HB_4:
909 case RT1011_RT_DRC_HB_5:
910 case RT1011_RT_DRC_HB_6:
911 case RT1011_RT_DRC_HB_7:
912 case RT1011_RT_DRC_HB_8:
913 case RT1011_RT_DRC_BB_1:
914 case RT1011_RT_DRC_BB_2:
915 case RT1011_RT_DRC_BB_3:
916 case RT1011_RT_DRC_BB_4:
917 case RT1011_RT_DRC_BB_5:
918 case RT1011_RT_DRC_BB_6:
919 case RT1011_RT_DRC_BB_7:
920 case RT1011_RT_DRC_BB_8:
921 case RT1011_RT_DRC_POS_1:
922 case RT1011_RT_DRC_POS_2:
923 case RT1011_RT_DRC_POS_3:
924 case RT1011_RT_DRC_POS_4:
925 case RT1011_RT_DRC_POS_5:
926 case RT1011_RT_DRC_POS_6:
927 case RT1011_RT_DRC_POS_7:
928 case RT1011_RT_DRC_POS_8:
929 case RT1011_CROSS_BQ_SET_1:
930 case RT1011_CROSS_BQ_SET_2:
931 case RT1011_BQ_SET_0:
932 case RT1011_BQ_SET_1:
933 case RT1011_BQ_SET_2:
934 case RT1011_BQ_PRE_GAIN_28_16:
935 case RT1011_BQ_PRE_GAIN_15_0:
936 case RT1011_BQ_POST_GAIN_28_16:
937 case RT1011_BQ_POST_GAIN_15_0:
938 case RT1011_BQ_H0_28_16 ... RT1011_BQ_A2_15_0:
939 case RT1011_BQ_1_H0_28_16 ... RT1011_BQ_1_A2_15_0:
940 case RT1011_BQ_2_H0_28_16 ... RT1011_BQ_2_A2_15_0:
941 case RT1011_BQ_3_H0_28_16 ... RT1011_BQ_3_A2_15_0:
942 case RT1011_BQ_4_H0_28_16 ... RT1011_BQ_4_A2_15_0:
943 case RT1011_BQ_5_H0_28_16 ... RT1011_BQ_5_A2_15_0:
944 case RT1011_BQ_6_H0_28_16 ... RT1011_BQ_6_A2_15_0:
945 case RT1011_BQ_7_H0_28_16 ... RT1011_BQ_7_A2_15_0:
946 case RT1011_BQ_8_H0_28_16 ... RT1011_BQ_8_A2_15_0:
947 case RT1011_BQ_9_H0_28_16 ... RT1011_BQ_9_A2_15_0:
948 case RT1011_BQ_10_H0_28_16 ... RT1011_BQ_10_A2_15_0:
949 case RT1011_TEST_PAD_STATUS ... RT1011_PLL_INTERNAL_SET:
950 case RT1011_TEST_OUT_1 ... RT1011_TEST_OUT_3:
951 case RT1011_DC_CALIB_CLASSD_1 ... RT1011_DC_CALIB_CLASSD_10:
952 case RT1011_CLASSD_INTERNAL_SET_1 ... RT1011_VREF_LV_1:
953 case RT1011_SMART_BOOST_TIMING_1 ... RT1011_SMART_BOOST_TIMING_36:
954 case RT1011_SINE_GEN_REG_1 ... RT1011_SINE_GEN_REG_3:
955 case RT1011_STP_INITIAL_RS_TEMP ... RT1011_SPK_THERMAL:
956 case RT1011_STP_OTP_TH ... RT1011_INIT_RECIPROCAL_SYN_15_0:
957 case RT1011_STP_BQ_1_A1_L_28_16 ... RT1011_STP_BQ_1_H0_R_15_0:
958 case RT1011_STP_BQ_2_A1_L_28_16 ... RT1011_SEP_RE_REG_15_0:
959 case RT1011_DRC_CF_PARAMS_1 ... RT1011_DRC_CF_PARAMS_12:
960 case RT1011_ALC_DRC_HB_INTERNAL_1 ... RT1011_ALC_DRC_HB_INTERNAL_7:
961 case RT1011_ALC_DRC_BB_INTERNAL_1 ... RT1011_ALC_DRC_BB_INTERNAL_7:
962 case RT1011_ALC_DRC_POS_INTERNAL_1 ... RT1011_ALC_DRC_POS_INTERNAL_8:
963 case RT1011_ALC_DRC_POS_INTERNAL_9 ... RT1011_BQ_1_PARAMS_CHECK_5:
964 case RT1011_BQ_2_PARAMS_CHECK_1 ... RT1011_BQ_2_PARAMS_CHECK_5:
965 case RT1011_BQ_3_PARAMS_CHECK_1 ... RT1011_BQ_3_PARAMS_CHECK_5:
966 case RT1011_BQ_4_PARAMS_CHECK_1 ... RT1011_BQ_4_PARAMS_CHECK_5:
967 case RT1011_BQ_5_PARAMS_CHECK_1 ... RT1011_BQ_5_PARAMS_CHECK_5:
968 case RT1011_BQ_6_PARAMS_CHECK_1 ... RT1011_BQ_6_PARAMS_CHECK_5:
969 case RT1011_BQ_7_PARAMS_CHECK_1 ... RT1011_BQ_7_PARAMS_CHECK_5:
970 case RT1011_BQ_8_PARAMS_CHECK_1 ... RT1011_BQ_8_PARAMS_CHECK_5:
971 case RT1011_BQ_9_PARAMS_CHECK_1 ... RT1011_BQ_9_PARAMS_CHECK_5:
972 case RT1011_BQ_10_PARAMS_CHECK_1 ... RT1011_BQ_10_PARAMS_CHECK_5:
973 case RT1011_IRQ_1 ... RT1011_PART_NUMBER_EFUSE:
974 case RT1011_EFUSE_CONTROL_1 ... RT1011_EFUSE_READ_R0_3_15_0:
981 static const char * const rt1011_din_source_select[] = {
984 "Left + Right average",
987 static SOC_ENUM_SINGLE_DECL(rt1011_din_source_enum, RT1011_CROSS_BQ_SET_1, 5,
988 rt1011_din_source_select);
990 static const char * const rt1011_tdm_data_out_select[] = {
991 "TDM_O_LR", "BQ1", "DVOL", "BQ10", "ALC", "DMIX", "ADC_SRC_LR",
992 "ADC_O_LR", "ADC_MONO", "RSPK_BPF_LR", "DMIX_ADD", "ENVELOPE_FS",
993 "SEP_O_GAIN", "ALC_BK_GAIN", "STP_V_C", "DMIX_ABST"
996 static const char * const rt1011_tdm_l_ch_data_select[] = {
997 "Slot0", "Slot1", "Slot2", "Slot3", "Slot4", "Slot5", "Slot6", "Slot7"
999 static SOC_ENUM_SINGLE_DECL(rt1011_tdm1_l_dac1_enum, RT1011_TDM1_SET_4, 12,
1000 rt1011_tdm_l_ch_data_select);
1001 static SOC_ENUM_SINGLE_DECL(rt1011_tdm2_l_dac1_enum, RT1011_TDM2_SET_4, 12,
1002 rt1011_tdm_l_ch_data_select);
1004 static SOC_ENUM_SINGLE_DECL(rt1011_tdm1_adc1_dat_enum,
1005 RT1011_ADCDAT_OUT_SOURCE, 0, rt1011_tdm_data_out_select);
1006 static SOC_ENUM_SINGLE_DECL(rt1011_tdm1_adc1_loc_enum, RT1011_TDM1_SET_2, 0,
1007 rt1011_tdm_l_ch_data_select);
1009 static const char * const rt1011_adc_data_mode_select[] = {
1012 static SOC_ENUM_SINGLE_DECL(rt1011_adc_dout_mode_enum, RT1011_TDM1_SET_1, 12,
1013 rt1011_adc_data_mode_select);
1015 static const char * const rt1011_tdm_adc_data_len_control[] = {
1016 "1CH", "2CH", "3CH", "4CH", "5CH", "6CH", "7CH", "8CH"
1018 static SOC_ENUM_SINGLE_DECL(rt1011_tdm1_dout_len_enum, RT1011_TDM1_SET_2, 13,
1019 rt1011_tdm_adc_data_len_control);
1020 static SOC_ENUM_SINGLE_DECL(rt1011_tdm2_dout_len_enum, RT1011_TDM2_SET_2, 13,
1021 rt1011_tdm_adc_data_len_control);
1023 static const char * const rt1011_tdm_adc_swap_select[] = {
1024 "L/R", "R/L", "L/L", "R/R"
1027 static SOC_ENUM_SINGLE_DECL(rt1011_tdm_adc1_1_enum, RT1011_TDM1_SET_3, 6,
1028 rt1011_tdm_adc_swap_select);
1029 static SOC_ENUM_SINGLE_DECL(rt1011_tdm_adc2_1_enum, RT1011_TDM1_SET_3, 4,
1030 rt1011_tdm_adc_swap_select);
1032 static void rt1011_reset(struct regmap *regmap)
1034 regmap_write(regmap, RT1011_RESET, 0);
1037 static int rt1011_recv_spk_mode_get(struct snd_kcontrol *kcontrol,
1038 struct snd_ctl_elem_value *ucontrol)
1040 struct snd_soc_component *component =
1041 snd_soc_kcontrol_component(kcontrol);
1042 struct rt1011_priv *rt1011 =
1043 snd_soc_component_get_drvdata(component);
1045 ucontrol->value.integer.value[0] = rt1011->recv_spk_mode;
1050 static int rt1011_recv_spk_mode_put(struct snd_kcontrol *kcontrol,
1051 struct snd_ctl_elem_value *ucontrol)
1053 struct snd_soc_component *component =
1054 snd_soc_kcontrol_component(kcontrol);
1055 struct rt1011_priv *rt1011 =
1056 snd_soc_component_get_drvdata(component);
1058 if (ucontrol->value.integer.value[0] == rt1011->recv_spk_mode)
1061 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1062 rt1011->recv_spk_mode = ucontrol->value.integer.value[0];
1064 if (rt1011->recv_spk_mode) {
1066 /* 1: recevier mode on */
1067 snd_soc_component_update_bits(component,
1068 RT1011_CLASSD_INTERNAL_SET_3,
1069 RT1011_REG_GAIN_CLASSD_RI_SPK_MASK,
1070 RT1011_REG_GAIN_CLASSD_RI_410K);
1071 snd_soc_component_update_bits(component,
1072 RT1011_CLASSD_INTERNAL_SET_1,
1073 RT1011_RECV_MODE_SPK_MASK,
1076 /* 0: speaker mode on */
1077 snd_soc_component_update_bits(component,
1078 RT1011_CLASSD_INTERNAL_SET_3,
1079 RT1011_REG_GAIN_CLASSD_RI_SPK_MASK,
1080 RT1011_REG_GAIN_CLASSD_RI_72P5K);
1081 snd_soc_component_update_bits(component,
1082 RT1011_CLASSD_INTERNAL_SET_1,
1083 RT1011_RECV_MODE_SPK_MASK,
1091 static bool rt1011_validate_bq_drc_coeff(unsigned short reg)
1093 if ((reg == RT1011_DAC_SET_1) |
1094 (reg >= RT1011_ADC_SET && reg <= RT1011_ADC_SET_1) |
1095 (reg == RT1011_ADC_SET_4) | (reg == RT1011_ADC_SET_5) |
1096 (reg == RT1011_MIXER_1) |
1097 (reg == RT1011_A_TIMING_1) | (reg >= RT1011_POWER_7 &&
1098 reg <= RT1011_POWER_8) |
1099 (reg == RT1011_CLASS_D_POS) | (reg == RT1011_ANALOG_CTRL) |
1100 (reg >= RT1011_SPK_TEMP_PROTECT_0 &&
1101 reg <= RT1011_SPK_TEMP_PROTECT_6) |
1102 (reg >= RT1011_SPK_PRO_DC_DET_5 && reg <= RT1011_BAT_GAIN_1) |
1103 (reg >= RT1011_RT_DRC_CROSS && reg <= RT1011_RT_DRC_POS_8) |
1104 (reg >= RT1011_CROSS_BQ_SET_1 && reg <= RT1011_BQ_10_A2_15_0) |
1105 (reg >= RT1011_SMART_BOOST_TIMING_1 &&
1106 reg <= RT1011_SMART_BOOST_TIMING_36) |
1107 (reg == RT1011_SINE_GEN_REG_1) |
1108 (reg >= RT1011_STP_ALPHA_RECIPROCAL_MSB &&
1109 reg <= RT1011_BQ_6_PARAMS_CHECK_5) |
1110 (reg >= RT1011_BQ_7_PARAMS_CHECK_1 &&
1111 reg <= RT1011_BQ_10_PARAMS_CHECK_5))
1117 static int rt1011_bq_drc_coeff_get(struct snd_kcontrol *kcontrol,
1118 struct snd_ctl_elem_value *ucontrol)
1120 struct snd_soc_component *component =
1121 snd_soc_kcontrol_component(kcontrol);
1122 struct rt1011_priv *rt1011 =
1123 snd_soc_component_get_drvdata(component);
1124 struct rt1011_bq_drc_params *bq_drc_info;
1125 struct rt1011_bq_drc_params *params =
1126 (struct rt1011_bq_drc_params *)ucontrol->value.integer.value;
1127 unsigned int i, mode_idx = 0;
1129 if (strstr(ucontrol->id.name, "AdvanceMode Initial Set"))
1130 mode_idx = RT1011_ADVMODE_INITIAL_SET;
1131 else if (strstr(ucontrol->id.name, "AdvanceMode SEP BQ Coeff"))
1132 mode_idx = RT1011_ADVMODE_SEP_BQ_COEFF;
1133 else if (strstr(ucontrol->id.name, "AdvanceMode EQ BQ Coeff"))
1134 mode_idx = RT1011_ADVMODE_EQ_BQ_COEFF;
1135 else if (strstr(ucontrol->id.name, "AdvanceMode BQ UI Coeff"))
1136 mode_idx = RT1011_ADVMODE_BQ_UI_COEFF;
1137 else if (strstr(ucontrol->id.name, "AdvanceMode SmartBoost Coeff"))
1138 mode_idx = RT1011_ADVMODE_SMARTBOOST_COEFF;
1142 pr_info("%s, id.name=%s, mode_idx=%d\n", __func__,
1143 ucontrol->id.name, mode_idx);
1144 bq_drc_info = rt1011->bq_drc_params[mode_idx];
1146 for (i = 0; i < RT1011_BQ_DRC_NUM; i++) {
1147 params[i].reg = bq_drc_info[i].reg;
1148 params[i].val = bq_drc_info[i].val;
1154 static int rt1011_bq_drc_coeff_put(struct snd_kcontrol *kcontrol,
1155 struct snd_ctl_elem_value *ucontrol)
1157 struct snd_soc_component *component =
1158 snd_soc_kcontrol_component(kcontrol);
1159 struct rt1011_priv *rt1011 =
1160 snd_soc_component_get_drvdata(component);
1161 struct rt1011_bq_drc_params *bq_drc_info;
1162 struct rt1011_bq_drc_params *params =
1163 (struct rt1011_bq_drc_params *)ucontrol->value.integer.value;
1164 unsigned int i, mode_idx = 0;
1166 if (strstr(ucontrol->id.name, "AdvanceMode Initial Set"))
1167 mode_idx = RT1011_ADVMODE_INITIAL_SET;
1168 else if (strstr(ucontrol->id.name, "AdvanceMode SEP BQ Coeff"))
1169 mode_idx = RT1011_ADVMODE_SEP_BQ_COEFF;
1170 else if (strstr(ucontrol->id.name, "AdvanceMode EQ BQ Coeff"))
1171 mode_idx = RT1011_ADVMODE_EQ_BQ_COEFF;
1172 else if (strstr(ucontrol->id.name, "AdvanceMode BQ UI Coeff"))
1173 mode_idx = RT1011_ADVMODE_BQ_UI_COEFF;
1174 else if (strstr(ucontrol->id.name, "AdvanceMode SmartBoost Coeff"))
1175 mode_idx = RT1011_ADVMODE_SMARTBOOST_COEFF;
1179 bq_drc_info = rt1011->bq_drc_params[mode_idx];
1180 memset(bq_drc_info, 0,
1181 sizeof(struct rt1011_bq_drc_params) * RT1011_BQ_DRC_NUM);
1183 pr_info("%s, id.name=%s, mode_idx=%d\n", __func__,
1184 ucontrol->id.name, mode_idx);
1185 for (i = 0; i < RT1011_BQ_DRC_NUM; i++) {
1186 bq_drc_info[i].reg = params[i].reg;
1187 bq_drc_info[i].val = params[i].val;
1190 for (i = 0; i < RT1011_BQ_DRC_NUM; i++) {
1191 if (bq_drc_info[i].reg == 0)
1193 else if (rt1011_validate_bq_drc_coeff(bq_drc_info[i].reg)) {
1194 snd_soc_component_write(component, bq_drc_info[i].reg,
1195 bq_drc_info[i].val);
1202 static int rt1011_bq_drc_info(struct snd_kcontrol *kcontrol,
1203 struct snd_ctl_elem_info *uinfo)
1205 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1207 uinfo->value.integer.max = 0x17ffffff;
1212 #define RT1011_BQ_DRC(xname) \
1213 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1214 .info = rt1011_bq_drc_info, \
1215 .get = rt1011_bq_drc_coeff_get, \
1216 .put = rt1011_bq_drc_coeff_put \
1219 static int rt1011_r0_cali_get(struct snd_kcontrol *kcontrol,
1220 struct snd_ctl_elem_value *ucontrol)
1222 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
1223 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
1225 ucontrol->value.integer.value[0] = rt1011->cali_done;
1230 static int rt1011_r0_cali_put(struct snd_kcontrol *kcontrol,
1231 struct snd_ctl_elem_value *ucontrol)
1233 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
1234 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
1236 rt1011->cali_done = 0;
1237 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF &&
1238 ucontrol->value.integer.value[0])
1239 rt1011_calibrate(rt1011, 1);
1244 static int rt1011_r0_load(struct rt1011_priv *rt1011)
1246 if (!rt1011->r0_reg)
1249 /* write R0 to register */
1250 regmap_write(rt1011->regmap, RT1011_INIT_RECIPROCAL_REG_24_16,
1251 ((rt1011->r0_reg>>16) & 0x1ff));
1252 regmap_write(rt1011->regmap, RT1011_INIT_RECIPROCAL_REG_15_0,
1253 (rt1011->r0_reg & 0xffff));
1254 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_4, 0x4080);
1259 static int rt1011_r0_load_mode_get(struct snd_kcontrol *kcontrol,
1260 struct snd_ctl_elem_value *ucontrol)
1262 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
1263 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
1265 ucontrol->value.integer.value[0] = rt1011->r0_reg;
1270 static int rt1011_r0_load_mode_put(struct snd_kcontrol *kcontrol,
1271 struct snd_ctl_elem_value *ucontrol)
1273 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
1274 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
1276 unsigned int r0_integer, r0_factor, format;
1278 if (ucontrol->value.integer.value[0] == rt1011->r0_reg)
1281 if (ucontrol->value.integer.value[0] == 0)
1284 dev = regmap_get_device(rt1011->regmap);
1285 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1286 rt1011->r0_reg = ucontrol->value.integer.value[0];
1288 format = 2147483648U; /* 2^24 * 128 */
1289 r0_integer = format / rt1011->r0_reg / 128;
1290 r0_factor = ((format / rt1011->r0_reg * 100) / 128)
1291 - (r0_integer * 100);
1292 dev_info(dev, "New r0 resistance about %d.%02d ohm, reg=0x%X\n",
1293 r0_integer, r0_factor, rt1011->r0_reg);
1296 rt1011_r0_load(rt1011);
1302 static int rt1011_r0_load_info(struct snd_kcontrol *kcontrol,
1303 struct snd_ctl_elem_info *uinfo)
1305 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1307 uinfo->value.integer.max = 0x1ffffff;
1312 #define RT1011_R0_LOAD(xname) \
1313 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1314 .info = rt1011_r0_load_info, \
1315 .get = rt1011_r0_load_mode_get, \
1316 .put = rt1011_r0_load_mode_put \
1319 static const struct snd_kcontrol_new rt1011_snd_controls[] = {
1320 /* I2S Data In Selection */
1321 SOC_ENUM("DIN Source", rt1011_din_source_enum),
1323 /* TDM Data In Selection */
1324 SOC_ENUM("TDM1 DIN Source", rt1011_tdm1_l_dac1_enum),
1325 SOC_ENUM("TDM2 DIN Source", rt1011_tdm2_l_dac1_enum),
1327 /* TDM1 Data Out Selection */
1328 SOC_ENUM("TDM1 DOUT Source", rt1011_tdm1_adc1_dat_enum),
1329 SOC_ENUM("TDM1 DOUT Location", rt1011_tdm1_adc1_loc_enum),
1330 SOC_ENUM("TDM1 ADC1DAT Swap Select", rt1011_tdm_adc1_1_enum),
1331 SOC_ENUM("TDM1 ADC2DAT Swap Select", rt1011_tdm_adc2_1_enum),
1334 SOC_ENUM("I2S ADC DOUT Mode", rt1011_adc_dout_mode_enum),
1335 SOC_ENUM("TDM1 DOUT Length", rt1011_tdm1_dout_len_enum),
1336 SOC_ENUM("TDM2 DOUT Length", rt1011_tdm2_dout_len_enum),
1338 /* Speaker/Receiver Mode */
1339 SOC_SINGLE_EXT("RECV SPK Mode", SND_SOC_NOPM, 0, 1, 0,
1340 rt1011_recv_spk_mode_get, rt1011_recv_spk_mode_put),
1342 /* BiQuad/DRC/SmartBoost Settings */
1343 RT1011_BQ_DRC("AdvanceMode Initial Set"),
1344 RT1011_BQ_DRC("AdvanceMode SEP BQ Coeff"),
1345 RT1011_BQ_DRC("AdvanceMode EQ BQ Coeff"),
1346 RT1011_BQ_DRC("AdvanceMode BQ UI Coeff"),
1347 RT1011_BQ_DRC("AdvanceMode SmartBoost Coeff"),
1350 SOC_SINGLE_EXT("R0 Calibration", SND_SOC_NOPM, 0, 1, 0,
1351 rt1011_r0_cali_get, rt1011_r0_cali_put),
1352 RT1011_R0_LOAD("R0 Load Mode"),
1354 /* R0 temperature */
1355 SOC_SINGLE("R0 Temperature", RT1011_STP_INITIAL_RESISTANCE_TEMP,
1359 static int rt1011_is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
1360 struct snd_soc_dapm_widget *sink)
1362 struct snd_soc_component *component =
1363 snd_soc_dapm_to_component(source->dapm);
1364 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
1366 if (rt1011->sysclk_src == RT1011_FS_SYS_PRE_S_PLL1)
1372 static int rt1011_dac_event(struct snd_soc_dapm_widget *w,
1373 struct snd_kcontrol *kcontrol, int event)
1375 struct snd_soc_component *component =
1376 snd_soc_dapm_to_component(w->dapm);
1379 case SND_SOC_DAPM_POST_PMU:
1380 snd_soc_component_update_bits(component,
1381 RT1011_SPK_TEMP_PROTECT_0,
1382 RT1011_STP_EN_MASK | RT1011_STP_RS_CLB_EN_MASK,
1383 RT1011_STP_EN | RT1011_STP_RS_CLB_EN);
1384 snd_soc_component_update_bits(component, RT1011_POWER_9,
1385 RT1011_POW_MNL_SDB_MASK, RT1011_POW_MNL_SDB);
1387 snd_soc_component_update_bits(component,
1388 RT1011_CLASSD_INTERNAL_SET_1,
1389 RT1011_DRIVER_READY_SPK, RT1011_DRIVER_READY_SPK);
1391 case SND_SOC_DAPM_PRE_PMD:
1392 snd_soc_component_update_bits(component, RT1011_POWER_9,
1393 RT1011_POW_MNL_SDB_MASK, 0);
1394 snd_soc_component_update_bits(component,
1395 RT1011_SPK_TEMP_PROTECT_0,
1396 RT1011_STP_EN_MASK | RT1011_STP_RS_CLB_EN_MASK, 0);
1398 snd_soc_component_update_bits(component,
1399 RT1011_CLASSD_INTERNAL_SET_1,
1400 RT1011_DRIVER_READY_SPK, 0);
1411 static const struct snd_soc_dapm_widget rt1011_dapm_widgets[] = {
1412 SND_SOC_DAPM_SUPPLY("LDO2", RT1011_POWER_1,
1413 RT1011_POW_LDO2_BIT, 0, NULL, 0),
1414 SND_SOC_DAPM_SUPPLY("ISENSE SPK", RT1011_POWER_1,
1415 RT1011_POW_ISENSE_SPK_BIT, 0, NULL, 0),
1416 SND_SOC_DAPM_SUPPLY("VSENSE SPK", RT1011_POWER_1,
1417 RT1011_POW_VSENSE_SPK_BIT, 0, NULL, 0),
1419 SND_SOC_DAPM_SUPPLY("PLL", RT1011_POWER_2,
1420 RT1011_PLLEN_BIT, 0, NULL, 0),
1421 SND_SOC_DAPM_SUPPLY("BG", RT1011_POWER_2,
1422 RT1011_POW_BG_BIT, 0, NULL, 0),
1423 SND_SOC_DAPM_SUPPLY("BG MBIAS", RT1011_POWER_2,
1424 RT1011_POW_BG_MBIAS_LV_BIT, 0, NULL, 0),
1426 SND_SOC_DAPM_SUPPLY("DET VBAT", RT1011_POWER_3,
1427 RT1011_POW_DET_VBAT_BIT, 0, NULL, 0),
1428 SND_SOC_DAPM_SUPPLY("MBIAS", RT1011_POWER_3,
1429 RT1011_POW_MBIAS_LV_BIT, 0, NULL, 0),
1430 SND_SOC_DAPM_SUPPLY("ADC I", RT1011_POWER_3,
1431 RT1011_POW_ADC_I_BIT, 0, NULL, 0),
1432 SND_SOC_DAPM_SUPPLY("ADC V", RT1011_POWER_3,
1433 RT1011_POW_ADC_V_BIT, 0, NULL, 0),
1434 SND_SOC_DAPM_SUPPLY("ADC T", RT1011_POWER_3,
1435 RT1011_POW_ADC_T_BIT, 0, NULL, 0),
1436 SND_SOC_DAPM_SUPPLY("DITHER ADC T", RT1011_POWER_3,
1437 RT1011_POWD_ADC_T_BIT, 0, NULL, 0),
1438 SND_SOC_DAPM_SUPPLY("MIX I", RT1011_POWER_3,
1439 RT1011_POW_MIX_I_BIT, 0, NULL, 0),
1440 SND_SOC_DAPM_SUPPLY("MIX V", RT1011_POWER_3,
1441 RT1011_POW_MIX_V_BIT, 0, NULL, 0),
1442 SND_SOC_DAPM_SUPPLY("SUM I", RT1011_POWER_3,
1443 RT1011_POW_SUM_I_BIT, 0, NULL, 0),
1444 SND_SOC_DAPM_SUPPLY("SUM V", RT1011_POWER_3,
1445 RT1011_POW_SUM_V_BIT, 0, NULL, 0),
1446 SND_SOC_DAPM_SUPPLY("MIX T", RT1011_POWER_3,
1447 RT1011_POW_MIX_T_BIT, 0, NULL, 0),
1448 SND_SOC_DAPM_SUPPLY("VREF", RT1011_POWER_3,
1449 RT1011_POW_VREF_LV_BIT, 0, NULL, 0),
1451 SND_SOC_DAPM_SUPPLY("BOOST SWR", RT1011_POWER_4,
1452 RT1011_POW_EN_SWR_BIT, 0, NULL, 0),
1453 SND_SOC_DAPM_SUPPLY("BGOK SWR", RT1011_POWER_4,
1454 RT1011_POW_EN_PASS_BGOK_SWR_BIT, 0, NULL, 0),
1455 SND_SOC_DAPM_SUPPLY("VPOK SWR", RT1011_POWER_4,
1456 RT1011_POW_EN_PASS_VPOK_SWR_BIT, 0, NULL, 0),
1458 SND_SOC_DAPM_SUPPLY("TEMP REG", RT1011_A_TEMP_SEN,
1459 RT1011_POW_TEMP_REG_BIT, 0, NULL, 0),
1461 /* Audio Interface */
1462 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1463 /* Digital Interface */
1464 SND_SOC_DAPM_SUPPLY("DAC Power", RT1011_POWER_1,
1465 RT1011_POW_DAC_BIT, 0, NULL, 0),
1466 SND_SOC_DAPM_SUPPLY("CLK12M", RT1011_POWER_1,
1467 RT1011_POW_CLK12M_BIT, 0, NULL, 0),
1468 SND_SOC_DAPM_DAC_E("DAC", NULL, RT1011_DAC_SET_3,
1469 RT1011_DA_MUTE_EN_SFT, 1, rt1011_dac_event,
1470 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1473 SND_SOC_DAPM_OUTPUT("SPO"),
1476 static const struct snd_soc_dapm_route rt1011_dapm_routes[] = {
1478 { "DAC", NULL, "AIF1RX" },
1479 { "DAC", NULL, "DAC Power" },
1480 { "DAC", NULL, "LDO2" },
1481 { "DAC", NULL, "ISENSE SPK" },
1482 { "DAC", NULL, "VSENSE SPK" },
1483 { "DAC", NULL, "CLK12M" },
1485 { "DAC", NULL, "PLL", rt1011_is_sys_clk_from_pll },
1486 { "DAC", NULL, "BG" },
1487 { "DAC", NULL, "BG MBIAS" },
1489 { "DAC", NULL, "BOOST SWR" },
1490 { "DAC", NULL, "BGOK SWR" },
1491 { "DAC", NULL, "VPOK SWR" },
1493 { "DAC", NULL, "DET VBAT" },
1494 { "DAC", NULL, "MBIAS" },
1495 { "DAC", NULL, "VREF" },
1496 { "DAC", NULL, "ADC I" },
1497 { "DAC", NULL, "ADC V" },
1498 { "DAC", NULL, "ADC T" },
1499 { "DAC", NULL, "DITHER ADC T" },
1500 { "DAC", NULL, "MIX I" },
1501 { "DAC", NULL, "MIX V" },
1502 { "DAC", NULL, "SUM I" },
1503 { "DAC", NULL, "SUM V" },
1504 { "DAC", NULL, "MIX T" },
1506 { "DAC", NULL, "TEMP REG" },
1508 { "SPO", NULL, "DAC" },
1511 static int rt1011_get_clk_info(int sclk, int rate)
1514 static const int pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1516 if (sclk <= 0 || rate <= 0)
1520 for (i = 0; i < ARRAY_SIZE(pd); i++)
1521 if (sclk == rate * pd[i])
1527 static int rt1011_hw_params(struct snd_pcm_substream *substream,
1528 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1530 struct snd_soc_component *component = dai->component;
1531 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
1532 unsigned int val_len = 0, ch_len = 0, val_clk, mask_clk;
1533 int pre_div, bclk_ms, frame_size;
1535 rt1011->lrck = params_rate(params);
1536 pre_div = rt1011_get_clk_info(rt1011->sysclk, rt1011->lrck);
1538 dev_warn(component->dev, "Force using PLL ");
1539 snd_soc_dai_set_pll(dai, 0, RT1011_PLL1_S_BCLK,
1540 rt1011->lrck * 64, rt1011->lrck * 256);
1541 snd_soc_dai_set_sysclk(dai, RT1011_FS_SYS_PRE_S_PLL1,
1542 rt1011->lrck * 256, SND_SOC_CLOCK_IN);
1545 frame_size = snd_soc_params_to_frame_size(params);
1546 if (frame_size < 0) {
1547 dev_err(component->dev, "Unsupported frame size: %d\n",
1552 bclk_ms = frame_size > 32;
1553 rt1011->bclk = rt1011->lrck * (32 << bclk_ms);
1555 dev_dbg(component->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1556 bclk_ms, pre_div, dai->id);
1558 dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
1559 rt1011->lrck, pre_div, dai->id);
1561 switch (params_width(params)) {
1563 val_len |= RT1011_I2S_TX_DL_16B;
1564 val_len |= RT1011_I2S_RX_DL_16B;
1565 ch_len |= RT1011_I2S_CH_TX_LEN_16B;
1566 ch_len |= RT1011_I2S_CH_RX_LEN_16B;
1569 val_len |= RT1011_I2S_TX_DL_20B;
1570 val_len |= RT1011_I2S_RX_DL_20B;
1571 ch_len |= RT1011_I2S_CH_TX_LEN_20B;
1572 ch_len |= RT1011_I2S_CH_RX_LEN_20B;
1575 val_len |= RT1011_I2S_TX_DL_24B;
1576 val_len |= RT1011_I2S_RX_DL_24B;
1577 ch_len |= RT1011_I2S_CH_TX_LEN_24B;
1578 ch_len |= RT1011_I2S_CH_RX_LEN_24B;
1581 val_len |= RT1011_I2S_TX_DL_32B;
1582 val_len |= RT1011_I2S_RX_DL_32B;
1583 ch_len |= RT1011_I2S_CH_TX_LEN_32B;
1584 ch_len |= RT1011_I2S_CH_RX_LEN_32B;
1587 val_len |= RT1011_I2S_TX_DL_8B;
1588 val_len |= RT1011_I2S_RX_DL_8B;
1589 ch_len |= RT1011_I2S_CH_TX_LEN_8B;
1590 ch_len |= RT1011_I2S_CH_RX_LEN_8B;
1598 mask_clk = RT1011_FS_SYS_DIV_MASK;
1599 val_clk = pre_div << RT1011_FS_SYS_DIV_SFT;
1600 snd_soc_component_update_bits(component, RT1011_TDM_TOTAL_SET,
1601 RT1011_I2S_TX_DL_MASK | RT1011_I2S_RX_DL_MASK,
1603 snd_soc_component_update_bits(component, RT1011_TDM1_SET_1,
1604 RT1011_I2S_CH_TX_LEN_MASK |
1605 RT1011_I2S_CH_RX_LEN_MASK,
1609 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
1613 snd_soc_component_update_bits(component,
1614 RT1011_CLK_2, mask_clk, val_clk);
1619 static int rt1011_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1621 struct snd_soc_component *component = dai->component;
1622 struct snd_soc_dapm_context *dapm =
1623 snd_soc_component_get_dapm(component);
1624 unsigned int reg_val = 0, reg_bclk_inv = 0;
1627 snd_soc_dapm_mutex_lock(dapm);
1628 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1629 case SND_SOC_DAIFMT_CBS_CFS:
1630 reg_val |= RT1011_I2S_TDM_MS_S;
1637 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1638 case SND_SOC_DAIFMT_NB_NF:
1640 case SND_SOC_DAIFMT_IB_NF:
1641 reg_bclk_inv |= RT1011_TDM_INV_BCLK;
1648 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1649 case SND_SOC_DAIFMT_I2S:
1651 case SND_SOC_DAIFMT_LEFT_J:
1652 reg_val |= RT1011_I2S_TDM_DF_LEFT;
1654 case SND_SOC_DAIFMT_DSP_A:
1655 reg_val |= RT1011_I2S_TDM_DF_PCM_A;
1657 case SND_SOC_DAIFMT_DSP_B:
1658 reg_val |= RT1011_I2S_TDM_DF_PCM_B;
1667 snd_soc_component_update_bits(component, RT1011_TDM_TOTAL_SET,
1668 RT1011_I2S_TDM_MS_MASK | RT1011_I2S_TDM_DF_MASK,
1670 snd_soc_component_update_bits(component, RT1011_TDM1_SET_1,
1671 RT1011_TDM_INV_BCLK_MASK, reg_bclk_inv);
1672 snd_soc_component_update_bits(component, RT1011_TDM2_SET_1,
1673 RT1011_TDM_INV_BCLK_MASK, reg_bclk_inv);
1676 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
1681 snd_soc_dapm_mutex_unlock(dapm);
1685 static int rt1011_set_component_sysclk(struct snd_soc_component *component,
1686 int clk_id, int source, unsigned int freq, int dir)
1688 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
1689 unsigned int reg_val = 0;
1691 if (freq == rt1011->sysclk && clk_id == rt1011->sysclk_src)
1694 /* disable MCLK detect in default */
1695 snd_soc_component_update_bits(component, RT1011_CLK_DET,
1696 RT1011_EN_MCLK_DET_MASK, 0);
1699 case RT1011_FS_SYS_PRE_S_MCLK:
1700 reg_val |= RT1011_FS_SYS_PRE_MCLK;
1701 snd_soc_component_update_bits(component, RT1011_CLK_DET,
1702 RT1011_EN_MCLK_DET_MASK, RT1011_EN_MCLK_DET);
1704 case RT1011_FS_SYS_PRE_S_BCLK:
1705 reg_val |= RT1011_FS_SYS_PRE_BCLK;
1707 case RT1011_FS_SYS_PRE_S_PLL1:
1708 reg_val |= RT1011_FS_SYS_PRE_PLL1;
1710 case RT1011_FS_SYS_PRE_S_RCCLK:
1711 reg_val |= RT1011_FS_SYS_PRE_RCCLK;
1714 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
1717 snd_soc_component_update_bits(component, RT1011_CLK_2,
1718 RT1011_FS_SYS_PRE_MASK, reg_val);
1719 rt1011->sysclk = freq;
1720 rt1011->sysclk_src = clk_id;
1722 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
1728 static int rt1011_set_component_pll(struct snd_soc_component *component,
1729 int pll_id, int source, unsigned int freq_in,
1730 unsigned int freq_out)
1732 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
1733 struct rl6231_pll_code pll_code;
1736 if (source == rt1011->pll_src && freq_in == rt1011->pll_in &&
1737 freq_out == rt1011->pll_out)
1740 if (!freq_in || !freq_out) {
1741 dev_dbg(component->dev, "PLL disabled\n");
1744 rt1011->pll_out = 0;
1745 snd_soc_component_update_bits(component, RT1011_CLK_2,
1746 RT1011_FS_SYS_PRE_MASK, RT1011_FS_SYS_PRE_BCLK);
1751 case RT1011_PLL2_S_MCLK:
1752 snd_soc_component_update_bits(component, RT1011_CLK_2,
1753 RT1011_PLL2_SRC_MASK, RT1011_PLL2_SRC_MCLK);
1754 snd_soc_component_update_bits(component, RT1011_CLK_2,
1755 RT1011_PLL1_SRC_MASK, RT1011_PLL1_SRC_PLL2);
1756 snd_soc_component_update_bits(component, RT1011_CLK_DET,
1757 RT1011_EN_MCLK_DET_MASK, RT1011_EN_MCLK_DET);
1759 case RT1011_PLL1_S_BCLK:
1760 snd_soc_component_update_bits(component, RT1011_CLK_2,
1761 RT1011_PLL1_SRC_MASK, RT1011_PLL1_SRC_BCLK);
1763 case RT1011_PLL2_S_RCCLK:
1764 snd_soc_component_update_bits(component, RT1011_CLK_2,
1765 RT1011_PLL2_SRC_MASK, RT1011_PLL2_SRC_RCCLK);
1766 snd_soc_component_update_bits(component, RT1011_CLK_2,
1767 RT1011_PLL1_SRC_MASK, RT1011_PLL1_SRC_PLL2);
1770 dev_err(component->dev, "Unknown PLL Source %d\n", source);
1774 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1776 dev_err(component->dev, "Unsupported input clock %d\n",
1781 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
1782 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1783 pll_code.n_code, pll_code.k_code);
1785 snd_soc_component_write(component, RT1011_PLL_1,
1786 (pll_code.m_bp ? 0 : pll_code.m_code) << RT1011_PLL1_QM_SFT |
1787 pll_code.m_bp << RT1011_PLL1_BPM_SFT | pll_code.n_code);
1788 snd_soc_component_write(component, RT1011_PLL_2,
1791 rt1011->pll_in = freq_in;
1792 rt1011->pll_out = freq_out;
1793 rt1011->pll_src = source;
1798 static int rt1011_set_tdm_slot(struct snd_soc_dai *dai,
1799 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
1801 struct snd_soc_component *component = dai->component;
1802 struct snd_soc_dapm_context *dapm =
1803 snd_soc_component_get_dapm(component);
1804 unsigned int val = 0, tdm_en = 0, rx_slotnum, tx_slotnum;
1805 int ret = 0, first_bit, last_bit;
1807 snd_soc_dapm_mutex_lock(dapm);
1808 if (rx_mask || tx_mask)
1809 tdm_en = RT1011_TDM_I2S_DOCK_EN_1;
1813 val |= RT1011_I2S_TX_4CH;
1814 val |= RT1011_I2S_RX_4CH;
1817 val |= RT1011_I2S_TX_6CH;
1818 val |= RT1011_I2S_RX_6CH;
1821 val |= RT1011_I2S_TX_8CH;
1822 val |= RT1011_I2S_RX_8CH;
1831 switch (slot_width) {
1833 val |= RT1011_I2S_CH_TX_LEN_20B;
1834 val |= RT1011_I2S_CH_RX_LEN_20B;
1837 val |= RT1011_I2S_CH_TX_LEN_24B;
1838 val |= RT1011_I2S_CH_RX_LEN_24B;
1841 val |= RT1011_I2S_CH_TX_LEN_32B;
1842 val |= RT1011_I2S_CH_RX_LEN_32B;
1851 /* Rx slot configuration */
1852 rx_slotnum = hweight_long(rx_mask);
1853 first_bit = find_next_bit((unsigned long *)&rx_mask, 32, 0);
1854 if (rx_slotnum > 1 || rx_slotnum == 0) {
1856 dev_dbg(component->dev, "too many rx slots or zero slot\n");
1860 switch (first_bit) {
1865 snd_soc_component_update_bits(component,
1866 RT1011_CROSS_BQ_SET_1, RT1011_MONO_LR_SEL_MASK,
1867 RT1011_MONO_L_CHANNEL);
1868 snd_soc_component_update_bits(component,
1870 RT1011_TDM_I2S_TX_L_DAC1_1_MASK |
1871 RT1011_TDM_I2S_TX_R_DAC1_1_MASK,
1872 (first_bit << RT1011_TDM_I2S_TX_L_DAC1_1_SFT) |
1873 ((first_bit+1) << RT1011_TDM_I2S_TX_R_DAC1_1_SFT));
1879 snd_soc_component_update_bits(component,
1880 RT1011_CROSS_BQ_SET_1, RT1011_MONO_LR_SEL_MASK,
1881 RT1011_MONO_R_CHANNEL);
1882 snd_soc_component_update_bits(component,
1884 RT1011_TDM_I2S_TX_L_DAC1_1_MASK |
1885 RT1011_TDM_I2S_TX_R_DAC1_1_MASK,
1886 ((first_bit-1) << RT1011_TDM_I2S_TX_L_DAC1_1_SFT) |
1887 (first_bit << RT1011_TDM_I2S_TX_R_DAC1_1_SFT));
1894 /* Tx slot configuration */
1895 tx_slotnum = hweight_long(tx_mask);
1896 first_bit = find_next_bit((unsigned long *)&tx_mask, 32, 0);
1897 last_bit = find_last_bit((unsigned long *)&tx_mask, 32);
1898 if (tx_slotnum > 2 || (last_bit-first_bit) > 1) {
1900 dev_dbg(component->dev, "too many tx slots or tx slot location error\n");
1904 if (tx_slotnum == 1) {
1905 snd_soc_component_update_bits(component, RT1011_TDM1_SET_2,
1906 RT1011_TDM_I2S_DOCK_ADCDAT_LEN_1_MASK |
1907 RT1011_TDM_ADCDAT1_DATA_LOCATION, first_bit);
1908 switch (first_bit) {
1910 snd_soc_component_update_bits(component,
1912 RT1011_TDM_I2S_RX_ADC1_1_MASK,
1913 RT1011_TDM_I2S_RX_ADC1_1_LL);
1916 snd_soc_component_update_bits(component,
1918 RT1011_TDM_I2S_RX_ADC2_1_MASK,
1919 RT1011_TDM_I2S_RX_ADC2_1_LL);
1922 snd_soc_component_update_bits(component,
1924 RT1011_TDM_I2S_RX_ADC3_1_MASK,
1925 RT1011_TDM_I2S_RX_ADC3_1_LL);
1928 snd_soc_component_update_bits(component,
1930 RT1011_TDM_I2S_RX_ADC4_1_MASK,
1931 RT1011_TDM_I2S_RX_ADC4_1_LL);
1934 snd_soc_component_update_bits(component,
1936 RT1011_TDM_I2S_RX_ADC1_1_MASK, 0);
1939 snd_soc_component_update_bits(component,
1941 RT1011_TDM_I2S_RX_ADC2_1_MASK, 0);
1944 snd_soc_component_update_bits(component,
1946 RT1011_TDM_I2S_RX_ADC3_1_MASK, 0);
1949 snd_soc_component_update_bits(component,
1951 RT1011_TDM_I2S_RX_ADC4_1_MASK, 0);
1955 dev_dbg(component->dev,
1956 "tx slot location error\n");
1959 } else if (tx_slotnum == 2) {
1960 switch (first_bit) {
1965 snd_soc_component_update_bits(component,
1967 RT1011_TDM_I2S_DOCK_ADCDAT_LEN_1_MASK |
1968 RT1011_TDM_ADCDAT1_DATA_LOCATION,
1969 RT1011_TDM_I2S_DOCK_ADCDAT_2CH | first_bit);
1973 dev_dbg(component->dev,
1974 "tx slot location should be paired and start from slot0/2/4/6\n");
1979 snd_soc_component_update_bits(component, RT1011_TDM1_SET_1,
1980 RT1011_I2S_CH_TX_MASK | RT1011_I2S_CH_RX_MASK |
1981 RT1011_I2S_CH_TX_LEN_MASK | RT1011_I2S_CH_RX_LEN_MASK, val);
1982 snd_soc_component_update_bits(component, RT1011_TDM2_SET_1,
1983 RT1011_I2S_CH_TX_MASK | RT1011_I2S_CH_RX_MASK |
1984 RT1011_I2S_CH_TX_LEN_MASK | RT1011_I2S_CH_RX_LEN_MASK, val);
1985 snd_soc_component_update_bits(component, RT1011_TDM1_SET_2,
1986 RT1011_TDM_I2S_DOCK_EN_1_MASK, tdm_en);
1987 snd_soc_component_update_bits(component, RT1011_TDM2_SET_2,
1988 RT1011_TDM_I2S_DOCK_EN_2_MASK, tdm_en);
1990 snd_soc_component_update_bits(component, RT1011_TDM_TOTAL_SET,
1991 RT1011_ADCDAT1_PIN_CONFIG | RT1011_ADCDAT2_PIN_CONFIG,
1992 RT1011_ADCDAT1_OUTPUT | RT1011_ADCDAT2_OUTPUT);
1995 snd_soc_dapm_mutex_unlock(dapm);
1999 static int rt1011_probe(struct snd_soc_component *component)
2001 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
2004 rt1011->component = component;
2006 schedule_work(&rt1011->cali_work);
2008 rt1011->bq_drc_params = devm_kcalloc(component->dev,
2009 RT1011_ADVMODE_NUM, sizeof(struct rt1011_bq_drc_params *),
2011 if (!rt1011->bq_drc_params)
2014 for (i = 0; i < RT1011_ADVMODE_NUM; i++) {
2015 rt1011->bq_drc_params[i] = devm_kcalloc(component->dev,
2016 RT1011_BQ_DRC_NUM, sizeof(struct rt1011_bq_drc_params),
2018 if (!rt1011->bq_drc_params[i])
2025 static void rt1011_remove(struct snd_soc_component *component)
2027 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
2029 cancel_work_sync(&rt1011->cali_work);
2030 rt1011_reset(rt1011->regmap);
2034 static int rt1011_suspend(struct snd_soc_component *component)
2036 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
2038 regcache_cache_only(rt1011->regmap, true);
2039 regcache_mark_dirty(rt1011->regmap);
2044 static int rt1011_resume(struct snd_soc_component *component)
2046 struct rt1011_priv *rt1011 = snd_soc_component_get_drvdata(component);
2048 regcache_cache_only(rt1011->regmap, false);
2049 regcache_sync(rt1011->regmap);
2054 #define rt1011_suspend NULL
2055 #define rt1011_resume NULL
2058 static int rt1011_set_bias_level(struct snd_soc_component *component,
2059 enum snd_soc_bias_level level)
2062 case SND_SOC_BIAS_OFF:
2063 snd_soc_component_write(component,
2064 RT1011_SYSTEM_RESET_1, 0x0000);
2065 snd_soc_component_write(component,
2066 RT1011_SYSTEM_RESET_2, 0x0000);
2067 snd_soc_component_write(component,
2068 RT1011_SYSTEM_RESET_3, 0x0001);
2069 snd_soc_component_write(component,
2070 RT1011_SYSTEM_RESET_1, 0x003f);
2071 snd_soc_component_write(component,
2072 RT1011_SYSTEM_RESET_2, 0x7fd7);
2073 snd_soc_component_write(component,
2074 RT1011_SYSTEM_RESET_3, 0x770f);
2083 #define RT1011_STEREO_RATES SNDRV_PCM_RATE_8000_192000
2084 #define RT1011_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
2085 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S16_LE | \
2086 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
2088 static const struct snd_soc_dai_ops rt1011_aif_dai_ops = {
2089 .hw_params = rt1011_hw_params,
2090 .set_fmt = rt1011_set_dai_fmt,
2091 .set_tdm_slot = rt1011_set_tdm_slot,
2094 static struct snd_soc_dai_driver rt1011_dai[] = {
2096 .name = "rt1011-aif",
2098 .stream_name = "AIF1 Playback",
2101 .rates = RT1011_STEREO_RATES,
2102 .formats = RT1011_FORMATS,
2104 .ops = &rt1011_aif_dai_ops,
2108 static const struct snd_soc_component_driver soc_component_dev_rt1011 = {
2109 .probe = rt1011_probe,
2110 .remove = rt1011_remove,
2111 .suspend = rt1011_suspend,
2112 .resume = rt1011_resume,
2113 .set_bias_level = rt1011_set_bias_level,
2114 .controls = rt1011_snd_controls,
2115 .num_controls = ARRAY_SIZE(rt1011_snd_controls),
2116 .dapm_widgets = rt1011_dapm_widgets,
2117 .num_dapm_widgets = ARRAY_SIZE(rt1011_dapm_widgets),
2118 .dapm_routes = rt1011_dapm_routes,
2119 .num_dapm_routes = ARRAY_SIZE(rt1011_dapm_routes),
2120 .set_sysclk = rt1011_set_component_sysclk,
2121 .set_pll = rt1011_set_component_pll,
2122 .use_pmdown_time = 1,
2124 .non_legacy_dai_naming = 1,
2127 static const struct regmap_config rt1011_regmap = {
2130 .max_register = RT1011_MAX_REG + 1,
2131 .volatile_reg = rt1011_volatile_register,
2132 .readable_reg = rt1011_readable_register,
2133 .cache_type = REGCACHE_RBTREE,
2134 .reg_defaults = rt1011_reg,
2135 .num_reg_defaults = ARRAY_SIZE(rt1011_reg),
2136 .use_single_read = true,
2137 .use_single_write = true,
2140 #if defined(CONFIG_OF)
2141 static const struct of_device_id rt1011_of_match[] = {
2142 { .compatible = "realtek,rt1011", },
2145 MODULE_DEVICE_TABLE(of, rt1011_of_match);
2149 static struct acpi_device_id rt1011_acpi_match[] = {
2153 MODULE_DEVICE_TABLE(acpi, rt1011_acpi_match);
2156 static const struct i2c_device_id rt1011_i2c_id[] = {
2160 MODULE_DEVICE_TABLE(i2c, rt1011_i2c_id);
2162 static int rt1011_calibrate(struct rt1011_priv *rt1011, unsigned char cali_flag)
2164 unsigned int value, count = 0, r0[3];
2165 unsigned int chk_cnt = 50; /* DONT change this */
2166 unsigned int dc_offset;
2167 unsigned int r0_integer, r0_factor, format;
2168 struct device *dev = regmap_get_device(rt1011->regmap);
2169 struct snd_soc_dapm_context *dapm =
2170 snd_soc_component_get_dapm(rt1011->component);
2173 snd_soc_dapm_mutex_lock(dapm);
2174 regcache_cache_bypass(rt1011->regmap, true);
2176 regmap_write(rt1011->regmap, RT1011_RESET, 0x0000);
2177 regmap_write(rt1011->regmap, RT1011_SYSTEM_RESET_3, 0x740f);
2178 regmap_write(rt1011->regmap, RT1011_SYSTEM_RESET_3, 0x770f);
2181 regmap_write(rt1011->regmap, RT1011_CLK_2, 0x9400);
2182 regmap_write(rt1011->regmap, RT1011_PLL_1, 0x0800);
2183 regmap_write(rt1011->regmap, RT1011_PLL_2, 0x0020);
2184 regmap_write(rt1011->regmap, RT1011_CLK_DET, 0x0800);
2186 /* ADC/DAC setting */
2187 regmap_write(rt1011->regmap, RT1011_ADC_SET_5, 0x0a20);
2188 regmap_write(rt1011->regmap, RT1011_DAC_SET_2, 0xe232);
2189 regmap_write(rt1011->regmap, RT1011_ADC_SET_1, 0x2925);
2190 regmap_write(rt1011->regmap, RT1011_ADC_SET_4, 0xc000);
2193 regmap_write(rt1011->regmap, RT1011_SPK_PRO_DC_DET_1, 0xb00c);
2194 regmap_write(rt1011->regmap, RT1011_SPK_PRO_DC_DET_2, 0xcccc);
2197 regmap_write(rt1011->regmap, RT1011_POWER_1, 0xe0e0);
2198 regmap_write(rt1011->regmap, RT1011_POWER_3, 0x5003);
2199 regmap_write(rt1011->regmap, RT1011_POWER_9, 0xa860);
2200 regmap_write(rt1011->regmap, RT1011_DAC_SET_2, 0xa032);
2202 /* POW_PLL / POW_BG / POW_BG_MBIAS_LV / POW_V/I */
2203 regmap_write(rt1011->regmap, RT1011_POWER_2, 0x0007);
2204 regmap_write(rt1011->regmap, RT1011_POWER_3, 0x5ff7);
2205 regmap_write(rt1011->regmap, RT1011_A_TEMP_SEN, 0x7f44);
2206 regmap_write(rt1011->regmap, RT1011_A_TIMING_1, 0x4054);
2207 regmap_write(rt1011->regmap, RT1011_BAT_GAIN_1, 0x309c);
2209 /* DC offset from EFUSE */
2210 regmap_write(rt1011->regmap, RT1011_DC_CALIB_CLASSD_3, 0xcb00);
2211 regmap_write(rt1011->regmap, RT1011_BOOST_CON_1, 0xe080);
2212 regmap_write(rt1011->regmap, RT1011_POWER_4, 0x16f2);
2213 regmap_write(rt1011->regmap, RT1011_POWER_6, 0x36ad);
2216 regmap_write(rt1011->regmap, RT1011_MIXER_1, 0x3f1d);
2219 regmap_write(rt1011->regmap, RT1011_EFUSE_CONTROL_1, 0x0d0a);
2222 regmap_read(rt1011->regmap, RT1011_EFUSE_ADC_OFFSET_18_16, &value);
2223 dc_offset = value << 16;
2224 regmap_read(rt1011->regmap, RT1011_EFUSE_ADC_OFFSET_15_0, &value);
2225 dc_offset |= (value & 0xffff);
2226 dev_info(dev, "ADC offset=0x%x\n", dc_offset);
2227 regmap_read(rt1011->regmap, RT1011_EFUSE_DAC_OFFSET_G0_20_16, &value);
2228 dc_offset = value << 16;
2229 regmap_read(rt1011->regmap, RT1011_EFUSE_DAC_OFFSET_G0_15_0, &value);
2230 dc_offset |= (value & 0xffff);
2231 dev_info(dev, "Gain0 offset=0x%x\n", dc_offset);
2232 regmap_read(rt1011->regmap, RT1011_EFUSE_DAC_OFFSET_G1_20_16, &value);
2233 dc_offset = value << 16;
2234 regmap_read(rt1011->regmap, RT1011_EFUSE_DAC_OFFSET_G1_15_0, &value);
2235 dc_offset |= (value & 0xffff);
2236 dev_info(dev, "Gain1 offset=0x%x\n", dc_offset);
2241 regmap_write(rt1011->regmap, RT1011_CLASS_D_POS, 0x010e);
2242 regmap_write(rt1011->regmap,
2243 RT1011_CLASSD_INTERNAL_SET_1, 0x1701);
2246 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_0, 0x8000);
2247 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_7, 0xf000);
2248 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_4, 0x4040);
2249 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_0, 0xc000);
2250 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_6, 0x07c2);
2252 r0[0] = r0[1] = r0[2] = count = 0;
2253 while (count < chk_cnt) {
2255 regmap_read(rt1011->regmap,
2256 RT1011_INIT_RECIPROCAL_SYN_24_16, &value);
2257 r0[count%3] = value << 16;
2258 regmap_read(rt1011->regmap,
2259 RT1011_INIT_RECIPROCAL_SYN_15_0, &value);
2260 r0[count%3] |= value;
2262 if (r0[count%3] == 0)
2267 if (r0[0] == r0[1] && r0[1] == r0[2])
2270 if (count > chk_cnt) {
2271 dev_err(dev, "Calibrate R0 Failure\n");
2274 format = 2147483648U; /* 2^24 * 128 */
2275 r0_integer = format / r0[0] / 128;
2276 r0_factor = ((format / r0[0] * 100) / 128)
2277 - (r0_integer * 100);
2278 rt1011->r0_reg = r0[0];
2279 rt1011->cali_done = 1;
2280 dev_info(dev, "r0 resistance about %d.%02d ohm, reg=0x%X\n",
2281 r0_integer, r0_factor, r0[0]);
2286 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_0, 0x0000);
2288 regmap_write(rt1011->regmap, RT1011_POWER_9, 0xa840);
2289 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_6, 0x0702);
2290 regmap_write(rt1011->regmap, RT1011_MIXER_1, 0xffdd);
2291 regmap_write(rt1011->regmap, RT1011_CLASSD_INTERNAL_SET_1, 0x0701);
2292 regmap_write(rt1011->regmap, RT1011_DAC_SET_3, 0xe004);
2293 regmap_write(rt1011->regmap, RT1011_A_TEMP_SEN, 0x7f40);
2294 regmap_write(rt1011->regmap, RT1011_POWER_1, 0x0000);
2295 regmap_write(rt1011->regmap, RT1011_POWER_2, 0x0000);
2296 regmap_write(rt1011->regmap, RT1011_POWER_3, 0x0002);
2297 regmap_write(rt1011->regmap, RT1011_POWER_4, 0x00f2);
2299 regmap_write(rt1011->regmap, RT1011_RESET, 0x0000);
2302 if (count <= chk_cnt) {
2303 regmap_write(rt1011->regmap,
2304 RT1011_INIT_RECIPROCAL_REG_24_16,
2305 ((r0[0]>>16) & 0x1ff));
2306 regmap_write(rt1011->regmap,
2307 RT1011_INIT_RECIPROCAL_REG_15_0,
2309 regmap_write(rt1011->regmap,
2310 RT1011_SPK_TEMP_PROTECT_4, 0x4080);
2314 regcache_cache_bypass(rt1011->regmap, false);
2315 regcache_mark_dirty(rt1011->regmap);
2316 regcache_sync(rt1011->regmap);
2317 snd_soc_dapm_mutex_unlock(dapm);
2322 static void rt1011_calibration_work(struct work_struct *work)
2324 struct rt1011_priv *rt1011 =
2325 container_of(work, struct rt1011_priv, cali_work);
2326 struct snd_soc_component *component = rt1011->component;
2327 unsigned int r0_integer, r0_factor, format;
2329 if (rt1011->r0_calib)
2330 rt1011_calibrate(rt1011, 0);
2332 rt1011_calibrate(rt1011, 1);
2335 * This flag should reset after booting.
2336 * The factory test will do calibration again and use this flag to check
2337 * whether the calibration completed
2339 rt1011->cali_done = 0;
2342 rt1011_reg_init(component);
2344 /* Apply temperature and calibration data from device property */
2345 if (rt1011->temperature_calib <= 0xff &&
2346 rt1011->temperature_calib > 0) {
2347 snd_soc_component_update_bits(component,
2348 RT1011_STP_INITIAL_RESISTANCE_TEMP, 0x3ff,
2349 (rt1011->temperature_calib << 2));
2352 if (rt1011->r0_calib) {
2353 rt1011->r0_reg = rt1011->r0_calib;
2355 format = 2147483648U; /* 2^24 * 128 */
2356 r0_integer = format / rt1011->r0_reg / 128;
2357 r0_factor = ((format / rt1011->r0_reg * 100) / 128)
2358 - (r0_integer * 100);
2359 dev_info(component->dev, "DP r0 resistance about %d.%02d ohm, reg=0x%X\n",
2360 r0_integer, r0_factor, rt1011->r0_reg);
2362 rt1011_r0_load(rt1011);
2366 static int rt1011_parse_dp(struct rt1011_priv *rt1011, struct device *dev)
2368 device_property_read_u32(dev, "realtek,temperature_calib",
2369 &rt1011->temperature_calib);
2370 device_property_read_u32(dev, "realtek,r0_calib",
2373 dev_dbg(dev, "%s: r0_calib: 0x%x, temperature_calib: 0x%x",
2374 __func__, rt1011->r0_calib, rt1011->temperature_calib);
2379 static int rt1011_i2c_probe(struct i2c_client *i2c,
2380 const struct i2c_device_id *id)
2382 struct rt1011_priv *rt1011;
2386 rt1011 = devm_kzalloc(&i2c->dev, sizeof(struct rt1011_priv),
2391 i2c_set_clientdata(i2c, rt1011);
2393 rt1011_parse_dp(rt1011, &i2c->dev);
2395 rt1011->regmap = devm_regmap_init_i2c(i2c, &rt1011_regmap);
2396 if (IS_ERR(rt1011->regmap)) {
2397 ret = PTR_ERR(rt1011->regmap);
2398 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2403 regmap_read(rt1011->regmap, RT1011_DEVICE_ID, &val);
2404 if (val != RT1011_DEVICE_ID_NUM) {
2406 "Device with ID register %x is not rt1011\n", val);
2410 INIT_WORK(&rt1011->cali_work, rt1011_calibration_work);
2412 return devm_snd_soc_register_component(&i2c->dev,
2413 &soc_component_dev_rt1011,
2414 rt1011_dai, ARRAY_SIZE(rt1011_dai));
2418 static void rt1011_i2c_shutdown(struct i2c_client *client)
2420 struct rt1011_priv *rt1011 = i2c_get_clientdata(client);
2422 rt1011_reset(rt1011->regmap);
2425 static struct i2c_driver rt1011_i2c_driver = {
2428 .of_match_table = of_match_ptr(rt1011_of_match),
2429 .acpi_match_table = ACPI_PTR(rt1011_acpi_match)
2431 .probe = rt1011_i2c_probe,
2432 .shutdown = rt1011_i2c_shutdown,
2433 .id_table = rt1011_i2c_id,
2435 module_i2c_driver(rt1011_i2c_driver);
2437 MODULE_DESCRIPTION("ASoC RT1011 amplifier driver");
2438 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
2439 MODULE_LICENSE("GPL");