1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the PCM512x CODECs
5 * Author: Mark Brown <broonie@kernel.org>
6 * Copyright 2014 Linaro Ltd
10 #include <linux/init.h>
11 #include <linux/module.h>
12 #include <linux/clk.h>
13 #include <linux/kernel.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/regmap.h>
16 #include <linux/regulator/consumer.h>
17 #include <linux/gcd.h>
18 #include <sound/soc.h>
19 #include <sound/soc-dapm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/tlv.h>
25 #define PCM512x_NUM_SUPPLIES 3
26 static const char * const pcm512x_supply_names[PCM512x_NUM_SUPPLIES] = {
33 struct regmap *regmap;
35 struct regulator_bulk_data supplies[PCM512x_NUM_SUPPLIES];
36 struct notifier_block supply_nb[PCM512x_NUM_SUPPLIES];
44 unsigned long real_pll;
45 unsigned long overclock_pll;
46 unsigned long overclock_dac;
47 unsigned long overclock_dsp;
50 unsigned int bclk_ratio;
54 * We can't use the same notifier block for more than one supply and
55 * there's no way I can see to get from a callback to the caller
56 * except container_of().
58 #define PCM512x_REGULATOR_EVENT(n) \
59 static int pcm512x_regulator_event_##n(struct notifier_block *nb, \
60 unsigned long event, void *data) \
62 struct pcm512x_priv *pcm512x = container_of(nb, struct pcm512x_priv, \
64 if (event & REGULATOR_EVENT_DISABLE) { \
65 regcache_mark_dirty(pcm512x->regmap); \
66 regcache_cache_only(pcm512x->regmap, true); \
71 PCM512x_REGULATOR_EVENT(0)
72 PCM512x_REGULATOR_EVENT(1)
73 PCM512x_REGULATOR_EVENT(2)
75 static const struct reg_default pcm512x_reg_defaults[] = {
76 { PCM512x_RESET, 0x00 },
77 { PCM512x_POWER, 0x00 },
78 { PCM512x_MUTE, 0x00 },
79 { PCM512x_DSP, 0x00 },
80 { PCM512x_PLL_REF, 0x00 },
81 { PCM512x_DAC_REF, 0x00 },
82 { PCM512x_DAC_ROUTING, 0x11 },
83 { PCM512x_DSP_PROGRAM, 0x01 },
84 { PCM512x_CLKDET, 0x00 },
85 { PCM512x_AUTO_MUTE, 0x00 },
86 { PCM512x_ERROR_DETECT, 0x00 },
87 { PCM512x_DIGITAL_VOLUME_1, 0x00 },
88 { PCM512x_DIGITAL_VOLUME_2, 0x30 },
89 { PCM512x_DIGITAL_VOLUME_3, 0x30 },
90 { PCM512x_DIGITAL_MUTE_1, 0x22 },
91 { PCM512x_DIGITAL_MUTE_2, 0x00 },
92 { PCM512x_DIGITAL_MUTE_3, 0x07 },
93 { PCM512x_OUTPUT_AMPLITUDE, 0x00 },
94 { PCM512x_ANALOG_GAIN_CTRL, 0x00 },
95 { PCM512x_UNDERVOLTAGE_PROT, 0x00 },
96 { PCM512x_ANALOG_MUTE_CTRL, 0x00 },
97 { PCM512x_ANALOG_GAIN_BOOST, 0x00 },
98 { PCM512x_VCOM_CTRL_1, 0x00 },
99 { PCM512x_VCOM_CTRL_2, 0x01 },
100 { PCM512x_BCLK_LRCLK_CFG, 0x00 },
101 { PCM512x_MASTER_MODE, 0x7c },
102 { PCM512x_GPIO_DACIN, 0x00 },
103 { PCM512x_GPIO_PLLIN, 0x00 },
104 { PCM512x_SYNCHRONIZE, 0x10 },
105 { PCM512x_PLL_COEFF_0, 0x00 },
106 { PCM512x_PLL_COEFF_1, 0x00 },
107 { PCM512x_PLL_COEFF_2, 0x00 },
108 { PCM512x_PLL_COEFF_3, 0x00 },
109 { PCM512x_PLL_COEFF_4, 0x00 },
110 { PCM512x_DSP_CLKDIV, 0x00 },
111 { PCM512x_DAC_CLKDIV, 0x00 },
112 { PCM512x_NCP_CLKDIV, 0x00 },
113 { PCM512x_OSR_CLKDIV, 0x00 },
114 { PCM512x_MASTER_CLKDIV_1, 0x00 },
115 { PCM512x_MASTER_CLKDIV_2, 0x00 },
116 { PCM512x_FS_SPEED_MODE, 0x00 },
117 { PCM512x_IDAC_1, 0x01 },
118 { PCM512x_IDAC_2, 0x00 },
121 static bool pcm512x_readable(struct device *dev, unsigned int reg)
128 case PCM512x_SPI_MISO_FUNCTION:
130 case PCM512x_GPIO_EN:
131 case PCM512x_BCLK_LRCLK_CFG:
132 case PCM512x_DSP_GPIO_INPUT:
133 case PCM512x_MASTER_MODE:
134 case PCM512x_PLL_REF:
135 case PCM512x_DAC_REF:
136 case PCM512x_GPIO_DACIN:
137 case PCM512x_GPIO_PLLIN:
138 case PCM512x_SYNCHRONIZE:
139 case PCM512x_PLL_COEFF_0:
140 case PCM512x_PLL_COEFF_1:
141 case PCM512x_PLL_COEFF_2:
142 case PCM512x_PLL_COEFF_3:
143 case PCM512x_PLL_COEFF_4:
144 case PCM512x_DSP_CLKDIV:
145 case PCM512x_DAC_CLKDIV:
146 case PCM512x_NCP_CLKDIV:
147 case PCM512x_OSR_CLKDIV:
148 case PCM512x_MASTER_CLKDIV_1:
149 case PCM512x_MASTER_CLKDIV_2:
150 case PCM512x_FS_SPEED_MODE:
153 case PCM512x_ERROR_DETECT:
156 case PCM512x_DAC_ROUTING:
157 case PCM512x_DSP_PROGRAM:
159 case PCM512x_AUTO_MUTE:
160 case PCM512x_DIGITAL_VOLUME_1:
161 case PCM512x_DIGITAL_VOLUME_2:
162 case PCM512x_DIGITAL_VOLUME_3:
163 case PCM512x_DIGITAL_MUTE_1:
164 case PCM512x_DIGITAL_MUTE_2:
165 case PCM512x_DIGITAL_MUTE_3:
166 case PCM512x_GPIO_OUTPUT_1:
167 case PCM512x_GPIO_OUTPUT_2:
168 case PCM512x_GPIO_OUTPUT_3:
169 case PCM512x_GPIO_OUTPUT_4:
170 case PCM512x_GPIO_OUTPUT_5:
171 case PCM512x_GPIO_OUTPUT_6:
172 case PCM512x_GPIO_CONTROL_1:
173 case PCM512x_GPIO_CONTROL_2:
174 case PCM512x_OVERFLOW:
175 case PCM512x_RATE_DET_1:
176 case PCM512x_RATE_DET_2:
177 case PCM512x_RATE_DET_3:
178 case PCM512x_RATE_DET_4:
179 case PCM512x_CLOCK_STATUS:
180 case PCM512x_ANALOG_MUTE_DET:
182 case PCM512x_DIGITAL_MUTE_DET:
183 case PCM512x_OUTPUT_AMPLITUDE:
184 case PCM512x_ANALOG_GAIN_CTRL:
185 case PCM512x_UNDERVOLTAGE_PROT:
186 case PCM512x_ANALOG_MUTE_CTRL:
187 case PCM512x_ANALOG_GAIN_BOOST:
188 case PCM512x_VCOM_CTRL_1:
189 case PCM512x_VCOM_CTRL_2:
190 case PCM512x_CRAM_CTRL:
195 /* There are 256 raw register addresses */
200 static bool pcm512x_volatile(struct device *dev, unsigned int reg)
204 case PCM512x_OVERFLOW:
205 case PCM512x_RATE_DET_1:
206 case PCM512x_RATE_DET_2:
207 case PCM512x_RATE_DET_3:
208 case PCM512x_RATE_DET_4:
209 case PCM512x_CLOCK_STATUS:
210 case PCM512x_ANALOG_MUTE_DET:
212 case PCM512x_DIGITAL_MUTE_DET:
213 case PCM512x_CRAM_CTRL:
216 /* There are 256 raw register addresses */
221 static int pcm512x_overclock_pll_get(struct snd_kcontrol *kcontrol,
222 struct snd_ctl_elem_value *ucontrol)
224 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
225 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
227 ucontrol->value.integer.value[0] = pcm512x->overclock_pll;
231 static int pcm512x_overclock_pll_put(struct snd_kcontrol *kcontrol,
232 struct snd_ctl_elem_value *ucontrol)
234 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
235 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
237 switch (snd_soc_component_get_bias_level(component)) {
238 case SND_SOC_BIAS_OFF:
239 case SND_SOC_BIAS_STANDBY:
245 pcm512x->overclock_pll = ucontrol->value.integer.value[0];
249 static int pcm512x_overclock_dsp_get(struct snd_kcontrol *kcontrol,
250 struct snd_ctl_elem_value *ucontrol)
252 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
253 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
255 ucontrol->value.integer.value[0] = pcm512x->overclock_dsp;
259 static int pcm512x_overclock_dsp_put(struct snd_kcontrol *kcontrol,
260 struct snd_ctl_elem_value *ucontrol)
262 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
263 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
265 switch (snd_soc_component_get_bias_level(component)) {
266 case SND_SOC_BIAS_OFF:
267 case SND_SOC_BIAS_STANDBY:
273 pcm512x->overclock_dsp = ucontrol->value.integer.value[0];
277 static int pcm512x_overclock_dac_get(struct snd_kcontrol *kcontrol,
278 struct snd_ctl_elem_value *ucontrol)
280 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
281 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
283 ucontrol->value.integer.value[0] = pcm512x->overclock_dac;
287 static int pcm512x_overclock_dac_put(struct snd_kcontrol *kcontrol,
288 struct snd_ctl_elem_value *ucontrol)
290 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
291 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
293 switch (snd_soc_component_get_bias_level(component)) {
294 case SND_SOC_BIAS_OFF:
295 case SND_SOC_BIAS_STANDBY:
301 pcm512x->overclock_dac = ucontrol->value.integer.value[0];
305 static const DECLARE_TLV_DB_SCALE(digital_tlv, -10350, 50, 1);
306 static const DECLARE_TLV_DB_SCALE(analog_tlv, -600, 600, 0);
307 static const DECLARE_TLV_DB_SCALE(boost_tlv, 0, 80, 0);
309 static const char * const pcm512x_dsp_program_texts[] = {
310 "FIR interpolation with de-emphasis",
311 "Low latency IIR with de-emphasis",
312 "High attenuation with de-emphasis",
313 "Fixed process flow",
314 "Ringing-less low latency FIR",
317 static const unsigned int pcm512x_dsp_program_values[] = {
325 static SOC_VALUE_ENUM_SINGLE_DECL(pcm512x_dsp_program,
326 PCM512x_DSP_PROGRAM, 0, 0x1f,
327 pcm512x_dsp_program_texts,
328 pcm512x_dsp_program_values);
330 static const char * const pcm512x_clk_missing_text[] = {
331 "1s", "2s", "3s", "4s", "5s", "6s", "7s", "8s"
334 static const struct soc_enum pcm512x_clk_missing =
335 SOC_ENUM_SINGLE(PCM512x_CLKDET, 0, 8, pcm512x_clk_missing_text);
337 static const char * const pcm512x_autom_text[] = {
338 "21ms", "106ms", "213ms", "533ms", "1.07s", "2.13s", "5.33s", "10.66s"
341 static const struct soc_enum pcm512x_autom_l =
342 SOC_ENUM_SINGLE(PCM512x_AUTO_MUTE, PCM512x_ATML_SHIFT, 8,
345 static const struct soc_enum pcm512x_autom_r =
346 SOC_ENUM_SINGLE(PCM512x_AUTO_MUTE, PCM512x_ATMR_SHIFT, 8,
349 static const char * const pcm512x_ramp_rate_text[] = {
350 "1 sample/update", "2 samples/update", "4 samples/update",
354 static const struct soc_enum pcm512x_vndf =
355 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1, PCM512x_VNDF_SHIFT, 4,
356 pcm512x_ramp_rate_text);
358 static const struct soc_enum pcm512x_vnuf =
359 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1, PCM512x_VNUF_SHIFT, 4,
360 pcm512x_ramp_rate_text);
362 static const struct soc_enum pcm512x_vedf =
363 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_2, PCM512x_VEDF_SHIFT, 4,
364 pcm512x_ramp_rate_text);
366 static const char * const pcm512x_ramp_step_text[] = {
367 "4dB/step", "2dB/step", "1dB/step", "0.5dB/step"
370 static const struct soc_enum pcm512x_vnds =
371 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1, PCM512x_VNDS_SHIFT, 4,
372 pcm512x_ramp_step_text);
374 static const struct soc_enum pcm512x_vnus =
375 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1, PCM512x_VNUS_SHIFT, 4,
376 pcm512x_ramp_step_text);
378 static const struct soc_enum pcm512x_veds =
379 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_2, PCM512x_VEDS_SHIFT, 4,
380 pcm512x_ramp_step_text);
382 static int pcm512x_update_mute(struct pcm512x_priv *pcm512x)
384 return regmap_update_bits(
385 pcm512x->regmap, PCM512x_MUTE, PCM512x_RQML | PCM512x_RQMR,
386 (!!(pcm512x->mute & 0x5) << PCM512x_RQML_SHIFT)
387 | (!!(pcm512x->mute & 0x3) << PCM512x_RQMR_SHIFT));
390 static int pcm512x_digital_playback_switch_get(struct snd_kcontrol *kcontrol,
391 struct snd_ctl_elem_value *ucontrol)
393 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
394 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
396 mutex_lock(&pcm512x->mutex);
397 ucontrol->value.integer.value[0] = !(pcm512x->mute & 0x4);
398 ucontrol->value.integer.value[1] = !(pcm512x->mute & 0x2);
399 mutex_unlock(&pcm512x->mutex);
404 static int pcm512x_digital_playback_switch_put(struct snd_kcontrol *kcontrol,
405 struct snd_ctl_elem_value *ucontrol)
407 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
408 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
409 int ret, changed = 0;
411 mutex_lock(&pcm512x->mutex);
413 if ((pcm512x->mute & 0x4) == (ucontrol->value.integer.value[0] << 2)) {
414 pcm512x->mute ^= 0x4;
417 if ((pcm512x->mute & 0x2) == (ucontrol->value.integer.value[1] << 1)) {
418 pcm512x->mute ^= 0x2;
423 ret = pcm512x_update_mute(pcm512x);
425 dev_err(component->dev,
426 "Failed to update digital mute: %d\n", ret);
427 mutex_unlock(&pcm512x->mutex);
432 mutex_unlock(&pcm512x->mutex);
437 static const struct snd_kcontrol_new pcm512x_controls[] = {
438 SOC_DOUBLE_R_TLV("Digital Playback Volume", PCM512x_DIGITAL_VOLUME_2,
439 PCM512x_DIGITAL_VOLUME_3, 0, 255, 1, digital_tlv),
440 SOC_DOUBLE_TLV("Analogue Playback Volume", PCM512x_ANALOG_GAIN_CTRL,
441 PCM512x_LAGN_SHIFT, PCM512x_RAGN_SHIFT, 1, 1, analog_tlv),
442 SOC_DOUBLE_TLV("Analogue Playback Boost Volume", PCM512x_ANALOG_GAIN_BOOST,
443 PCM512x_AGBL_SHIFT, PCM512x_AGBR_SHIFT, 1, 0, boost_tlv),
445 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
446 .name = "Digital Playback Switch",
448 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
449 .info = snd_ctl_boolean_stereo_info,
450 .get = pcm512x_digital_playback_switch_get,
451 .put = pcm512x_digital_playback_switch_put
454 SOC_SINGLE("Deemphasis Switch", PCM512x_DSP, PCM512x_DEMP_SHIFT, 1, 1),
455 SOC_ENUM("DSP Program", pcm512x_dsp_program),
457 SOC_ENUM("Clock Missing Period", pcm512x_clk_missing),
458 SOC_ENUM("Auto Mute Time Left", pcm512x_autom_l),
459 SOC_ENUM("Auto Mute Time Right", pcm512x_autom_r),
460 SOC_SINGLE("Auto Mute Mono Switch", PCM512x_DIGITAL_MUTE_3,
461 PCM512x_ACTL_SHIFT, 1, 0),
462 SOC_DOUBLE("Auto Mute Switch", PCM512x_DIGITAL_MUTE_3, PCM512x_AMLE_SHIFT,
463 PCM512x_AMRE_SHIFT, 1, 0),
465 SOC_ENUM("Volume Ramp Down Rate", pcm512x_vndf),
466 SOC_ENUM("Volume Ramp Down Step", pcm512x_vnds),
467 SOC_ENUM("Volume Ramp Up Rate", pcm512x_vnuf),
468 SOC_ENUM("Volume Ramp Up Step", pcm512x_vnus),
469 SOC_ENUM("Volume Ramp Down Emergency Rate", pcm512x_vedf),
470 SOC_ENUM("Volume Ramp Down Emergency Step", pcm512x_veds),
472 SOC_SINGLE_EXT("Max Overclock PLL", SND_SOC_NOPM, 0, 20, 0,
473 pcm512x_overclock_pll_get, pcm512x_overclock_pll_put),
474 SOC_SINGLE_EXT("Max Overclock DSP", SND_SOC_NOPM, 0, 40, 0,
475 pcm512x_overclock_dsp_get, pcm512x_overclock_dsp_put),
476 SOC_SINGLE_EXT("Max Overclock DAC", SND_SOC_NOPM, 0, 40, 0,
477 pcm512x_overclock_dac_get, pcm512x_overclock_dac_put),
480 static const struct snd_soc_dapm_widget pcm512x_dapm_widgets[] = {
481 SND_SOC_DAPM_DAC("DACL", NULL, SND_SOC_NOPM, 0, 0),
482 SND_SOC_DAPM_DAC("DACR", NULL, SND_SOC_NOPM, 0, 0),
484 SND_SOC_DAPM_OUTPUT("OUTL"),
485 SND_SOC_DAPM_OUTPUT("OUTR"),
488 static const struct snd_soc_dapm_route pcm512x_dapm_routes[] = {
489 { "DACL", NULL, "Playback" },
490 { "DACR", NULL, "Playback" },
492 { "OUTL", NULL, "DACL" },
493 { "OUTR", NULL, "DACR" },
496 static unsigned long pcm512x_pll_max(struct pcm512x_priv *pcm512x)
498 return 25000000 + 25000000 * pcm512x->overclock_pll / 100;
501 static unsigned long pcm512x_dsp_max(struct pcm512x_priv *pcm512x)
503 return 50000000 + 50000000 * pcm512x->overclock_dsp / 100;
506 static unsigned long pcm512x_dac_max(struct pcm512x_priv *pcm512x,
509 return rate + rate * pcm512x->overclock_dac / 100;
512 static unsigned long pcm512x_sck_max(struct pcm512x_priv *pcm512x)
514 if (!pcm512x->pll_out)
516 return pcm512x_pll_max(pcm512x);
519 static unsigned long pcm512x_ncp_target(struct pcm512x_priv *pcm512x,
520 unsigned long dac_rate)
523 * If the DAC is not actually overclocked, use the good old
526 if (dac_rate <= 6144000)
529 * ...but if the DAC is in fact overclocked, bump the NCP target
530 * rate to get the recommended dividers even when overclocking.
532 return pcm512x_dac_max(pcm512x, 1536000);
535 static const u32 pcm512x_dai_rates[] = {
536 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000,
537 88200, 96000, 176400, 192000, 384000,
540 static const struct snd_pcm_hw_constraint_list constraints_slave = {
541 .count = ARRAY_SIZE(pcm512x_dai_rates),
542 .list = pcm512x_dai_rates,
545 static int pcm512x_hw_rule_rate(struct snd_pcm_hw_params *params,
546 struct snd_pcm_hw_rule *rule)
548 struct pcm512x_priv *pcm512x = rule->private;
549 struct snd_interval ranges[2];
552 frame_size = snd_soc_params_to_frame_size(params);
556 switch (frame_size) {
558 /* No hole when the frame size is 32. */
562 /* There is only one hole in the range of supported
563 * rates, but it moves with the frame size.
565 memset(ranges, 0, sizeof(ranges));
566 ranges[0].min = 8000;
567 ranges[0].max = pcm512x_sck_max(pcm512x) / frame_size / 2;
568 ranges[1].min = DIV_ROUND_UP(16000000, frame_size);
569 ranges[1].max = 384000;
575 return snd_interval_ranges(hw_param_interval(params, rule->var),
576 ARRAY_SIZE(ranges), ranges, 0);
579 static int pcm512x_dai_startup_master(struct snd_pcm_substream *substream,
580 struct snd_soc_dai *dai)
582 struct snd_soc_component *component = dai->component;
583 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
584 struct device *dev = dai->dev;
585 struct snd_pcm_hw_constraint_ratnums *constraints_no_pll;
586 struct snd_ratnum *rats_no_pll;
588 if (IS_ERR(pcm512x->sclk)) {
589 dev_err(dev, "Need SCLK for master mode: %ld\n",
590 PTR_ERR(pcm512x->sclk));
591 return PTR_ERR(pcm512x->sclk);
594 if (pcm512x->pll_out)
595 return snd_pcm_hw_rule_add(substream->runtime, 0,
596 SNDRV_PCM_HW_PARAM_RATE,
597 pcm512x_hw_rule_rate,
599 SNDRV_PCM_HW_PARAM_FRAME_BITS,
600 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
602 constraints_no_pll = devm_kzalloc(dev, sizeof(*constraints_no_pll),
604 if (!constraints_no_pll)
606 constraints_no_pll->nrats = 1;
607 rats_no_pll = devm_kzalloc(dev, sizeof(*rats_no_pll), GFP_KERNEL);
610 constraints_no_pll->rats = rats_no_pll;
611 rats_no_pll->num = clk_get_rate(pcm512x->sclk) / 64;
612 rats_no_pll->den_min = 1;
613 rats_no_pll->den_max = 128;
614 rats_no_pll->den_step = 1;
616 return snd_pcm_hw_constraint_ratnums(substream->runtime, 0,
617 SNDRV_PCM_HW_PARAM_RATE,
621 static int pcm512x_dai_startup_slave(struct snd_pcm_substream *substream,
622 struct snd_soc_dai *dai)
624 struct snd_soc_component *component = dai->component;
625 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
626 struct device *dev = dai->dev;
627 struct regmap *regmap = pcm512x->regmap;
629 if (IS_ERR(pcm512x->sclk)) {
630 dev_info(dev, "No SCLK, using BCLK: %ld\n",
631 PTR_ERR(pcm512x->sclk));
633 /* Disable reporting of missing SCLK as an error */
634 regmap_update_bits(regmap, PCM512x_ERROR_DETECT,
635 PCM512x_IDCH, PCM512x_IDCH);
637 /* Switch PLL input to BCLK */
638 regmap_update_bits(regmap, PCM512x_PLL_REF,
639 PCM512x_SREF, PCM512x_SREF_BCK);
642 return snd_pcm_hw_constraint_list(substream->runtime, 0,
643 SNDRV_PCM_HW_PARAM_RATE,
647 static int pcm512x_dai_startup(struct snd_pcm_substream *substream,
648 struct snd_soc_dai *dai)
650 struct snd_soc_component *component = dai->component;
651 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
653 switch (pcm512x->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
654 case SND_SOC_DAIFMT_CBM_CFM:
655 case SND_SOC_DAIFMT_CBM_CFS:
656 return pcm512x_dai_startup_master(substream, dai);
658 case SND_SOC_DAIFMT_CBS_CFS:
659 return pcm512x_dai_startup_slave(substream, dai);
666 static int pcm512x_set_bias_level(struct snd_soc_component *component,
667 enum snd_soc_bias_level level)
669 struct pcm512x_priv *pcm512x = dev_get_drvdata(component->dev);
673 case SND_SOC_BIAS_ON:
674 case SND_SOC_BIAS_PREPARE:
677 case SND_SOC_BIAS_STANDBY:
678 ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
681 dev_err(component->dev, "Failed to remove standby: %d\n",
687 case SND_SOC_BIAS_OFF:
688 ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
689 PCM512x_RQST, PCM512x_RQST);
691 dev_err(component->dev, "Failed to request standby: %d\n",
701 static unsigned long pcm512x_find_sck(struct snd_soc_dai *dai,
702 unsigned long bclk_rate)
704 struct device *dev = dai->dev;
705 struct snd_soc_component *component = dai->component;
706 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
707 unsigned long sck_rate;
710 /* 64 MHz <= pll_rate <= 100 MHz, VREF mode */
711 /* 16 MHz <= sck_rate <= 25 MHz, VREF mode */
713 /* select sck_rate as a multiple of bclk_rate but still with
714 * as many factors of 2 as possible, as that makes it easier
715 * to find a fast DAC rate
717 pow2 = 1 << fls((pcm512x_pll_max(pcm512x) - 16000000) / bclk_rate);
718 for (; pow2; pow2 >>= 1) {
719 sck_rate = rounddown(pcm512x_pll_max(pcm512x),
721 if (sck_rate >= 16000000)
725 dev_err(dev, "Impossible to generate a suitable SCK\n");
729 dev_dbg(dev, "sck_rate %lu\n", sck_rate);
733 /* pll_rate = pllin_rate * R * J.D / P
738 * 64 MHz <= pll_rate <= 100 MHz
740 * 1 MHz <= pllin_rate / P <= 20 MHz
742 * 6.667 MHz <= pllin_rate / P <= 20 MHz
746 static int pcm512x_find_pll_coeff(struct snd_soc_dai *dai,
747 unsigned long pllin_rate,
748 unsigned long pll_rate)
750 struct device *dev = dai->dev;
751 struct snd_soc_component *component = dai->component;
752 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
753 unsigned long common;
755 unsigned long K; /* 10000 * J.D */
759 common = gcd(pll_rate, pllin_rate);
760 dev_dbg(dev, "pll %lu pllin %lu common %lu\n",
761 pll_rate, pllin_rate, common);
762 num = pll_rate / common;
763 den = pllin_rate / common;
765 /* pllin_rate / P (or here, den) cannot be greater than 20 MHz */
766 if (pllin_rate / den > 20000000 && num < 8) {
767 num *= DIV_ROUND_UP(pllin_rate / den, 20000000);
768 den *= DIV_ROUND_UP(pllin_rate / den, 20000000);
770 dev_dbg(dev, "num / den = %lu / %lu\n", num, den);
773 if (den <= 15 && num <= 16 * 63
774 && 1000000 <= pllin_rate / P && pllin_rate / P <= 20000000) {
775 /* Try the case with D = 0 */
777 /* factor 'num' into J and R, such that R <= 16 and J <= 63 */
778 for (R = 16; R; R--) {
782 if (J == 0 || J > 63)
785 dev_dbg(dev, "R * J / P = %d * %d / %d\n", R, J, P);
786 pcm512x->real_pll = pll_rate;
794 if (num > 0xffffffffUL / 10000)
797 /* Try to find an exact pll_rate using the D > 0 case */
798 common = gcd(10000 * num, den);
799 num = 10000 * num / common;
801 dev_dbg(dev, "num %lu den %lu common %lu\n", num, den, common);
803 for (P = den; P <= 15; P++) {
804 if (pllin_rate / P < 6667000 || 200000000 < pllin_rate / P)
809 /* J == 12 is ok if D == 0 */
810 if (K < 40000 || K > 120000)
815 dev_dbg(dev, "J.D / P = %d.%04d / %d\n", J, D, P);
816 pcm512x->real_pll = pll_rate;
820 /* Fall back to an approximate pll_rate */
823 /* find smallest possible P */
824 P = DIV_ROUND_UP(pllin_rate, 20000000);
828 dev_err(dev, "Need a slower clock as pll-input\n");
831 if (pllin_rate / P < 6667000) {
832 dev_err(dev, "Need a faster clock as pll-input\n");
835 K = DIV_ROUND_CLOSEST_ULL(10000ULL * pll_rate * P, pllin_rate);
838 /* J == 12 is ok if D == 0 */
843 dev_dbg(dev, "J.D / P ~ %d.%04d / %d\n", J, D, P);
844 pcm512x->real_pll = DIV_ROUND_DOWN_ULL((u64)K * pllin_rate, 10000 * P);
854 static unsigned long pcm512x_pllin_dac_rate(struct snd_soc_dai *dai,
855 unsigned long osr_rate,
856 unsigned long pllin_rate)
858 struct snd_soc_component *component = dai->component;
859 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
860 unsigned long dac_rate;
862 if (!pcm512x->pll_out)
863 return 0; /* no PLL to bypass, force SCK as DAC input */
865 if (pllin_rate % osr_rate)
866 return 0; /* futile, quit early */
868 /* run DAC no faster than 6144000 Hz */
869 for (dac_rate = rounddown(pcm512x_dac_max(pcm512x, 6144000), osr_rate);
871 dac_rate -= osr_rate) {
873 if (pllin_rate / dac_rate > 128)
874 return 0; /* DAC divider would be too big */
876 if (!(pllin_rate % dac_rate))
879 dac_rate -= osr_rate;
885 static int pcm512x_set_dividers(struct snd_soc_dai *dai,
886 struct snd_pcm_hw_params *params)
888 struct device *dev = dai->dev;
889 struct snd_soc_component *component = dai->component;
890 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
891 unsigned long pllin_rate = 0;
892 unsigned long pll_rate;
893 unsigned long sck_rate;
894 unsigned long mck_rate;
895 unsigned long bclk_rate;
896 unsigned long sample_rate;
897 unsigned long osr_rate;
898 unsigned long dacsrc_rate;
903 unsigned long dac_rate;
911 if (pcm512x->bclk_ratio > 0) {
912 lrclk_div = pcm512x->bclk_ratio;
914 lrclk_div = snd_soc_params_to_frame_size(params);
916 if (lrclk_div == 0) {
917 dev_err(dev, "No LRCLK?\n");
922 if (!pcm512x->pll_out) {
923 sck_rate = clk_get_rate(pcm512x->sclk);
924 bclk_rate = params_rate(params) * lrclk_div;
925 bclk_div = DIV_ROUND_CLOSEST(sck_rate, bclk_rate);
929 ret = snd_soc_params_to_bclk(params);
931 dev_err(dev, "Failed to find suitable BCLK: %d\n", ret);
935 dev_err(dev, "No BCLK?\n");
940 pllin_rate = clk_get_rate(pcm512x->sclk);
942 sck_rate = pcm512x_find_sck(dai, bclk_rate);
945 pll_rate = 4 * sck_rate;
947 ret = pcm512x_find_pll_coeff(dai, pllin_rate, pll_rate);
951 ret = regmap_write(pcm512x->regmap,
952 PCM512x_PLL_COEFF_0, pcm512x->pll_p - 1);
954 dev_err(dev, "Failed to write PLL P: %d\n", ret);
958 ret = regmap_write(pcm512x->regmap,
959 PCM512x_PLL_COEFF_1, pcm512x->pll_j);
961 dev_err(dev, "Failed to write PLL J: %d\n", ret);
965 ret = regmap_write(pcm512x->regmap,
966 PCM512x_PLL_COEFF_2, pcm512x->pll_d >> 8);
968 dev_err(dev, "Failed to write PLL D msb: %d\n", ret);
972 ret = regmap_write(pcm512x->regmap,
973 PCM512x_PLL_COEFF_3, pcm512x->pll_d & 0xff);
975 dev_err(dev, "Failed to write PLL D lsb: %d\n", ret);
979 ret = regmap_write(pcm512x->regmap,
980 PCM512x_PLL_COEFF_4, pcm512x->pll_r - 1);
982 dev_err(dev, "Failed to write PLL R: %d\n", ret);
986 mck_rate = pcm512x->real_pll;
988 bclk_div = DIV_ROUND_CLOSEST(sck_rate, bclk_rate);
991 if (bclk_div > 128) {
992 dev_err(dev, "Failed to find BCLK divider\n");
996 /* the actual rate */
997 sample_rate = sck_rate / bclk_div / lrclk_div;
998 osr_rate = 16 * sample_rate;
1000 /* run DSP no faster than 50 MHz */
1001 dsp_div = mck_rate > pcm512x_dsp_max(pcm512x) ? 2 : 1;
1003 dac_rate = pcm512x_pllin_dac_rate(dai, osr_rate, pllin_rate);
1005 /* the desired clock rate is "compatible" with the pll input
1006 * clock, so use that clock as dac input instead of the pll
1007 * output clock since the pll will introduce jitter and thus
1010 dev_dbg(dev, "using pll input as dac input\n");
1011 ret = regmap_update_bits(pcm512x->regmap, PCM512x_DAC_REF,
1012 PCM512x_SDAC, PCM512x_SDAC_GPIO);
1014 dev_err(component->dev,
1015 "Failed to set gpio as dacref: %d\n", ret);
1019 gpio = PCM512x_GREF_GPIO1 + pcm512x->pll_in - 1;
1020 ret = regmap_update_bits(pcm512x->regmap, PCM512x_GPIO_DACIN,
1021 PCM512x_GREF, gpio);
1023 dev_err(component->dev,
1024 "Failed to set gpio %d as dacin: %d\n",
1025 pcm512x->pll_in, ret);
1029 dacsrc_rate = pllin_rate;
1031 /* run DAC no faster than 6144000 Hz */
1032 unsigned long dac_mul = pcm512x_dac_max(pcm512x, 6144000)
1034 unsigned long sck_mul = sck_rate / osr_rate;
1036 for (; dac_mul; dac_mul--) {
1037 if (!(sck_mul % dac_mul))
1041 dev_err(dev, "Failed to find DAC rate\n");
1045 dac_rate = dac_mul * osr_rate;
1046 dev_dbg(dev, "dac_rate %lu sample_rate %lu\n",
1047 dac_rate, sample_rate);
1049 ret = regmap_update_bits(pcm512x->regmap, PCM512x_DAC_REF,
1050 PCM512x_SDAC, PCM512x_SDAC_SCK);
1052 dev_err(component->dev,
1053 "Failed to set sck as dacref: %d\n", ret);
1057 dacsrc_rate = sck_rate;
1060 osr_div = DIV_ROUND_CLOSEST(dac_rate, osr_rate);
1061 if (osr_div > 128) {
1062 dev_err(dev, "Failed to find OSR divider\n");
1066 dac_div = DIV_ROUND_CLOSEST(dacsrc_rate, dac_rate);
1067 if (dac_div > 128) {
1068 dev_err(dev, "Failed to find DAC divider\n");
1071 dac_rate = dacsrc_rate / dac_div;
1073 ncp_div = DIV_ROUND_CLOSEST(dac_rate,
1074 pcm512x_ncp_target(pcm512x, dac_rate));
1075 if (ncp_div > 128 || dac_rate / ncp_div > 2048000) {
1076 /* run NCP no faster than 2048000 Hz, but why? */
1077 ncp_div = DIV_ROUND_UP(dac_rate, 2048000);
1078 if (ncp_div > 128) {
1079 dev_err(dev, "Failed to find NCP divider\n");
1084 idac = mck_rate / (dsp_div * sample_rate);
1086 ret = regmap_write(pcm512x->regmap, PCM512x_DSP_CLKDIV, dsp_div - 1);
1088 dev_err(dev, "Failed to write DSP divider: %d\n", ret);
1092 ret = regmap_write(pcm512x->regmap, PCM512x_DAC_CLKDIV, dac_div - 1);
1094 dev_err(dev, "Failed to write DAC divider: %d\n", ret);
1098 ret = regmap_write(pcm512x->regmap, PCM512x_NCP_CLKDIV, ncp_div - 1);
1100 dev_err(dev, "Failed to write NCP divider: %d\n", ret);
1104 ret = regmap_write(pcm512x->regmap, PCM512x_OSR_CLKDIV, osr_div - 1);
1106 dev_err(dev, "Failed to write OSR divider: %d\n", ret);
1110 ret = regmap_write(pcm512x->regmap,
1111 PCM512x_MASTER_CLKDIV_1, bclk_div - 1);
1113 dev_err(dev, "Failed to write BCLK divider: %d\n", ret);
1117 ret = regmap_write(pcm512x->regmap,
1118 PCM512x_MASTER_CLKDIV_2, lrclk_div - 1);
1120 dev_err(dev, "Failed to write LRCLK divider: %d\n", ret);
1124 ret = regmap_write(pcm512x->regmap, PCM512x_IDAC_1, idac >> 8);
1126 dev_err(dev, "Failed to write IDAC msb divider: %d\n", ret);
1130 ret = regmap_write(pcm512x->regmap, PCM512x_IDAC_2, idac & 0xff);
1132 dev_err(dev, "Failed to write IDAC lsb divider: %d\n", ret);
1136 if (sample_rate <= pcm512x_dac_max(pcm512x, 48000))
1137 fssp = PCM512x_FSSP_48KHZ;
1138 else if (sample_rate <= pcm512x_dac_max(pcm512x, 96000))
1139 fssp = PCM512x_FSSP_96KHZ;
1140 else if (sample_rate <= pcm512x_dac_max(pcm512x, 192000))
1141 fssp = PCM512x_FSSP_192KHZ;
1143 fssp = PCM512x_FSSP_384KHZ;
1144 ret = regmap_update_bits(pcm512x->regmap, PCM512x_FS_SPEED_MODE,
1145 PCM512x_FSSP, fssp);
1147 dev_err(component->dev, "Failed to set fs speed: %d\n", ret);
1151 dev_dbg(component->dev, "DSP divider %d\n", dsp_div);
1152 dev_dbg(component->dev, "DAC divider %d\n", dac_div);
1153 dev_dbg(component->dev, "NCP divider %d\n", ncp_div);
1154 dev_dbg(component->dev, "OSR divider %d\n", osr_div);
1155 dev_dbg(component->dev, "BCK divider %d\n", bclk_div);
1156 dev_dbg(component->dev, "LRCK divider %d\n", lrclk_div);
1157 dev_dbg(component->dev, "IDAC %d\n", idac);
1158 dev_dbg(component->dev, "1<<FSSP %d\n", 1 << fssp);
1163 static int pcm512x_hw_params(struct snd_pcm_substream *substream,
1164 struct snd_pcm_hw_params *params,
1165 struct snd_soc_dai *dai)
1167 struct snd_soc_component *component = dai->component;
1168 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
1175 dev_dbg(component->dev, "hw_params %u Hz, %u channels\n",
1176 params_rate(params),
1177 params_channels(params));
1179 switch (params_width(params)) {
1181 alen = PCM512x_ALEN_16;
1184 alen = PCM512x_ALEN_20;
1187 alen = PCM512x_ALEN_24;
1190 alen = PCM512x_ALEN_32;
1193 dev_err(component->dev, "Bad frame size: %d\n",
1194 params_width(params));
1198 switch (pcm512x->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1199 case SND_SOC_DAIFMT_CBS_CFS:
1200 ret = regmap_update_bits(pcm512x->regmap,
1201 PCM512x_BCLK_LRCLK_CFG,
1203 | PCM512x_BCKO | PCM512x_LRKO,
1206 dev_err(component->dev,
1207 "Failed to enable slave mode: %d\n", ret);
1211 ret = regmap_update_bits(pcm512x->regmap, PCM512x_ERROR_DETECT,
1214 dev_err(component->dev,
1215 "Failed to enable clock divider autoset: %d\n",
1220 case SND_SOC_DAIFMT_CBM_CFM:
1221 clock_output = PCM512x_BCKO | PCM512x_LRKO;
1222 master_mode = PCM512x_RLRK | PCM512x_RBCK;
1224 case SND_SOC_DAIFMT_CBM_CFS:
1225 clock_output = PCM512x_BCKO;
1226 master_mode = PCM512x_RBCK;
1232 ret = regmap_update_bits(pcm512x->regmap, PCM512x_I2S_1,
1233 PCM512x_ALEN, alen);
1235 dev_err(component->dev, "Failed to set frame size: %d\n", ret);
1239 if (pcm512x->pll_out) {
1240 ret = regmap_write(pcm512x->regmap, PCM512x_FLEX_A, 0x11);
1242 dev_err(component->dev, "Failed to set FLEX_A: %d\n", ret);
1246 ret = regmap_write(pcm512x->regmap, PCM512x_FLEX_B, 0xff);
1248 dev_err(component->dev, "Failed to set FLEX_B: %d\n", ret);
1252 ret = regmap_update_bits(pcm512x->regmap, PCM512x_ERROR_DETECT,
1253 PCM512x_IDFS | PCM512x_IDBK
1254 | PCM512x_IDSK | PCM512x_IDCH
1255 | PCM512x_IDCM | PCM512x_DCAS
1257 PCM512x_IDFS | PCM512x_IDBK
1258 | PCM512x_IDSK | PCM512x_IDCH
1261 dev_err(component->dev,
1262 "Failed to ignore auto-clock failures: %d\n",
1267 ret = regmap_update_bits(pcm512x->regmap, PCM512x_ERROR_DETECT,
1268 PCM512x_IDFS | PCM512x_IDBK
1269 | PCM512x_IDSK | PCM512x_IDCH
1270 | PCM512x_IDCM | PCM512x_DCAS
1272 PCM512x_IDFS | PCM512x_IDBK
1273 | PCM512x_IDSK | PCM512x_IDCH
1274 | PCM512x_DCAS | PCM512x_IPLK);
1276 dev_err(component->dev,
1277 "Failed to ignore auto-clock failures: %d\n",
1282 ret = regmap_update_bits(pcm512x->regmap, PCM512x_PLL_EN,
1285 dev_err(component->dev, "Failed to disable pll: %d\n", ret);
1290 ret = pcm512x_set_dividers(dai, params);
1294 if (pcm512x->pll_out) {
1295 ret = regmap_update_bits(pcm512x->regmap, PCM512x_PLL_REF,
1296 PCM512x_SREF, PCM512x_SREF_GPIO);
1298 dev_err(component->dev,
1299 "Failed to set gpio as pllref: %d\n", ret);
1303 gpio = PCM512x_GREF_GPIO1 + pcm512x->pll_in - 1;
1304 ret = regmap_update_bits(pcm512x->regmap, PCM512x_GPIO_PLLIN,
1305 PCM512x_GREF, gpio);
1307 dev_err(component->dev,
1308 "Failed to set gpio %d as pllin: %d\n",
1309 pcm512x->pll_in, ret);
1313 ret = regmap_update_bits(pcm512x->regmap, PCM512x_PLL_EN,
1314 PCM512x_PLLE, PCM512x_PLLE);
1316 dev_err(component->dev, "Failed to enable pll: %d\n", ret);
1321 ret = regmap_update_bits(pcm512x->regmap, PCM512x_BCLK_LRCLK_CFG,
1322 PCM512x_BCKP | PCM512x_BCKO | PCM512x_LRKO,
1325 dev_err(component->dev, "Failed to enable clock output: %d\n", ret);
1329 ret = regmap_update_bits(pcm512x->regmap, PCM512x_MASTER_MODE,
1330 PCM512x_RLRK | PCM512x_RBCK,
1333 dev_err(component->dev, "Failed to enable master mode: %d\n", ret);
1337 if (pcm512x->pll_out) {
1338 gpio = PCM512x_G1OE << (pcm512x->pll_out - 1);
1339 ret = regmap_update_bits(pcm512x->regmap, PCM512x_GPIO_EN,
1342 dev_err(component->dev, "Failed to enable gpio %d: %d\n",
1343 pcm512x->pll_out, ret);
1347 gpio = PCM512x_GPIO_OUTPUT_1 + pcm512x->pll_out - 1;
1348 ret = regmap_update_bits(pcm512x->regmap, gpio,
1349 PCM512x_GxSL, PCM512x_GxSL_PLLCK);
1351 dev_err(component->dev, "Failed to output pll on %d: %d\n",
1352 ret, pcm512x->pll_out);
1357 ret = regmap_update_bits(pcm512x->regmap, PCM512x_SYNCHRONIZE,
1358 PCM512x_RQSY, PCM512x_RQSY_HALT);
1360 dev_err(component->dev, "Failed to halt clocks: %d\n", ret);
1364 ret = regmap_update_bits(pcm512x->regmap, PCM512x_SYNCHRONIZE,
1365 PCM512x_RQSY, PCM512x_RQSY_RESUME);
1367 dev_err(component->dev, "Failed to resume clocks: %d\n", ret);
1374 static int pcm512x_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1376 struct snd_soc_component *component = dai->component;
1377 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
1384 static int pcm512x_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
1386 struct snd_soc_component *component = dai->component;
1387 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
1392 pcm512x->bclk_ratio = ratio;
1397 static int pcm512x_digital_mute(struct snd_soc_dai *dai, int mute)
1399 struct snd_soc_component *component = dai->component;
1400 struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
1402 unsigned int mute_det;
1404 mutex_lock(&pcm512x->mutex);
1407 pcm512x->mute |= 0x1;
1408 ret = regmap_update_bits(pcm512x->regmap, PCM512x_MUTE,
1409 PCM512x_RQML | PCM512x_RQMR,
1410 PCM512x_RQML | PCM512x_RQMR);
1412 dev_err(component->dev,
1413 "Failed to set digital mute: %d\n", ret);
1417 regmap_read_poll_timeout(pcm512x->regmap,
1418 PCM512x_ANALOG_MUTE_DET,
1419 mute_det, (mute_det & 0x3) == 0,
1422 pcm512x->mute &= ~0x1;
1423 ret = pcm512x_update_mute(pcm512x);
1425 dev_err(component->dev,
1426 "Failed to update digital mute: %d\n", ret);
1430 regmap_read_poll_timeout(pcm512x->regmap,
1431 PCM512x_ANALOG_MUTE_DET,
1434 == ((~pcm512x->mute >> 1) & 0x3),
1439 mutex_unlock(&pcm512x->mutex);
1444 static const struct snd_soc_dai_ops pcm512x_dai_ops = {
1445 .startup = pcm512x_dai_startup,
1446 .hw_params = pcm512x_hw_params,
1447 .set_fmt = pcm512x_set_fmt,
1448 .digital_mute = pcm512x_digital_mute,
1449 .set_bclk_ratio = pcm512x_set_bclk_ratio,
1452 static struct snd_soc_dai_driver pcm512x_dai = {
1453 .name = "pcm512x-hifi",
1455 .stream_name = "Playback",
1458 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1461 .formats = SNDRV_PCM_FMTBIT_S16_LE |
1462 SNDRV_PCM_FMTBIT_S24_LE |
1463 SNDRV_PCM_FMTBIT_S32_LE
1465 .ops = &pcm512x_dai_ops,
1468 static const struct snd_soc_component_driver pcm512x_component_driver = {
1469 .set_bias_level = pcm512x_set_bias_level,
1470 .controls = pcm512x_controls,
1471 .num_controls = ARRAY_SIZE(pcm512x_controls),
1472 .dapm_widgets = pcm512x_dapm_widgets,
1473 .num_dapm_widgets = ARRAY_SIZE(pcm512x_dapm_widgets),
1474 .dapm_routes = pcm512x_dapm_routes,
1475 .num_dapm_routes = ARRAY_SIZE(pcm512x_dapm_routes),
1476 .use_pmdown_time = 1,
1478 .non_legacy_dai_naming = 1,
1481 static const struct regmap_range_cfg pcm512x_range = {
1482 .name = "Pages", .range_min = PCM512x_VIRT_BASE,
1483 .range_max = PCM512x_MAX_REGISTER,
1484 .selector_reg = PCM512x_PAGE,
1485 .selector_mask = 0xff,
1486 .window_start = 0, .window_len = 0x100,
1489 const struct regmap_config pcm512x_regmap = {
1493 .readable_reg = pcm512x_readable,
1494 .volatile_reg = pcm512x_volatile,
1496 .ranges = &pcm512x_range,
1499 .max_register = PCM512x_MAX_REGISTER,
1500 .reg_defaults = pcm512x_reg_defaults,
1501 .num_reg_defaults = ARRAY_SIZE(pcm512x_reg_defaults),
1502 .cache_type = REGCACHE_RBTREE,
1504 EXPORT_SYMBOL_GPL(pcm512x_regmap);
1506 int pcm512x_probe(struct device *dev, struct regmap *regmap)
1508 struct pcm512x_priv *pcm512x;
1511 pcm512x = devm_kzalloc(dev, sizeof(struct pcm512x_priv), GFP_KERNEL);
1515 mutex_init(&pcm512x->mutex);
1517 dev_set_drvdata(dev, pcm512x);
1518 pcm512x->regmap = regmap;
1520 for (i = 0; i < ARRAY_SIZE(pcm512x->supplies); i++)
1521 pcm512x->supplies[i].supply = pcm512x_supply_names[i];
1523 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(pcm512x->supplies),
1526 dev_err(dev, "Failed to get supplies: %d\n", ret);
1530 pcm512x->supply_nb[0].notifier_call = pcm512x_regulator_event_0;
1531 pcm512x->supply_nb[1].notifier_call = pcm512x_regulator_event_1;
1532 pcm512x->supply_nb[2].notifier_call = pcm512x_regulator_event_2;
1534 for (i = 0; i < ARRAY_SIZE(pcm512x->supplies); i++) {
1535 ret = devm_regulator_register_notifier(
1536 pcm512x->supplies[i].consumer,
1537 &pcm512x->supply_nb[i]);
1540 "Failed to register regulator notifier: %d\n",
1545 ret = regulator_bulk_enable(ARRAY_SIZE(pcm512x->supplies),
1548 dev_err(dev, "Failed to enable supplies: %d\n", ret);
1552 /* Reset the device, verifying I/O in the process for I2C */
1553 ret = regmap_write(regmap, PCM512x_RESET,
1554 PCM512x_RSTM | PCM512x_RSTR);
1556 dev_err(dev, "Failed to reset device: %d\n", ret);
1560 ret = regmap_write(regmap, PCM512x_RESET, 0);
1562 dev_err(dev, "Failed to reset device: %d\n", ret);
1566 pcm512x->sclk = devm_clk_get(dev, NULL);
1567 if (PTR_ERR(pcm512x->sclk) == -EPROBE_DEFER)
1568 return -EPROBE_DEFER;
1569 if (!IS_ERR(pcm512x->sclk)) {
1570 ret = clk_prepare_enable(pcm512x->sclk);
1572 dev_err(dev, "Failed to enable SCLK: %d\n", ret);
1577 /* Default to standby mode */
1578 ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
1579 PCM512x_RQST, PCM512x_RQST);
1581 dev_err(dev, "Failed to request standby: %d\n",
1586 pm_runtime_set_active(dev);
1587 pm_runtime_enable(dev);
1588 pm_runtime_idle(dev);
1592 const struct device_node *np = dev->of_node;
1595 if (of_property_read_u32(np, "pll-in", &val) >= 0) {
1597 dev_err(dev, "Invalid pll-in\n");
1601 pcm512x->pll_in = val;
1604 if (of_property_read_u32(np, "pll-out", &val) >= 0) {
1606 dev_err(dev, "Invalid pll-out\n");
1610 pcm512x->pll_out = val;
1613 if (!pcm512x->pll_in != !pcm512x->pll_out) {
1615 "Error: both pll-in and pll-out, or none\n");
1619 if (pcm512x->pll_in && pcm512x->pll_in == pcm512x->pll_out) {
1620 dev_err(dev, "Error: pll-in == pll-out\n");
1627 ret = devm_snd_soc_register_component(dev, &pcm512x_component_driver,
1630 dev_err(dev, "Failed to register CODEC: %d\n", ret);
1637 pm_runtime_disable(dev);
1639 if (!IS_ERR(pcm512x->sclk))
1640 clk_disable_unprepare(pcm512x->sclk);
1642 regulator_bulk_disable(ARRAY_SIZE(pcm512x->supplies),
1646 EXPORT_SYMBOL_GPL(pcm512x_probe);
1648 void pcm512x_remove(struct device *dev)
1650 struct pcm512x_priv *pcm512x = dev_get_drvdata(dev);
1652 pm_runtime_disable(dev);
1653 if (!IS_ERR(pcm512x->sclk))
1654 clk_disable_unprepare(pcm512x->sclk);
1655 regulator_bulk_disable(ARRAY_SIZE(pcm512x->supplies),
1658 EXPORT_SYMBOL_GPL(pcm512x_remove);
1661 static int pcm512x_suspend(struct device *dev)
1663 struct pcm512x_priv *pcm512x = dev_get_drvdata(dev);
1666 ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
1667 PCM512x_RQPD, PCM512x_RQPD);
1669 dev_err(dev, "Failed to request power down: %d\n", ret);
1673 ret = regulator_bulk_disable(ARRAY_SIZE(pcm512x->supplies),
1676 dev_err(dev, "Failed to disable supplies: %d\n", ret);
1680 if (!IS_ERR(pcm512x->sclk))
1681 clk_disable_unprepare(pcm512x->sclk);
1686 static int pcm512x_resume(struct device *dev)
1688 struct pcm512x_priv *pcm512x = dev_get_drvdata(dev);
1691 if (!IS_ERR(pcm512x->sclk)) {
1692 ret = clk_prepare_enable(pcm512x->sclk);
1694 dev_err(dev, "Failed to enable SCLK: %d\n", ret);
1699 ret = regulator_bulk_enable(ARRAY_SIZE(pcm512x->supplies),
1702 dev_err(dev, "Failed to enable supplies: %d\n", ret);
1706 regcache_cache_only(pcm512x->regmap, false);
1707 ret = regcache_sync(pcm512x->regmap);
1709 dev_err(dev, "Failed to sync cache: %d\n", ret);
1713 ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
1716 dev_err(dev, "Failed to remove power down: %d\n", ret);
1724 const struct dev_pm_ops pcm512x_pm_ops = {
1725 SET_RUNTIME_PM_OPS(pcm512x_suspend, pcm512x_resume, NULL)
1727 EXPORT_SYMBOL_GPL(pcm512x_pm_ops);
1729 MODULE_DESCRIPTION("ASoC PCM512x codec driver");
1730 MODULE_AUTHOR("Mark Brown <broonie@kernel.org>");
1731 MODULE_LICENSE("GPL v2");